Re: [PATCH 00/25] Exynos DRM: new life of IPP (Image Post Processing) subsystem

[Tobias Jakobi]

Hello Marek,

this looks very interesting. I'll try to integrate this with my mpv DRM
backend once the colorspace conversion bits are implemented.

I also wanted to suggest that using the IPP blocks (rotator, FIMC)
should be still be possible without any kind of display active. So
similar in the way I can use the G2D block without presenting anything
on the screen itself.

I'm take a closer look at the series later.

With best wishes,
Tobias




Marek Szyprowski wrote:
> Dear All,
> 
> This patch series introduces a new life into Exynos IPP (Image Post
> Processing) subsystem by integrating it (transparently for userspace
> applications) with Exynos DRM core plane management. This means that all
> CRTC drivers transparently get support for standard features of IPP
> subsystem like rotation and scaling.
> 
> Support for features not supported natively by CRTC drivers is
> implemented with a help of temporary framebuffers, where image data is
> processed by IPP subsystem before performing the scanout by a CRTC driver.
> 
> This patchset is a first version of this 'new feature' and I would like
> get some comments on the proposed approach. I plan to continue working
> on enhancing Exynos DRM drivers and especially do the cleanup the IPP
> subsystem.
> 
> Most of the new features are added by the last 2 patches. All other
> patches are bugfixes in various Exynos DRM subdrivers and significant
> core rewrite - introducing a subclass of drm_plane_state was needed and
> all drivers have been converted to use it. Some initial cleanups in IPP
> subsystem were also needed to let Exynos core to call it internally from
> the driver core. This part will be cleaned even more in the future.
> 
> 
> My solution has been tested on Exynos4412-based Odroid U3 and
> Exynos5420-based Odroid XU3. To check rotation, cropping and scaling
> I've developed a simple test application, which use atomic mode
> setting/page flipping API. You can download it here:
> 
> https://git.linaro.org/?p=people/marek.szyprowski/atomictest.git
> 
> The application draws a rectangle with test pattern and then moves it
> around the screen. To see how all mentioned features work (plane
> rotation, cropping, scaling and off-screen display), please run the
> following commands:
> 
> scaling + rotation:
> # ./atomictest -b400x300 -f60 -t100 -m2x1 -x1x1
> 
> cropping + rotation:
> # ./atomictest -b400x300 -f60 -t100 -m2x1 -c1x1
> 
> cropping + rotation + off-screen display:
> # ./atomictest -b400x300 -f60 -t100 -m2x1 -c1x1 -o400x300
> 
> scaling + cropping + rotation:
> # ./atomictest -b400x300 -f60 -t100 -m2x1 -x1x1 -c1x1 
> 
> For more information about parameters, run the application with -h
> parameter or check the source code.
> 
> 
> My TODO list (please comment the priority of those tasks):
> 
> 1. add support for color space conversion, support for foreign pixel
> formats and fb-modifiers to my plane-IPP integration code (currently
> only RGB single plane modes are supported)
> 
> 2. provide support for IPP features (framebuffer rotation, scaling,
> cropping, color space conversion) with userspace atomic API instead of
> (or together with) Exynos custom IPP ioctls; the important question is
> weather the existing Exynos IPP API (userspace ioctls) should be kept or
> can be removed (existing userspace API is misleading in many aspects).
> 
> 3. simplify IPP subsystem core (the code looks over-engineered a bit,
> there are also some known issues with error paths), remove
> non-functional write-back and output modes
> 
> 4. simplify interface to IPP HW-specific mem2mem subdrivers
> 
> 5. implement output mode for IPP sub-drivers, use it where possible
> instead of using temporary framebuffer (image data is then transferred
> directly from scaling hw block to display engine via local path, no
> temporary framebuffers are needed)
> 
> 6. implement write-back feature with atomic API as respective CRTC
> properties
> 
> 
> Patches have been prepared on top of linux-next from 10-11-2015. First
> 2 patches should be applied to Samsung SoC tree, all other should go
> to Exynos DRM tree.
> 
> Best regards
> Marek Szyprowski
> Samsung R Institute Poland
> 
> 
> Patch summary:
> 
> Marek Szyprowski (21):
>   ARM: dts: exynos4: add rotator nodes
>   ARM: dts: exynos542x: add rotator node
>   drm/exynos: gsc: add device tree support and remove usage of static
> mappings
>   drm/exynos: rotator: convert to common clock framework
>   drm/exynos: exynos7-decon: remove excessive check
>   drm/exynos: move dma_addr attribute from exynos plane to exynos fb
>   drm/exynos: introduce exynos_drm_plane_state structure
>   drm/exynos: mixer: use crtc->state->adjusted_mode instead of
> crtc->mode
>   drm/exynos: mixer: enable video overlay plane only when VP is
> available
>   drm/exynos: introduce exynos_drm_plane_config structure
>   drm/exynos: add generic check for plane state
>   drm/exynos: mixer: use ratio precalculated in exynos_state
>   drm/exynos: 

Re: [PATCH] ARM: dts: exynos5422-odroid*: remove fimd node

[Krzysztof Kozlowski]

On 10.11.2015 19:24, Marek Szyprowski wrote:
> FIMD device is not used at all on Exynos5422-based Odroid XU3-lite and
> XU4. XU3 board teorethically can support FIMD with DisplayPort

s/teorethically/theoretically/

> connector, but due to hw limitation/design it doesn't work in most
> cases. It is also not even enabled in XU3 dts file.
> 
> FIMD node was enabled mainly due to limitation of early Exynos DRM
> driver, which didn't initialize properly when no FIMD device was
> available. This node can be now safetly removed from XU3-common dtsi and

s/safetly/safely/

> added layer to Odroid XU3 dts, when Display Port driver gets enabled.
> 
> Signed-off-by: Marek Szyprowski 
> ---
>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 5 -
>  1 file changed, 5 deletions(-)

Tested on Odroid XU4 board (HDMI, IOMMU enabled):

Tested-by: Krzysztof Kozlowski 
Reviewed-by: Krzysztof Kozlowski 


No need for respin, the changelog fixes above can be done during applying.


BTW, do you know why we don't have EXYNOS_IOMMU enabled in defconfig?
Any reasons against?

Best regards,
Krzysztof


> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 
> b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> index 1af5bdc..9134217 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> @@ -67,11 +67,6 @@
>   <1920>;
>  };
>  
> - {
> - status = "okay";
> -};
> -
> -
>   {
>   status = "okay";
>   hpd-gpio = < 7 GPIO_ACTIVE_HIGH>;
> 

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[PATCH V3 5/5] ARM: dts: exynos4412: Rename OPP nodes as opp@

[Viresh Kumar]

OPP bindings got updated to name OPP nodes this way, make changes
according to that.

Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Viresh Kumar 
---
 arch/arm/boot/dts/exynos4412.dtsi | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412.dtsi 
b/arch/arm/boot/dts/exynos4412.dtsi
index 294cfe40388d..40beede46e55 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -64,73 +64,73 @@
compatible = "operating-points-v2";
opp-shared;
 
-   opp00 {
+   opp@2 {
opp-hz = /bits/ 64 <2>;
opp-microvolt = <90>;
clock-latency-ns = <20>;
};
-   opp01 {
+   opp@3 {
opp-hz = /bits/ 64 <3>;
opp-microvolt = <90>;
clock-latency-ns = <20>;
};
-   opp02 {
+   opp@4 {
opp-hz = /bits/ 64 <4>;
opp-microvolt = <925000>;
clock-latency-ns = <20>;
};
-   opp03 {
+   opp@5 {
opp-hz = /bits/ 64 <5>;
opp-microvolt = <95>;
clock-latency-ns = <20>;
};
-   opp04 {
+   opp@6 {
opp-hz = /bits/ 64 <6>;
opp-microvolt = <975000>;
clock-latency-ns = <20>;
};
-   opp05 {
+   opp@7 {
opp-hz = /bits/ 64 <7>;
opp-microvolt = <987500>;
clock-latency-ns = <20>;
};
-   opp06 {
+   opp@8 {
opp-hz = /bits/ 64 <8>;
opp-microvolt = <100>;
clock-latency-ns = <20>;
opp-suspend;
};
-   opp07 {
+   opp@9 {
opp-hz = /bits/ 64 <9>;
opp-microvolt = <1037500>;
clock-latency-ns = <20>;
};
-   opp08 {
+   opp@10 {
opp-hz = /bits/ 64 <10>;
opp-microvolt = <1087500>;
clock-latency-ns = <20>;
};
-   opp09 {
+   opp@11 {
opp-hz = /bits/ 64 <11>;
opp-microvolt = <1137500>;
clock-latency-ns = <20>;
};
-   opp10 {
+   opp@12 {
opp-hz = /bits/ 64 <12>;
opp-microvolt = <1187500>;
clock-latency-ns = <20>;
};
-   opp11 {
+   opp@13 {
opp-hz = /bits/ 64 <13>;
opp-microvolt = <125>;
clock-latency-ns = <20>;
};
-   opp12 {
+   opp@14 {
opp-hz = /bits/ 64 <14>;
opp-microvolt = <1287500>;
clock-latency-ns = <20>;
};
-   opp13 {
+   opp@15 {
opp-hz = /bits/ 64 <15>;
opp-microvolt = <135>;
clock-latency-ns = <20>;
-- 
2.6.2.198.g614a2ac

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[PATCH v4 3/9] ARM: EXYNOS: Move pmu specific headers under "linux/soc/samsung"

[Pankaj Dubey]

Moving Exynos PMU specific header file into "include/linux/soc/samsung"
thus updated affected files under "mach-exynos" to use new location of
these header files.

Signed-off-by: Amit Daniel Kachhap 
Signed-off-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/exynos-pmu.h   |  24 -
 arch/arm/mach-exynos/exynos.c   |   2 +-
 arch/arm/mach-exynos/mcpm-exynos.c  |   2 +-
 arch/arm/mach-exynos/platsmp.c  |   2 +-
 arch/arm/mach-exynos/pm.c   |   4 +-
 arch/arm/mach-exynos/pmu.c  |   6 +-
 arch/arm/mach-exynos/regs-pmu.h | 693 
 arch/arm/mach-exynos/suspend.c  |   4 +-
 include/linux/soc/samsung/exynos-pmu.h  |  24 +
 include/linux/soc/samsung/exynos-regs-pmu.h | 693 
 10 files changed, 727 insertions(+), 727 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/exynos-pmu.h
 delete mode 100644 arch/arm/mach-exynos/regs-pmu.h
 create mode 100644 include/linux/soc/samsung/exynos-pmu.h
 create mode 100644 include/linux/soc/samsung/exynos-regs-pmu.h

diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
deleted file mode 100644
index a2ab0d5..000
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (c) 2014 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Header for EXYNOS PMU Driver support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __EXYNOS_PMU_H
-#define __EXYNOS_PMU_H
-
-enum sys_powerdown {
-   SYS_AFTR,
-   SYS_LPA,
-   SYS_SLEEP,
-   NUM_SYS_POWERDOWN,
-};
-
-extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
-
-#endif /* __EXYNOS_PMU_H */
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 4ffb90e..5d68ce8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -31,7 +32,6 @@
 
 #include "common.h"
 #include "mfc.h"
-#include "regs-pmu.h"
 
 void __iomem *pmu_base_addr;
 
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index 5697819..f086bf6 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -16,13 +16,13 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
 #include 
 
-#include "regs-pmu.h"
 #include "common.h"
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 98a2c0c..d5caf30 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -30,7 +31,6 @@
 #include 
 
 #include "common.h"
-#include "regs-pmu.h"
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 9c1506b..b9b9186 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
@@ -29,8 +31,6 @@
 #include 
 
 #include "common.h"
-#include "exynos-pmu.h"
-#include "regs-pmu.h"
 
 static inline void __iomem *exynos_boot_vector_addr(void)
 {
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 14ec1ff..227184b 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -17,10 +17,10 @@
 #include 
 #include 
 
-#include 
+#include 
+#include 
 
-#include "exynos-pmu.h"
-#include "regs-pmu.h"
+#include 
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
deleted file mode 100644
index 5e4f4c2..000
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ /dev/null
@@ -1,693 +0,0 @@
-/*
- * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS - Power management unit definition
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_PMU_H
-#define __ASM_ARCH_REGS_PMU_H __FILE__
-
-#define S5P_CENTRAL_SEQ_CONFIGURATION  0x0200
-
-#define S5P_CENTRAL_LOWPWR_CFG (1 << 16)
-
-#define S5P_CENTRAL_SEQ_OPTION 0x0208
-
-#define S5P_USE_STANDBY_WFI0   (1 << 16)
-#define S5P_USE_STANDBY_WFI1   (1 << 17)
-#define S5P_USE_STANDBY_WFI2   (1 << 19)
-#define S5P_USE_STANDBY_WFI3   (1 << 20)
-#define S5P_USE_STANDBY_WFE0   (1 << 24)
-#define 

[PATCH v4 1/9] ARM: EXYNOS: removing redundant code from regs-pmu.h

[Pankaj Dubey]

commit 6ec4f8d0d91f ("ARM: EXYNOS: add generic function to calculate
cpu number") introduced exynos_pmu_cpunr to be used by multi-cluster SoC's
e.g Exynos5420, but it's no more used in the codebase and hence removing
this part of code.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/pmu.c  | 1 +
 arch/arm/mach-exynos/regs-pmu.h | 9 -
 2 files changed, 1 insertion(+), 9 deletions(-)

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 5775154..64ea7d6 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 
+#include 
 
 #include "exynos-pmu.h"
 #include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index fba9068..5e4f4c2 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -484,15 +484,6 @@
 
 #define EXYNOS5420_SWRESET_KFC_SEL 0x3
 
-#include 
-#define MAX_CPUS_IN_CLUSTER4
-
-static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr)
-{
-   return ((MPIDR_AFFINITY_LEVEL(mpidr, 1) * MAX_CPUS_IN_CLUSTER)
-+ MPIDR_AFFINITY_LEVEL(mpidr, 0));
-}
-
 /* Only for EXYNOS5420 */
 #define EXYNOS5420_ISP_ARM_OPTION  0x2488
 #define EXYNOS5420_L2RSTDISABLE_VALUE  BIT(3)
-- 
2.4.5

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[PATCH v4 7/9] ARM: EXYNOS: split up exynos5420 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos5420,
PMU configuration data and functions handing data into exynos5420
SoC specific PMU file mach-exynos/exynos5420-pmu.c.

Signed-off-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/Makefile |   2 +-
 arch/arm/mach-exynos/exynos-pmu.h |   1 +
 arch/arm/mach-exynos/exynos5420-pmu.c | 280 ++
 arch/arm/mach-exynos/pmu.c| 263 ---
 4 files changed, 282 insertions(+), 264 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos5420-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bfb23a5..2d58063 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -11,7 +11,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
exynos3250-pmu.o exynos4-pmu.o \
-   exynos5250-pmu.o
+   exynos5250-pmu.o exynos5420-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index 003fa6d..306f5c7 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -38,6 +38,7 @@ extern const struct exynos_pmu_data exynos4210_pmu_data;
 extern const struct exynos_pmu_data exynos4212_pmu_data;
 extern const struct exynos_pmu_data exynos4412_pmu_data;
 extern const struct exynos_pmu_data exynos5250_pmu_data;
+extern const struct exynos_pmu_data exynos5420_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos5420-pmu.c 
b/arch/arm/mach-exynos/exynos5420-pmu.c
new file mode 100644
index 000..5810afe
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos5420-pmu.c
@@ -0,0 +1,280 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS5420 - CPU PMU (Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include "exynos-pmu.h"
+
+static struct exynos_pmu_conf exynos5420_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_ARM_CORE2_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_ARM_CORE3_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_ARM_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE1_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE2_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE2_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_CORE3_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_DIS_IRQ_KFC_CORE3_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5420_ARM_COMMON_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_COMMON_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_L2_SYS_PWR_REG,   { 0x0, 0x0, 0x0} },
+   { EXYNOS5420_KFC_L2_SYS_PWR_REG,   

[PATCH v4 5/9] ARM: EXYNOS: split up exynos4 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos4210,
exynos4412 and exynos4212 PMU configuration data and functions handing
data into a common exynos4 SoC specific PMU file mach-exynos/exynos4-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/Makefile  |   2 +-
 arch/arm/mach-exynos/exynos-pmu.h  |   3 +
 arch/arm/mach-exynos/exynos4-pmu.c | 223 +
 arch/arm/mach-exynos/pmu.c | 207 --
 4 files changed, 227 insertions(+), 208 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos4-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index e869f86..8969683 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o exynos4-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index 6f95c7d..c9cb31d 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -34,6 +34,9 @@ struct exynos_pmu_data {
 extern void __iomem *pmu_base_addr;
 /* list of all exported SoC specific data */
 extern const struct exynos_pmu_data exynos3250_pmu_data;
+extern const struct exynos_pmu_data exynos4210_pmu_data;
+extern const struct exynos_pmu_data exynos4212_pmu_data;
+extern const struct exynos_pmu_data exynos4412_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos4-pmu.c 
b/arch/arm/mach-exynos/exynos4-pmu.c
new file mode 100644
index 000..4b0a79e
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos4-pmu.c
@@ -0,0 +1,223 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS4 - CPU PMU(Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+
+#include "exynos-pmu.h"
+
+static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE0,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE1,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_COMMON_LOWPWR,{ 0x0, 0x0, 0x2 } },
+   { S5P_L2_0_LOWPWR,  { 0x2, 0x2, 0x3 } },
+   { S5P_L2_1_LOWPWR,  { 0x2, 0x2, 0x3 } },
+   { S5P_CMU_ACLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_APLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_MPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_VPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_EPLL_SYSCLK_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_GPSALIVE_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_CAM_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_TV_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_MFC_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_G3D_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD0_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD1_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_TV_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_LCD0_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_LCD1_LOWPWR,{ 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_MAUDIO_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x1, 0x0 } 

[PATCH v4 6/9] ARM: EXYNOS: split up exynos5250 SoC specific PMU data

[Pankaj Dubey]

This patch splits up mach-exynos/pmu.c file, and moves exynos5250,
PMU configuration data and functions handing data into exynos5250
SoC specific PMU file mach-exynos/exynos5250-pmu.c.

Signed-off-by: Pankaj Dubey 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/mach-exynos/Makefile |   4 +-
 arch/arm/mach-exynos/exynos-pmu.h |   1 +
 arch/arm/mach-exynos/exynos5250-pmu.c | 196 ++
 arch/arm/mach-exynos/pmu.c| 180 ---
 4 files changed, 200 insertions(+), 181 deletions(-)
 create mode 100644 arch/arm/mach-exynos/exynos5250-pmu.c

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8969683..bfb23a5 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,9 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o 
exynos3250-pmu.o exynos4-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
+   exynos3250-pmu.o exynos4-pmu.o \
+   exynos5250-pmu.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
index c9cb31d..003fa6d 100644
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ b/arch/arm/mach-exynos/exynos-pmu.h
@@ -37,6 +37,7 @@ extern const struct exynos_pmu_data exynos3250_pmu_data;
 extern const struct exynos_pmu_data exynos4210_pmu_data;
 extern const struct exynos_pmu_data exynos4212_pmu_data;
 extern const struct exynos_pmu_data exynos4412_pmu_data;
+extern const struct exynos_pmu_data exynos5250_pmu_data;
 
 extern void pmu_raw_writel(u32 val, u32 offset);
 extern u32 pmu_raw_readl(u32 offset);
diff --git a/arch/arm/mach-exynos/exynos5250-pmu.c 
b/arch/arm/mach-exynos/exynos5250-pmu.c
new file mode 100644
index 000..a6d4188
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos5250-pmu.c
@@ -0,0 +1,196 @@
+/*
+ * Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS5250 - CPU PMU (Power Management Unit) support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+
+#include "exynos-pmu.h"
+
+static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
+   { EXYNOS5_ARM_CORE0_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_CORE1_SYS_PWR_REG,{ 0x0, 0x0, 0x2} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_LOCAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ARM_CORE1_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
+   { EXYNOS5_FSYS_ARM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_FSYS_ARM_CENTRAL_SYS_PWR_REG, { 0x1, 0x1, 0x1} },
+   { EXYNOS5_ISP_ARM_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_LOCAL_SYS_PWR_REG,{ 0x0, 0x0, 0x0} },
+   { EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG,  { 0x0, 0x0, 0x0} },
+   { EXYNOS5_ARM_COMMON_SYS_PWR_REG,   { 0x0, 0x0, 0x2} },
+   { EXYNOS5_ARM_L2_SYS_PWR_REG,   { 0x3, 0x3, 0x3} },
+   { EXYNOS5_ARM_L2_OPTION,{ 0x10, 0x10, 0x0 } },
+   { EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_RESET_SYS_PWR_REG,{ 0x1, 0x1, 0x0} },
+   { EXYNOS5_CMU_ACLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_SCLKSTOP_SYSMEM_SYS_PWR_REG,  { 0x1, 0x0, 0x1} },
+   { EXYNOS5_CMU_RESET_SYSMEM_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
+   { EXYNOS5_DRAM_FREQ_DOWN_SYS_PWR_REG,   { 0x1, 0x1, 0x1} },
+   { EXYNOS5_DDRPHY_DLLOFF_SYS_PWR_REG,{ 0x1, 0x1, 0x1} },
+   { EXYNOS5_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1} },
+   { EXYNOS5_APLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_MPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_VPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_EPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x1, 0x0} },
+   { EXYNOS5_BPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_CPLL_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+   { EXYNOS5_MPLLUSER_SYSCLK_SYS_PWR_REG,  { 0x1, 0x0, 0x0} },
+  

[PATCH v4 8/9] ARM: EXYNOS: rearrange static and non-static functions of PMU driver

[Pankaj Dubey]

This patch moves exynos_sys_powerdown_conf function above all
static functions.

Signed-off-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/pmu.c | 34 +-
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index e01bdf1..f300ac9 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -39,23 +39,6 @@ u32 pmu_raw_readl(u32 offset)
return readl_relaxed(pmu_base_addr + offset);
 }
 
-static void exynos_power_off(void)
-{
-   unsigned int tmp;
-
-   pr_info("Power down.\n");
-   tmp = pmu_raw_readl(EXYNOS_PS_HOLD_CONTROL);
-   tmp ^= (1 << 8);
-   pmu_raw_writel(tmp, EXYNOS_PS_HOLD_CONTROL);
-
-   /* Wait a little so we don't give a false warning below */
-   mdelay(100);
-
-   pr_err("Power down failed, please power off system manually.\n");
-   while (1)
-   ;
-}
-
 void exynos_sys_powerdown_conf(enum sys_powerdown mode)
 {
unsigned int i;
@@ -85,6 +68,23 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
}
 }
 
+static void exynos_power_off(void)
+{
+   unsigned int tmp;
+
+   pr_info("Power down.\n");
+   tmp = pmu_raw_readl(EXYNOS_PS_HOLD_CONTROL);
+   tmp ^= (1 << 8);
+   pmu_raw_writel(tmp, EXYNOS_PS_HOLD_CONTROL);
+
+   /* Wait a little so we don't give a false warning below */
+   mdelay(100);
+
+   pr_err("Power down failed, please power off system manually.\n");
+   while (1)
+   ;
+}
+
 static int pmu_restart_notify(struct notifier_block *this,
unsigned long code, void *unused)
 {
-- 
2.4.5

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[PATCH v4 9/9] drivers: soc: Add support for Exynos PMU driver

[Pankaj Dubey]

This patch moves Exynos PMU driver implementation from "arm/mach-exynos"
to "drivers/soc/samsung". This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in "arch/arm/mach-exynos/pmu.c" but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.

This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.

Signed-off-by: Amit Daniel Kachhap 
Signed-off-by: Pankaj Dubey 
---
 arch/arm/mach-exynos/Kconfig  |   1 +
 arch/arm/mach-exynos/Makefile |   4 +-
 arch/arm/mach-exynos/exynos-pmu.h |  45 --
 arch/arm/mach-exynos/exynos3250-pmu.c | 175 -
 arch/arm/mach-exynos/exynos4-pmu.c| 223 ---
 arch/arm/mach-exynos/exynos5250-pmu.c | 196 
 arch/arm/mach-exynos/exynos5420-pmu.c | 280 --
 arch/arm/mach-exynos/pmu.c| 183 --
 drivers/soc/samsung/Kconfig   |   4 +
 drivers/soc/samsung/Makefile  |   4 +
 drivers/soc/samsung/exynos-pmu.c  | 183 ++
 drivers/soc/samsung/exynos-pmu.h  |  45 ++
 drivers/soc/samsung/exynos3250-pmu.c  | 175 +
 drivers/soc/samsung/exynos4-pmu.c | 223 +++
 drivers/soc/samsung/exynos5250-pmu.c  | 196 
 drivers/soc/samsung/exynos5420-pmu.c  | 280 ++
 16 files changed, 1112 insertions(+), 1105 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/exynos-pmu.h
 delete mode 100644 arch/arm/mach-exynos/exynos3250-pmu.c
 delete mode 100644 arch/arm/mach-exynos/exynos4-pmu.c
 delete mode 100644 arch/arm/mach-exynos/exynos5250-pmu.c
 delete mode 100644 arch/arm/mach-exynos/exynos5420-pmu.c
 delete mode 100644 arch/arm/mach-exynos/pmu.c
 create mode 100644 drivers/soc/samsung/exynos-pmu.c
 create mode 100644 drivers/soc/samsung/exynos-pmu.h
 create mode 100644 drivers/soc/samsung/exynos3250-pmu.c
 create mode 100644 drivers/soc/samsung/exynos4-pmu.c
 create mode 100644 drivers/soc/samsung/exynos5250-pmu.c
 create mode 100644 drivers/soc/samsung/exynos5420-pmu.c

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 83c85f5..874cb38 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
select ARM_GIC
select COMMON_CLK_SAMSUNG
select EXYNOS_THERMAL
+   select EXYNOS_PMU
select EXYNOS_SROM if PM
select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 2d58063..34d29df 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,9 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o \
-   exynos3250-pmu.o exynos4-pmu.o \
-   exynos5250-pmu.o exynos5420-pmu.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/arch/arm/mach-exynos/exynos-pmu.h
deleted file mode 100644
index 306f5c7..000
--- a/arch/arm/mach-exynos/exynos-pmu.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2015 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Header for EXYNOS PMU Driver support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __EXYNOS_PMU_H
-#define __EXYNOS_PMU_H
-
-#include 
-
-#define PMU_TABLE_END  (-1U)
-
-
-struct exynos_pmu_conf {
-   unsigned int offset;
-   u8 val[NUM_SYS_POWERDOWN];
-};
-
-struct exynos_pmu_data {
-   const struct exynos_pmu_conf *pmu_config;
-   const struct exynos_pmu_conf *pmu_config_extra;
-
-   void (*pmu_init)(void);
-   void (*powerdown_conf)(enum sys_powerdown);
-   void (*powerdown_conf_extra)(enum sys_powerdown);
-};
-
-extern void __iomem *pmu_base_addr;
-/* list of all exported SoC specific data */
-extern const struct exynos_pmu_data exynos3250_pmu_data;
-extern const struct exynos_pmu_data exynos4210_pmu_data;
-extern const struct exynos_pmu_data exynos4212_pmu_data;
-extern const struct exynos_pmu_data exynos4412_pmu_data;
-extern const struct exynos_pmu_data exynos5250_pmu_data;
-extern const struct exynos_pmu_data exynos5420_pmu_data;
-
-extern void pmu_raw_writel(u32 val, u32 offset);

Re: [PATCH v4] tests/exynos: add fimg2d performance analysis

[Hyungwon Hwang]

On Tue, 10 Nov 2015 14:23:51 +0100
Tobias Jakobi  wrote:

> Hello Hyungwon,
> 
> 
> Hyungwon Hwang wrote:
> > Hello Tobias,
> > 
> > On Mon, 09 Nov 2015 10:47:13 +0100
> > Tobias Jakobi  wrote:
> > 
> >> Hello Hyungwon,
> >>
> >>
> >> Hyungwon Hwang wrote:
> >>> Hello,
> >>>
> >>> I think this patch should update .gitignore, not for adding the
> >>> built binary to untracked file list.
> >> Thanks!
> >>
> >>
> >>> Also, I want to make clear about the purpose of this test program.
> >>> What do you want to get after this test? This program runs G2D
> >>> with randomly chosen number of pixel and shows the elapsed time
> >>> to do that. I run it on my board. But I could not find any
> >>> meaning of the test. If you just want to know the execution time
> >>> of solid fill, what about get the width and height from user and
> >>> run the same tests iteratively for more accurate result? Or at
> >>> least, increasing number of pixels?
> >> The test is to measure the dependency between amount of pixels the
> >> G2D has to process and the amount of time for the G2D to process
> >> such pixels.
> >>
> >> It's exactly what a performance test should do, measure the time it
> >> takes for a certain workload to complete.
> >>
> >> In particular the test wants to answer the question if the
> >> dependency stated above is of linear type.
> >>
> >> Of course it's not, since we have setup time, so at least it
> >> should be affine linear. But even that is not true, since you see
> >> subtle 'branching' when doing high density plots (that's why I
> >> added export of the data to Mathematica).
> >>
> >>
> >> What you ask for (user input) is in fact already implemented. The
> >> user can specify the buffer width and height, which in turn limits
> >> the size of the rectangle that is solid filled.
> >>
> >> If you want smaller rectangles filled, decrease buffer width and
> >> height, if you want bigger ones filled, increase.
> >>
> >>
> >> The second purpose is to stress test the G2D, as already indicated
> >> in the commit description. The G2D can be overclocked quite a lot
> >> under certain conditions. With increase MIF/INT voltages I can run
> >> it with 400MHz instead of the 200MHz defaults. The application can
> >> now be used to check stability. E.g. if voltages are too low the
> >> system can quickly lock-up.
> >>
> >> In particular one could also check how processing time depends on
> >> the clock rate of the G2D. One interesting question here is how
> >> memory bandwidth limits us.
> >>
> >>
> >>
> >> With best wishes,
> >> Tobias
> > 
> > Yes. I agree with the broad view. Please see the below, I run the
> > test 2 times in a row.
> > 
> > root@localhost:~# ./exynos_fimg2d_perf  -i 10 -w 1024 -h 1024   
> > exynos/fimg2d: G2D version (4.1).
> > starting simple G2D performance test
> > buffer width = 1024, buffer height = 1024, iterations = 10
> > num_pixels = 136000, usecs = 236000
> > num_pixels = 8492, usecs = 47083
> > num_pixels = 100688, usecs = 200042
> > num_pixels = 141312, usecs = 216667
> > num_pixels = 39962, usecs = 92708
> > num_pixels = 95046, usecs = 156542
> > num_pixels = 2562, usecs = 34666
> > num_pixels = 176485, usecs = 326916
> > num_pixels = 17760, usecs = 56625
> > num_pixels = 1625, usecs = 31833
> > starting multi G2D performance test (batch size = 3)
> > buffer width = 1024, buffer height = 1024, iterations = 10
> > num_pixels = 245180, usecs = 385083
> > num_pixels = 276320, usecs = 398625
> > num_pixels = 196807, usecs = 35
> > num_pixels = 305540, usecs = 420458
> > num_pixels = 65978, usecs = 120250
> > num_pixels = 265028, usecs = 379417
> > num_pixels = 139079, usecs = 213667
> > num_pixels = 24970, usecs = 67625
> > num_pixels = 46808, usecs = 114125
> > num_pixels = 100804, usecs = 179750
> > root@localhost:~# ./exynos_fimg2d_perf  -i 10 -w 1024 -h 1024 
> > exynos/fimg2d: G2D version (4.1).
> > starting simple G2D performance test
> > buffer width = 1024, buffer height = 1024, iterations = 10
> > num_pixels = 18676, usecs = 95541
> > num_pixels = 117056, usecs = 218875
> > num_pixels = 80784, usecs = 137209
> > num_pixels = 427, usecs = 33209
> > num_pixels = 238044, usecs = 403041
> > num_pixels = 4392, usecs = 37709
> > num_pixels = 19880, usecs = 59750
> > num_pixels = 3666, usecs = 36542
> > num_pixels = 4630, usecs = 36166
> > num_pixels = 70834, usecs = 125917
> > starting multi G2D performance test (batch size = 3)
> > buffer width = 1024, buffer height = 1024, iterations = 10
> > num_pixels = 216516, usecs = 347042
> > num_pixels = 242863, usecs = 422417
> > num_pixels = 28176, usecs = 72292
> > num_pixels = 110713, usecs = 179167
> > num_pixels = 292266, usecs = 431750
> > num_pixels = 274127, usecs = 392833
> > num_pixels = 291659, usecs = 415875
> > num_pixels = 140202, usecs = 218833
> > num_pixels = 122400, usecs = 193084
> > num_pixels = 168647, usecs = 251375
> > 
> > As you said, I can adjust the 

Re: [PATCH 09/13] exynos/fimg2d: add g2d_move

[Hyungwon Hwang]

Hello Tobias,

On Tue, 10 Nov 2015 14:24:11 +0100
Tobias Jakobi  wrote:

> Hello Hyungwon,
> 
> 
> Hyungwon Hwang wrote:
> > Hello Tobias,
> > 
> > On Mon, 09 Nov 2015 10:47:02 +0100
> > Tobias Jakobi  wrote:
> > 
> >> Hello Hyungwon,
> >>
> >>
> >> Hyungwon Hwang wrote:
> >>> Hello Tobias,
> >>>
> >>> I was in vacation last week, so I could run your code today. I
> >>> found that what g2d_move() does is actually copying not moving,
> >>> because the operation does not clear the previous area.
> >> I choose g2d_move() because we also have memcpy() and memmove() in
> >> libc. Like in libc 'moving' memory doesn't actually move it, like
> >> you would move a real object, since it's undefined what 'empty'
> >> memory should be.
> >>
> >> The same applies here. It's not defined what 'empty' areas of the
> >> buffer should be.
> >>
> >>
> >>> Would it be possible to
> >>> generalize g2d_copy() works better, so it could works well in case
> >>> of the src buffer and dst buffer being same.
> >> I think this would break g2d_copy() backward compatibility.
> >>
> >> I also want the user to explicitly request this. The user should
> >> make sure what requirements he has for the buffers in question.
> >> Are the buffers disjoint or not?
> >>
> >>
> >>> If it is possible, I think it
> >>> would be better way to do that. If it is not, at least chaning the
> >>> function name is needed. I tested it on my Odroid U3 board.
> >> I don't have a strong opinion on the naming. Any recommendations?
> >>
> >> I still think the naming is fine though, since it mirrors libc's
> >> naming. And the user is supposed to read the documentation anyway.
> > 
> >>
> >>
> >>
> >> With best wishes,
> >> Tobias
> > 
> > In that manner following glibc, I agree that the naming is
> > reasonable.
> well, that was just my way of thinking. But I guess most people have
> experience using the libc, so the naming should look at least
> 'familiar'.
> 
> 
> 
> > I commented like that previously, because at the first time when I
> > run the test, I think that the result seems like a bug. The test
> > program said that it was a move test, but the operation seemed
> > copying.
> Ok, so just that I understand this correctly. Your issue is with the
> commit the description of the test or with the commit description of
> the patch that introduces g2d_move()?
> 
> Because I don't see what you point out in the test commit description:
> 
> "
> tests/exynos: add test for g2d_move
> 
> To check if g2d_move() works properly we create a small checkerboard
> pattern in the center of the screen and then shift this pattern
> around with g2d_move(). The pattern should be properly preserved
> by the operation.
> "
> 
> I intentionally avoid to write "...move this pattern around...", so
> instead I choose "shift".
> 
> I'm not a native speaker, so I'm clueless how to formulate this in a
> more clear way.

I'm also not a native speaker, so maybe I could not figure out the
subtle difference between move and shift. I just thought that 'shift'
was just the synonym of 'move'.

> 
> 
> > It
> > would be just OK if it is well documented or printed when runs the
> > test that the test does not do anything about the previous area
> > intentionally.
> I could add solid fills of the 'empty' areas after each move()
> operation. Would that be more in line what you think the test should
> do?

No. Because g2d_move() is to g2d_copy() what memmove() is to memcpy(),
the current implementation seems enough.

What about change 'move' to 'copy' in the function description?

* g2d_move - copy content inside single buffer.
* Similar to 'memmove' this copies a rectangular region
* of the provided buffer to another location (the source
* and destination region potentially overlapping)

Best regards,
Hyungwon Hwang

> 
> 
> With best wishes,
> Tobias
> 
> 
> 
> 
> > 
> > 
> > BRs,
> > Hyungwon Hwang
> > 
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RE: [PATCH v7 1/4] Documentation: dt-bindings: Describe SROMc configuration

[Pavel Fedin]

 Hello!

> > +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
> > +following order: Tacp, Tcah, Tcoh, Tacc, Tcos, 
> > Tacs.
> > +Each value is specified in cycles and has the 
> > following
> > +meaning and valid range:
> > +Tacp : Page mode access cycle at Page mode (0 - 15)
> > +Tcah : Address holding time after CSn (0 - 15)
> > +Tcoh : Chip selection hold on OEn (0 - 15)
> > +Tacc : Access cycle (0 - 31, the actual time is N 
> > + 1)
> > +Tcos : Chip selection set-up before OEn (0 - 15)
> > +Tacs : Address set-up before CSn (0 - 15)
> 
> This is not easily extended. Perhaps a property per value instead.

 We had a discussion with Krzysztof about it, he agreed with this form of the 
property.
My concern was that it's just too much typing, and makes little sense because 
these
settings always go together. If register layout changes, or parameter set 
changes in
incompatible way, then it's another device, not exynos-srom anymore.
 So would you agree with that, or is your position strong?

> > compatible = "samsung,exynos-srom";
> > -   reg = <0x1257 0x10>;
> > +   reg = <0x1257 0x14>;
> > +
> > +   ethernet@3 {
> > +   compatible = "smsc,lan9115";
> > +   reg = <3 0 0x1>;   // Bank 3, offset = 0
> > +   phy-mode = "mii";
> > +   interrupt-parent = <>;
> > +   interrupts = <5 8>;
> > +   reg-io-width = <2>;
> > +   smsc,irq-push-pull;
> > +   smsc,force-internal-phy;
> > +
> > +   samsung,srom-config = <1 9 12 1 9 1 1>;
> 
> This doesn't match the doc.

 Damn, overlooked. :(

Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia

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Re: [PATCH v7 1/4] Documentation: dt-bindings: Describe SROMc configuration

[Rob Herring]

On Fri, Nov 6, 2015 at 4:03 AM, Pavel Fedin  wrote:
> Add documentation for new subnode properties, allowing bank configuration.
> Based on u-boot implementation, but heavily reworked.
>
> Also, fix size of SROMc mapping in the example.
>
> Signed-off-by: Pavel Fedin 
> Reviewed-by: Krzysztof Kozlowski 
> ---
>  .../bindings/arm/samsung/exynos-srom.txt   | 71 
> +-
>  1 file changed, 69 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt 
> b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> index 33886d5..3ff2950 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt
> @@ -5,8 +5,75 @@ Required properties:
>
>  - reg: offset and length of the register set
>
> -Example:
> +Optional properties:
> +The SROM controller can be used to attach external peripherals. In this case
> +extra properties, describing the bus behind it, should be specified as below:
> +
> +- #address-cells: Must be set to 2 to allow memory address translation

2 is for CS# and offset.

> +
> +- #size-cells: Must be set to 1 to allow CS address passing

size is the size, not the address.

> +
> +- ranges: Must be set up to reflect the memory layout with four integer 
> values
> + per bank:
> +0  

s/physical/parent/

You could have another level of translation above for the parent.

> +
> +Sub-nodes:
> +The actual device nodes should be added as subnodes to the SROMc node. These
> +subnodes, except regular device specification, should contain the following
> +properties, describing configuration of the relevant SROM bank:
> +
> +Required properties:
> +- reg: bank number, base address (relative to start of the bank) and size of
> +   the memory mapped for the device. Note that base address will be
> +   typically 0 as this is the start of the bank.
> +
> +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
> +following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
> +Each value is specified in cycles and has the 
> following
> +meaning and valid range:
> +Tacp : Page mode access cycle at Page mode (0 - 15)
> +Tcah : Address holding time after CSn (0 - 15)
> +Tcoh : Chip selection hold on OEn (0 - 15)
> +Tacc : Access cycle (0 - 31, the actual time is N + 
> 1)
> +Tcos : Chip selection set-up before OEn (0 - 15)
> +Tacs : Address set-up before CSn (0 - 15)

This is not easily extended. Perhaps a property per value instead.

> +
> +Optional properties:
> +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is 
> used.
> +
> +- samsung,srom-page-mode : page mode configuration for the bank:
> +  0 - normal (one data)
> +  1 - four data
> +  If omitted, default of 0 is used.
> +
> +Example: basic definition, no banks are configured
> +   sromc@1257 {
> +   compatible = "samsung,exynos-srom";
> +   reg = <0x1257 0x14>;
> +   };
> +
> +Example: SROMc with SMSC911x ethernet chip on bank 3
> sromc@1257 {
> +   #address-cells = <2>;
> +   #size-cells = <1>;
> +   ranges = <0 0 0x0400 0x2   // Bank0
> + 1 0 0x0500 0x2   // Bank1
> + 2 0 0x0600 0x2   // Bank2
> + 3 0 0x0700 0x2>; // Bank3
> +
> compatible = "samsung,exynos-srom";
> -   reg = <0x1257 0x10>;
> +   reg = <0x1257 0x14>;
> +
> +   ethernet@3 {
> +   compatible = "smsc,lan9115";
> +   reg = <3 0 0x1>;   // Bank 3, offset = 0
> +   phy-mode = "mii";
> +   interrupt-parent = <>;
> +   interrupts = <5 8>;
> +   reg-io-width = <2>;
> +   smsc,irq-push-pull;
> +   smsc,force-internal-phy;
> +
> +   samsung,srom-config = <1 9 12 1 9 1 1>;

This doesn't match the doc.

> +   };
> };
> --
> 2.4.4
>
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[PATCH 17/25] drm/exynos: fix clipping when scalling is enabled

[Marek Szyprowski]

This patch fixes calculation of src x/y offset for negative crtc x/y
values when scalling is enabled. This fixes possible IOMMU fault when
scalling is enabled.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index e5af4cd5e287..348bcec30489 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -85,25 +85,26 @@ static void exynos_plane_mode_set(struct 
exynos_drm_plane_state *exynos_state)
src_w = state->src_w >> 16;
src_h = state->src_h >> 16;
 
+   /* set ratio */
+   exynos_state->h_ratio = (src_w << 16) / crtc_w;
+   exynos_state->v_ratio = (src_h << 16) / crtc_h;
+
+   /* clip to visible area */
actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
 
if (crtc_x < 0) {
if (actual_w)
-   src_x -= crtc_x;
+   src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
crtc_x = 0;
}
 
if (crtc_y < 0) {
if (actual_h)
-   src_y -= crtc_y;
+   src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
crtc_y = 0;
}
 
-   /* set ratio */
-   exynos_state->h_ratio = (src_w << 16) / crtc_w;
-   exynos_state->v_ratio = (src_h << 16) / crtc_h;
-
/* set drm framebuffer data. */
exynos_state->src.x = src_x;
exynos_state->src.y = src_y;
-- 
1.9.2

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Re: [PATCH 09/13] exynos/fimg2d: add g2d_move

[Tobias Jakobi]

Hello Hyungwon,


Hyungwon Hwang wrote:
> Hello Tobias,
> 
> On Mon, 09 Nov 2015 10:47:02 +0100
> Tobias Jakobi  wrote:
> 
>> Hello Hyungwon,
>>
>>
>> Hyungwon Hwang wrote:
>>> Hello Tobias,
>>>
>>> I was in vacation last week, so I could run your code today. I found
>>> that what g2d_move() does is actually copying not moving, because
>>> the operation does not clear the previous area.
>> I choose g2d_move() because we also have memcpy() and memmove() in
>> libc. Like in libc 'moving' memory doesn't actually move it, like you
>> would move a real object, since it's undefined what 'empty' memory
>> should be.
>>
>> The same applies here. It's not defined what 'empty' areas of the
>> buffer should be.
>>
>>
>>> Would it be possible to
>>> generalize g2d_copy() works better, so it could works well in case
>>> of the src buffer and dst buffer being same.
>> I think this would break g2d_copy() backward compatibility.
>>
>> I also want the user to explicitly request this. The user should make
>> sure what requirements he has for the buffers in question. Are the
>> buffers disjoint or not?
>>
>>
>>> If it is possible, I think it
>>> would be better way to do that. If it is not, at least chaning the
>>> function name is needed. I tested it on my Odroid U3 board.
>> I don't have a strong opinion on the naming. Any recommendations?
>>
>> I still think the naming is fine though, since it mirrors libc's
>> naming. And the user is supposed to read the documentation anyway.
> 
>>
>>
>>
>> With best wishes,
>> Tobias
> 
> In that manner following glibc, I agree that the naming is reasonable.
well, that was just my way of thinking. But I guess most people have
experience using the libc, so the naming should look at least 'familiar'.



> I commented like that previously, because at the first time when I run
> the test, I think that the result seems like a bug. The test program
> said that it was a move test, but the operation seemed copying.
Ok, so just that I understand this correctly. Your issue is with the
commit the description of the test or with the commit description of the
patch that introduces g2d_move()?

Because I don't see what you point out in the test commit description:

"
tests/exynos: add test for g2d_move

To check if g2d_move() works properly we create a small checkerboard
pattern in the center of the screen and then shift this pattern
around with g2d_move(). The pattern should be properly preserved
by the operation.
"

I intentionally avoid to write "...move this pattern around...", so
instead I choose "shift".

I'm not a native speaker, so I'm clueless how to formulate this in a
more clear way.


> It
> would be just OK if it is well documented or printed when runs the test
> that the test does not do anything about the previous area
> intentionally.
I could add solid fills of the 'empty' areas after each move()
operation. Would that be more in line what you think the test should do?


With best wishes,
Tobias




> 
> 
> BRs,
> Hyungwon Hwang
> 
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[PATCH 21/25] drm/exynos: gem: remove old unused prototypes

[Marek Szyprowski]

This patch removes old, unused function prototypes from exynos_drm_gem.h.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_gem.h | 28 
 1 file changed, 28 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h 
b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index 37ab8b282db6..9ca5047959ec 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -55,8 +55,6 @@ struct exynos_drm_gem {
struct sg_table *sgt;
 };
 
-struct page **exynos_gem_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
-
 /* destroy a buffer with gem object */
 void exynos_drm_gem_destroy(struct exynos_drm_gem *exynos_gem);
 
@@ -91,10 +89,6 @@ void exynos_drm_gem_put_dma_addr(struct drm_device *dev,
unsigned int gem_handle,
struct drm_file *filp);
 
-/* map user space allocated by malloc to pages. */
-int exynos_drm_gem_userptr_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
 /* get buffer information to memory region allocated by gem. */
 int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data,
  struct drm_file *file_priv);
@@ -123,28 +117,6 @@ int exynos_drm_gem_fault(struct vm_area_struct *vma, 
struct vm_fault *vmf);
 /* set vm_flags and we can change the vm attribute to other one at here. */
 int exynos_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
 
-static inline int vma_is_io(struct vm_area_struct *vma)
-{
-   return !!(vma->vm_flags & (VM_IO | VM_PFNMAP));
-}
-
-/* get a copy of a virtual memory region. */
-struct vm_area_struct *exynos_gem_get_vma(struct vm_area_struct *vma);
-
-/* release a userspace virtual memory area. */
-void exynos_gem_put_vma(struct vm_area_struct *vma);
-
-/* get pages from user space. */
-int exynos_gem_get_pages_from_userptr(unsigned long start,
-   unsigned int npages,
-   struct page **pages,
-   struct vm_area_struct *vma);
-
-/* drop the reference to pages. */
-void exynos_gem_put_pages_to_userptr(struct page **pages,
-   unsigned int npages,
-   struct vm_area_struct *vma);
-
 /* map sgt with dma region. */
 int exynos_gem_map_sgt_with_dma(struct drm_device *drm_dev,
struct sg_table *sgt,
-- 
1.9.2

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[PATCH 24/25] drm/exynos: add generic plane rotation property support

[Marek Szyprowski]

This patch adds generic plane rotation property for all supported
drivers. This has been implemented with additional help from Exynos IPP
(Exynos Image Post-Processing subsystem) with temporary framebuffers.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/Kconfig|   8 +
 drivers/gpu/drm/exynos/Makefile   |   1 +
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |   8 +
 drivers/gpu/drm/exynos/exynos_drm_ipp.c   | 151 ++-
 drivers/gpu/drm/exynos/exynos_drm_ipp.h   |   4 +
 drivers/gpu/drm/exynos/exynos_drm_plane.c |  22 ++-
 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c | 263 ++
 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h |  69 +++
 8 files changed, 523 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 83efca941388..e7d414aefbdc 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -104,6 +104,14 @@ config DRM_EXYNOS_IPP
help
  Choose this option if you want to use IPP feature for DRM.
 
+config DRM_EXYNOS_PLANE_IPP
+   depends on DRM_EXYNOS_IPP
+   bool "Use IPP framework for implementing unsupported plane properties"
+   help
+ Choose this option if you want to let IPP framework to provide plane
+ properties (like rotation, overlay scaling and more pixel formats),
+ which are not supported by hardware CRTC drivers.
+
 config DRM_EXYNOS_FIMC
bool "FIMC"
depends on DRM_EXYNOS_IPP && MFD_SYSCON
diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile
index 6496532aaa91..92c3f7cac7a9 100644
--- a/drivers/gpu/drm/exynos/Makefile
+++ b/drivers/gpu/drm/exynos/Makefile
@@ -19,6 +19,7 @@ exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)   += exynos_hdmi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)+= exynos_drm_vidi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_G2D) += exynos_drm_g2d.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_IPP) += exynos_drm_ipp.o
+exynosdrm-$(CONFIG_DRM_EXYNOS_PLANE_IPP)   += exynos_drm_plane_ipp.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_FIMC)+= exynos_drm_fimc.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_ROTATOR) += exynos_drm_rotator.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_GSC) += exynos_drm_gsc.o
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 0890e6709f10..1d6b25330686 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -72,6 +72,12 @@ struct exynos_drm_plane_state {
unsigned int h_ratio;
unsigned int v_ratio;
struct drm_framebuffer *fb;
+   unsigned int rotation;
+
+   unsigned int ipp_needed;
+   struct exynos_drm_rect ipp_src;
+   struct exynos_drm_rect ipp_dst;
+   struct drm_framebuffer *ipp_fb;
 };
 
 static inline struct exynos_drm_plane_state *
@@ -95,6 +101,8 @@ struct exynos_drm_plane {
const struct exynos_drm_plane_config *config;
unsigned int zpos;
struct drm_framebuffer *pending_fb;
+   struct drm_framebuffer *ipp_cur_fb;
+   struct drm_framebuffer *ipp_next_fb;
 };
 
 #define EXYNOS_DRM_PLANE_CAP_DOUBLE_X  (1 << 0)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c 
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 44a6689e0f4c..89d1c4371d39 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -20,6 +20,7 @@
 #include 
 #include 
 #include "exynos_drm_drv.h"
+#include "exynos_drm_fb.h"
 #include "exynos_drm_gem.h"
 #include "exynos_drm_ipp.h"
 #include "exynos_drm_iommu.h"
@@ -1513,7 +1514,7 @@ static int ipp_send_event(struct exynos_drm_ippdrv 
*ippdrv,
 
spin_lock_irqsave(_dev->event_lock, flags);
list_move_tail(>base.link, >base.file_priv->event_list);
-   wake_up_interruptible(>base.file_priv->event_wait);
+   wake_up(>base.file_priv->event_wait);
spin_unlock_irqrestore(_dev->event_lock, flags);
mutex_unlock(_node->event_lock);
 
@@ -1579,6 +1580,154 @@ err_completion:
complete(_node->start_complete);
 }
 
+static struct drm_exynos_ipp_mem_node
+   *ipp_get_internal_mem_node(struct drm_device *drm_dev,
+   struct drm_exynos_ipp_cmd_node *c_node,
+   __u32 prop_id, enum drm_exynos_ops_id ops_id,
+   struct drm_framebuffer *fb)
+{
+   struct drm_exynos_ipp_mem_node *m_node;
+   struct drm_exynos_ipp_buf_info *buf_info;
+
+   m_node = kzalloc(sizeof(*m_node), GFP_KERNEL);
+   if (!m_node)
+   return ERR_PTR(-ENOMEM);
+
+   buf_info = _node->buf_info;
+
+   m_node->ops_id = ops_id;
+   m_node->prop_id = prop_id;
+   INIT_LIST_HEAD(_node->list);
+
+   DRM_DEBUG_KMS("m_node[0x%x]ops_id[%d]prop_id[%d]\n", (int)m_node, 

[PATCH 10/25] drm/exynos: move dma_addr attribute from exynos plane to exynos fb

[Marek Szyprowski]

DMA address is a framebuffer attribute and the right place for it is
exynos_drm_framebuffer not exynos_drm_plane. This patch also introduces
helper function for getting dma address of the given framebuffer.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 13 -
 drivers/gpu/drm/exynos/exynos7_drm_decon.c| 16 +---
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |  3 ---
 drivers/gpu/drm/exynos/exynos_drm_fb.c| 16 ++--
 drivers/gpu/drm/exynos/exynos_drm_fb.h|  3 +--
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 10 ++
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 18 --
 drivers/gpu/drm/exynos/exynos_drm_vidi.c  |  5 -
 drivers/gpu/drm/exynos/exynos_mixer.c |  7 ---
 9 files changed, 38 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index fbe1b3174f75..a3161b0428b9 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -21,6 +21,7 @@
 
 #include "exynos_drm_drv.h"
 #include "exynos_drm_crtc.h"
+#include "exynos_drm_fb.h"
 #include "exynos_drm_plane.h"
 #include "exynos_drm_iommu.h"
 
@@ -261,9 +262,11 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 {
struct decon_context *ctx = crtc->ctx;
struct drm_plane_state *state = plane->base.state;
+   struct drm_framebuffer *fb = state->fb;
unsigned int win = plane->zpos;
-   unsigned int bpp = state->fb->bits_per_pixel >> 3;
-   unsigned int pitch = state->fb->pitches[0];
+   unsigned int bpp = fb->bits_per_pixel >> 3;
+   unsigned int pitch = fb->pitches[0];
+   dma_addr_t dma_addr = exynos_drm_fb_dma_addr(fb, 0);
u32 val;
 
if (test_bit(BIT_SUSPENDED, >flags))
@@ -284,9 +287,9 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
VIDOSD_Wx_ALPHA_B_F(0x0);
writel(val, ctx->addr + DECON_VIDOSDxD(win));
 
-   writel(plane->dma_addr[0], ctx->addr + DECON_VIDW0xADD0B0(win));
+   writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
 
-   val = plane->dma_addr[0] + pitch * plane->crtc_h;
+   val = dma_addr + pitch * plane->crtc_h;
writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
 
if (ctx->out_type != IFTYPE_HDMI)
@@ -297,7 +300,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
| BIT_VAL(plane->crtc_w * bpp, 14, 0);
writel(val, ctx->addr + DECON_VIDW0xADD2(win));
 
-   decon_win_set_pixfmt(ctx, win, state->fb);
+   decon_win_set_pixfmt(ctx, win, fb);
 
/* window enable */
decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index d50c26a41e09..15e1e165020f 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -30,6 +30,7 @@
 #include "exynos_drm_crtc.h"
 #include "exynos_drm_plane.h"
 #include "exynos_drm_drv.h"
+#include "exynos_drm_fb.h"
 #include "exynos_drm_fbdev.h"
 #include "exynos_drm_iommu.h"
 
@@ -400,13 +401,14 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 {
struct decon_context *ctx = crtc->ctx;
struct drm_plane_state *state = plane->base.state;
+   struct drm_framebuffer *fb = state->fb;
int padding;
unsigned long val, alpha;
unsigned int last_x;
unsigned int last_y;
unsigned int win = plane->zpos;
-   unsigned int bpp = state->fb->bits_per_pixel >> 3;
-   unsigned int pitch = state->fb->pitches[0];
+   unsigned int bpp = fb->bits_per_pixel >> 3;
+   unsigned int pitch = fb->pitches[0];
 
if (ctx->suspended)
return;
@@ -422,14 +424,14 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 */
 
/* buffer start address */
-   val = (unsigned long)plane->dma_addr[0];
+   val = (unsigned long)exynos_drm_fb_dma_addr(fb, 0);
writel(val, ctx->regs + VIDW_BUF_START(win));
 
-   padding = (pitch / bpp) - state->fb->width;
+   padding = (pitch / bpp) - fb->width;
 
/* buffer size */
-   writel(state->fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
-   writel(state->fb->height, ctx->regs + VIDW_WHOLE_Y(win));
+   writel(fb->width + padding, ctx->regs + VIDW_WHOLE_X(win));
+   writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
 
/* offset from the start of the buffer to read */
writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
@@ -471,7 +473,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
 
writel(alpha, ctx->regs + VIDOSD_D(win));
 
-   decon_win_set_pixfmt(ctx, win, state->fb);
+   decon_win_set_pixfmt(ctx, win, fb);
 

[PATCH 05/25] drm/exynos: gsc: add device tree support and remove usage of static mappings

[Marek Szyprowski]

This patch adds device tree support for exynos_drm_gsc. This patch
also fixed build issue on non-Exynos platforms, thus dependency on
!ARCH_MULTIPLATFORM can be now removed. The driver cannot be used
simultaneously with V4L2 Mem2Mem GScaller driver thought.

Signed-off-by: Seung-Woo Kim 
[updated commit message, removed the need for wb-lcd property, because
all gscallers have support for lcd writeback, replaced dependency on
!ARCH_MULTIPLATFORM with !VIDEO_SAMSUNG_EXYNOS_GSC]
Signed-off-by: Marek Szyprowski 
---
 .../devicetree/bindings/media/exynos5-gsc.txt  |  4 +++
 drivers/gpu/drm/exynos/Kconfig |  2 +-
 drivers/gpu/drm/exynos/exynos_drm_gsc.c| 30 +++---
 drivers/gpu/drm/exynos/regs-gsc.h  |  4 +--
 4 files changed, 33 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/exynos5-gsc.txt 
b/Documentation/devicetree/bindings/media/exynos5-gsc.txt
index 0604d42f38d1..5fe9372abb37 100644
--- a/Documentation/devicetree/bindings/media/exynos5-gsc.txt
+++ b/Documentation/devicetree/bindings/media/exynos5-gsc.txt
@@ -7,6 +7,10 @@ Required properties:
 - reg: should contain G-Scaler physical address location and length.
 - interrupts: should contain G-Scaler interrupt number
 
+Optional properties:
+- samsung,sysreg: handle to syscon used to control the system registers to
+  set writeback input and destination
+
 Example:
 
 gsc_0:  gsc@0x13e0 {
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 96e86cf4455b..83efca941388 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -118,7 +118,7 @@ config DRM_EXYNOS_ROTATOR
 
 config DRM_EXYNOS_GSC
bool "GScaler"
-   depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !ARCH_MULTIPLATFORM
+   depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !VIDEO_SAMSUNG_EXYNOS_GSC
help
  Choose this option if you want to use Exynos GSC for DRM.
 
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c 
b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index ed55d37b6330..7aecd23cfa11 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -15,7 +15,8 @@
 #include 
 #include 
 #include 
-#include 
+#include 
+#include 
 
 #include 
 #include 
@@ -126,6 +127,7 @@ struct gsc_capability {
  * @ippdrv: prepare initialization using ippdrv.
  * @regs_res: register resources.
  * @regs: memory mapped io registers.
+ * @sysreg: handle to SYSREG block regmap.
  * @lock: locking of operations.
  * @gsc_clk: gsc gate clock.
  * @sc: scaler infomations.
@@ -138,6 +140,7 @@ struct gsc_context {
struct exynos_drm_ippdrvippdrv;
struct resource *regs_res;
void __iomem*regs;
+   struct regmap   *sysreg;
struct mutexlock;
struct clk  *gsc_clk;
struct gsc_scaler   sc;
@@ -437,9 +440,12 @@ static int gsc_sw_reset(struct gsc_context *ctx)
 
 static void gsc_set_gscblk_fimd_wb(struct gsc_context *ctx, bool enable)
 {
-   u32 gscblk_cfg;
+   unsigned int gscblk_cfg;
 
-   gscblk_cfg = readl(SYSREG_GSCBLK_CFG1);
+   if (!ctx->sysreg)
+   return;
+
+   regmap_read(ctx->sysreg, SYSREG_GSCBLK_CFG1, _cfg);
 
if (enable)
gscblk_cfg |= GSC_BLK_DISP1WB_DEST(ctx->id) |
@@ -448,7 +454,7 @@ static void gsc_set_gscblk_fimd_wb(struct gsc_context *ctx, 
bool enable)
else
gscblk_cfg |= GSC_BLK_PXLASYNC_LO_MASK_WB(ctx->id);
 
-   writel(gscblk_cfg, SYSREG_GSCBLK_CFG1);
+   regmap_write(ctx->sysreg, SYSREG_GSCBLK_CFG1, gscblk_cfg);
 }
 
 static void gsc_handle_irq(struct gsc_context *ctx, bool enable,
@@ -1663,6 +1669,15 @@ static int gsc_probe(struct platform_device *pdev)
if (!ctx)
return -ENOMEM;
 
+   if (dev->of_node) {
+   ctx->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,
+   "samsung,sysreg");
+   if (IS_ERR(ctx->sysreg)) {
+   dev_warn(dev, "failed to get system register.\n");
+   ctx->sysreg = NULL;
+   }
+   }
+
/* clock control */
ctx->gsc_clk = devm_clk_get(dev, "gscl");
if (IS_ERR(ctx->gsc_clk)) {
@@ -1796,6 +1811,12 @@ static const struct dev_pm_ops gsc_pm_ops = {
SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL)
 };
 
+static const struct of_device_id exynos_drm_gsc_of_match[] = {
+   { .compatible = "samsung,exynos5-gsc" },
+   { },
+};
+MODULE_DEVICE_TABLE(of, exynos_drm_gsc_of_match);
+
 struct platform_driver gsc_driver = {
.probe  = gsc_probe,
.remove = gsc_remove,
@@ -1803,6 +1824,7 @@ struct platform_driver gsc_driver = {
.name   = "exynos-drm-gsc",
.owner  = THIS_MODULE,

[PATCH 09/25] drm/exynos: exynos7-decon: remove excessive check

[Marek Szyprowski]

Display area is already checked by exynos plane core, so there is no
need for such check in driver code.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index ead2b16e237d..d50c26a41e09 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -399,7 +399,6 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_plane *plane)
 {
struct decon_context *ctx = crtc->ctx;
-   struct drm_display_mode *mode = >base.state->adjusted_mode;
struct drm_plane_state *state = plane->base.state;
int padding;
unsigned long val, alpha;
@@ -441,15 +440,6 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
plane->crtc_w, plane->crtc_h);
 
-   /*
-* OSD position.
-* In case the window layout goes of LCD layout, DECON fails.
-*/
-   if ((plane->crtc_x + plane->crtc_w) > mode->hdisplay)
-   plane->crtc_x = mode->hdisplay - plane->crtc_w;
-   if ((plane->crtc_y + plane->crtc_h) > mode->vdisplay)
-   plane->crtc_y = mode->vdisplay - plane->crtc_h;
-
val = VIDOSDxA_TOPLEFT_X(plane->crtc_x) |
VIDOSDxA_TOPLEFT_Y(plane->crtc_y);
writel(val, ctx->regs + VIDOSD_A(win));
-- 
1.9.2

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[PATCH 03/25] drm/exynos: gsc: prepare and unprepare gsc clock

[Marek Szyprowski]

From: Seung-Woo Kim 

Ths patch changes the clk_enable and clk_disable call in gsc driver
into clk_prepare_enable and clk_disable_unprepare.

Signed-off-by: Seung-Woo Kim 
Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_gsc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c 
b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 11b87d2a7913..72a9c84e06b6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -1215,10 +1215,10 @@ static int gsc_clk_ctrl(struct gsc_context *ctx, bool 
enable)
DRM_DEBUG_KMS("enable[%d]\n", enable);
 
if (enable) {
-   clk_enable(ctx->gsc_clk);
+   clk_prepare_enable(ctx->gsc_clk);
ctx->suspended = false;
} else {
-   clk_disable(ctx->gsc_clk);
+   clk_disable_unprepare(ctx->gsc_clk);
ctx->suspended = true;
}
 
-- 
1.9.2

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[PATCH 02/25] ARM: dts: exynos542x: add rotator node

[Marek Szyprowski]

This patch adds device node for Rotator device to Exynos 542x device
tree file.

Signed-off-by: Marek Szyprowski 
---
 arch/arm/boot/dts/exynos5420.dtsi | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 1b3d6c769a3c..48a0a55314f5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -717,6 +717,15 @@
iommus = <_tv>;
};
 
+   rotator: rotator@11C0 {
+   compatible = "samsung,exynos5250-rotator";
+   reg = <0x11C0 0x64>;
+   interrupts = <0 84 0>;
+   clocks = < CLK_ROTATOR>;
+   clock-names = "rotator";
+   iommus = <_rotator>;
+   };
+
gsc_0: video-scaler@13e0 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e0 0x1000>;
@@ -1059,6 +1068,16 @@
#iommu-cells = <0>;
};
 
+   sysmmu_rotator: sysmmu@0x11D4 {
+   compatible = "samsung,exynos-sysmmu";
+   reg = <0x11D4 0x1000>;
+   interrupt-parent = <>;
+   interrupts = <4 0>;
+   clock-names = "sysmmu", "master";
+   clocks = < CLK_SMMU_ROTATOR>, < CLK_ROTATOR>;
+   #iommu-cells = <0>;
+   };
+
sysmmu_jpeg0: sysmmu@0x11F1 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F1 0x1000>;
-- 
1.9.2

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[PATCH 07/25] drm/exynos: fix to calculate offset of each plane for ipp gsc

[Marek Szyprowski]

From: Seung-Woo Kim 

NV12 and YUV420 formats are needed to calculate offset of each plane
in a gem buffer for ipp gsc. Without proper offset, only Y plane
can be processed, so result shows green frame. This patch fixes to
calculate offset for cbcr planes for NV12 and YUV420 formats.

Signed-off-by: Seung-Woo Kim 
Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_gsc.c | 116 
 1 file changed, 116 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c 
b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 7aecd23cfa11..2882b9347cc8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -486,6 +486,98 @@ static void gsc_handle_irq(struct gsc_context *ctx, bool 
enable,
gsc_write(cfg, GSC_IRQ);
 }
 
+static int gsc_set_planar_addr(struct drm_exynos_ipp_buf_info *buf_info,
+   u32 fmt, struct drm_exynos_sz *sz)
+{
+   dma_addr_t *base[EXYNOS_DRM_PLANAR_MAX];
+   uint64_t size[EXYNOS_DRM_PLANAR_MAX];
+   uint64_t ofs[EXYNOS_DRM_PLANAR_MAX];
+   bool bypass = false;
+   uint64_t tsize = 0;
+   int i;
+
+   for_each_ipp_planar(i) {
+   base[i] = _info->base[i];
+   size[i] = buf_info->size[i];
+   ofs[i] = 0;
+   tsize += size[i];
+   DRM_DEBUG_KMS("base[%d][0x%lx]s[%d][%llu]\n",
+   i, (unsigned long)*base[i], i, size[i]);
+   }
+
+   if (!tsize) {
+   DRM_INFO("failed to get buffer size.\n");
+   return 0;
+   }
+
+   switch (fmt) {
+   case DRM_FORMAT_NV12:
+   case DRM_FORMAT_NV21:
+   case DRM_FORMAT_NV16:
+   case DRM_FORMAT_NV61:
+   ofs[0] = sz->hsize * sz->vsize;
+   ofs[1] = ofs[0] >> 1;
+   if (*base[0] && *base[1]) {
+   if (size[0] + size[1] < ofs[0] + ofs[1])
+   goto err_info;
+   bypass = true;
+   }
+   break;
+   case DRM_FORMAT_YUV410:
+   case DRM_FORMAT_YVU410:
+   case DRM_FORMAT_YUV411:
+   case DRM_FORMAT_YVU411:
+   case DRM_FORMAT_YUV420:
+   case DRM_FORMAT_YVU420:
+   case DRM_FORMAT_YUV422:
+   case DRM_FORMAT_YVU422:
+   case DRM_FORMAT_YUV444:
+   case DRM_FORMAT_YVU444:
+   ofs[0] = sz->hsize * sz->vsize;
+   ofs[1] = ofs[2] = ofs[0] >> 2;
+   if (*base[0] && *base[1] && *base[2]) {
+   if (size[0]+size[1]+size[2] < ofs[0]+ofs[1]+ofs[2])
+   goto err_info;
+   bypass = true;
+   }
+   break;
+   case DRM_FORMAT_XRGB:
+   ofs[0] = sz->hsize * sz->vsize << 2;
+   if (*base[0]) {
+   if (size[0] < ofs[0])
+   goto err_info;
+   }
+   bypass = true;
+   break;
+   default:
+   bypass = true;
+   break;
+   }
+
+   if (!bypass) {
+   *base[1] = *base[0] + ofs[0];
+   if (ofs[1] && ofs[2])
+   *base[2] = *base[1] + ofs[1];
+   }
+
+   DRM_DEBUG_KMS("y[0x%lx],cb[0x%lx],cr[0x%lx]\n", (unsigned long)*base[0],
+   (unsigned long)*base[1], (unsigned long)*base[2]);
+
+   return 0;
+
+err_info:
+   DRM_ERROR("invalid size for fmt[0x%x]\n", fmt);
+
+   for_each_ipp_planar(i) {
+   base[i] = _info->base[i];
+   size[i] = buf_info->size[i];
+
+   DRM_ERROR("base[%d][0x%lx]s[%d][%llu]ofs[%d][%llu]\n",
+   i, (unsigned long)*base[i], i, size[i], i, ofs[i]);
+   }
+
+   return -EINVAL;
+}
 
 static int gsc_src_set_fmt(struct device *dev, u32 fmt)
 {
@@ -715,6 +807,8 @@ static int gsc_src_set_addr(struct device *dev,
struct exynos_drm_ippdrv *ippdrv = >ippdrv;
struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
struct drm_exynos_ipp_property *property;
+   struct drm_exynos_ipp_config *config;
+   int ret;
 
if (!c_node) {
DRM_ERROR("failed to get c_node.\n");
@@ -734,6 +828,13 @@ static int gsc_src_set_addr(struct device *dev,
/* address register set */
switch (buf_type) {
case IPP_BUF_ENQUEUE:
+   config = >config[EXYNOS_DRM_OPS_SRC];
+   ret = gsc_set_planar_addr(buf_info, config->fmt, >sz);
+   if (ret) {
+   dev_err(dev, "failed to set plane src addr.\n");
+   return ret;
+   }
+
gsc_write(buf_info->base[EXYNOS_DRM_PLANAR_Y],
GSC_IN_BASE_ADDR_Y(buf_id));
gsc_write(buf_info->base[EXYNOS_DRM_PLANAR_CB],
@@ -1170,6 +1271,8 @@ 

[PATCH 20/25] drm/exynos: gem: set default alignment for dumb GEM buffers

[Marek Szyprowski]

This patch forces all GEM buffers to have pitch aligned at least to 8
pixels. This is a common requirement for various Exynos IPP blocks,
which otherwise won't be able to operate on buffers of random size.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 ++
 drivers/gpu/drm/exynos/exynos_drm_gem.c | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 9ed52b04c0ba..0890e6709f10 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -24,6 +24,8 @@
 
 #define DEFAULT_WIN0
 
+#define EXYNOS_DRM_PITCH_ALIGN 8
+
 #define EXYNOS_BAD_PIXEL_FORMAT 0xu
 
 #define to_exynos_crtc(x)  container_of(x, struct exynos_drm_crtc, base)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c 
b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index 252eb301470c..b5db6e6cc043 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -417,7 +417,7 @@ int exynos_drm_gem_dumb_create(struct drm_file *file_priv,
 *  with DRM_IOCTL_MODE_CREATE_DUMB command.
 */
 
-   args->pitch = args->width * ((args->bpp + 7) / 8);
+   args->pitch = roundup(args->width, EXYNOS_DRM_PITCH_ALIGN) * 
((args->bpp + 7) / 8);
args->size = args->pitch * args->height;
 
if (is_drm_iommu_supported(dev))
-- 
1.9.2

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[PATCH 16/25] drm/exynos: mixer: use ratio precalculated in exynos_state

[Marek Szyprowski]

Common plane code already calculates and checks for supported scalling
modes, so additional code in mixer driver can be now removed.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 33 +++--
 1 file changed, 3 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index cdec3c1827c6..467e98044751 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -531,33 +531,6 @@ static void mixer_layer_update(struct mixer_context *ctx)
mixer_reg_writemask(res, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE);
 }
 
-static int mixer_setup_scale(const struct exynos_drm_plane *plane,
-   unsigned int *x_ratio, unsigned int *y_ratio)
-{
-   struct exynos_drm_plane_state *state =
-   to_exynos_plane_state(plane->base.state);
-
-   if (state->crtc.w != state->src.w) {
-   if (state->crtc.w == 2 * state->src.w)
-   *x_ratio = 1;
-   else
-   goto fail;
-   }
-
-   if (state->crtc.h != state->src.h) {
-   if (state->crtc.h == 2 * state->src.h)
-   *y_ratio = 1;
-   else
-   goto fail;
-   }
-
-   return 0;
-
-fail:
-   DRM_DEBUG_KMS("only 2x width/height scaling of plane supported\n");
-   return -ENOTSUPP;
-}
-
 static void mixer_graph_buffer(struct mixer_context *ctx,
   struct exynos_drm_plane *plane)
 {
@@ -597,9 +570,9 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
return;
}
 
-   /* check if mixer supports requested scaling setup */
-   if (mixer_setup_scale(plane, _ratio, _ratio))
-   return;
+   /* ratio is already checked by common plane code */
+   x_ratio = state->h_ratio == (1 << 15);
+   y_ratio = state->v_ratio == (1 << 15);
 
dst_x_offset = state->crtc.x;
dst_y_offset = state->crtc.y;
-- 
1.9.2

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[PATCH 12/25] drm/exynos: mixer: use crtc->state->adjusted_mode instead of crtc->mode

[Marek Szyprowski]

This patch replaces usage of crtc->mode with crtc->state->adjusted_mode
like it is already done in common plane code.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index c3bd8cace37a..a683edce5b68 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -402,9 +402,9 @@ static void vp_video_buffer(struct mixer_context *ctx,
 {
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
+   struct drm_display_mode *mode = >base.crtc->state->adjusted_mode;
struct mixer_resources *res = >mixer_res;
struct drm_framebuffer *fb = state->base.fb;
-   struct drm_display_mode *mode = >base.crtc->mode;
unsigned long flags;
dma_addr_t luma_addr[2], chroma_addr[2];
bool tiled_mode = false;
@@ -539,9 +539,9 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
 {
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
+   struct drm_display_mode *mode = >base.crtc->state->adjusted_mode;
struct mixer_resources *res = >mixer_res;
struct drm_framebuffer *fb = state->base.fb;
-   struct drm_display_mode *mode = >base.crtc->mode;
unsigned long flags;
unsigned int win = plane->zpos;
unsigned int x_ratio = 0, y_ratio = 0;
-- 
1.9.2

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[PATCH 19/25] drm/exynos: add fb pointer to exynos_drm_plane_state

[Marek Szyprowski]

Add framebuffer pointer to exynos_drm_plane_state and tell drivers to use
it. This lets common plane code to set temporary framebuffer in the
future and drivers will use it without additional changes.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 +-
 drivers/gpu/drm/exynos/exynos7_drm_decon.c| 2 +-
 drivers/gpu/drm/exynos/exynos_drm_drv.h   | 8 ++--
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 2 +-
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 2 ++
 drivers/gpu/drm/exynos/exynos_mixer.c | 4 ++--
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 3c8b8e0240fe..50c65ef6b9d3 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -269,7 +269,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_framebuffer *fb = state->base.fb;
+   struct drm_framebuffer *fb = state->fb;
unsigned int win = plane->zpos;
unsigned int bpp = fb->bits_per_pixel >> 3;
unsigned int pitch = fb->pitches[0];
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 6b28e3f73e4e..8a4d3066c992 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -407,7 +407,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_framebuffer *fb = state->base.fb;
+   struct drm_framebuffer *fb = state->fb;
int padding;
unsigned long val, alpha;
unsigned int last_x;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index bee0696ccddc..9ed52b04c0ba 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -55,9 +55,12 @@ struct exynos_drm_rect {
  *   (clipped to visible part).
  * @h_ratio: horizontal scaling ratio, 16.16 fixed point
  * @v_ratio: vertical scaling ratio, 16.16 fixed point
+ * @fb: framebuffer with image data to be displayed (drivers should use this
+ *  instead of .base->fb)
  *
- * this structure consists plane state data that will be applied to hardware
- * specific overlay info.
+ * This structure consists plane state data that will be applied to hardware
+ * specific overlay info. Some data is duplicated (comparing with base state)
+ * to let common code to modify it for internal use.
  */
 
 struct exynos_drm_plane_state {
@@ -66,6 +69,7 @@ struct exynos_drm_plane_state {
struct exynos_drm_rect src;
unsigned int h_ratio;
unsigned int v_ratio;
+   struct drm_framebuffer *fb;
 };
 
 static inline struct exynos_drm_plane_state *
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 6c04ff6432d4..61452facc69a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -650,7 +650,7 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
struct fimd_context *ctx = crtc->ctx;
-   struct drm_framebuffer *fb = state->base.fb;
+   struct drm_framebuffer *fb = state->fb;
dma_addr_t dma_addr;
unsigned long val, size, offset;
unsigned int last_x, last_y, buf_offsize, line_size;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 348bcec30489..c49b241cafe5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -117,6 +117,8 @@ static void exynos_plane_mode_set(struct 
exynos_drm_plane_state *exynos_state)
exynos_state->crtc.w = actual_w;
exynos_state->crtc.h = actual_h;
 
+   exynos_state->fb = state->fb;
+
DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
exynos_state->crtc.x, exynos_state->crtc.y,
exynos_state->crtc.w, exynos_state->crtc.h);
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 467e98044751..541454c413a3 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -428,7 +428,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
to_exynos_plane_state(plane->base.state);
struct drm_display_mode *mode = 

[PATCH 14/25] drm/exynos: introduce exynos_drm_plane_config structure

[Marek Szyprowski]

This patch adds common structure for keeping plane configuration and
capabilities data. This patch is inspired by similar code developed by
Tobias Jakobi.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 18 +++---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c| 23 +++-
 drivers/gpu/drm/exynos/exynos_drm_drv.h   | 22 
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  | 25 -
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 34 --
 drivers/gpu/drm/exynos/exynos_drm_plane.h |  7 ++--
 drivers/gpu/drm/exynos/exynos_drm_vidi.c  | 25 -
 drivers/gpu/drm/exynos/exynos_mixer.c | 51 ---
 8 files changed, 131 insertions(+), 74 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 27039468364b..3c8b8e0240fe 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -26,7 +26,6 @@
 #include "exynos_drm_iommu.h"
 
 #define WINDOWS_NR 3
-#define CURSOR_WIN 2
 #define MIN_FB_WIDTH_FOR_16WORD_BURST  128
 
 static const char * const decon_clks_name[] = {
@@ -57,6 +56,7 @@ struct decon_context {
struct drm_device   *drm_dev;
struct exynos_drm_crtc  *crtc;
struct exynos_drm_plane planes[WINDOWS_NR];
+   struct exynos_drm_plane_config  configs[WINDOWS_NR];
void __iomem*addr;
struct clk  *clks[ARRAY_SIZE(decon_clks_name)];
int pipe;
@@ -72,6 +72,12 @@ static const uint32_t decon_formats[] = {
DRM_FORMAT_ARGB,
 };
 
+static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
+   DRM_PLANE_TYPE_PRIMARY,
+   DRM_PLANE_TYPE_OVERLAY,
+   DRM_PLANE_TYPE_CURSOR,
+};
+
 static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
  u32 val)
 {
@@ -499,7 +505,6 @@ static int decon_bind(struct device *dev, struct device 
*master, void *data)
struct exynos_drm_private *priv = drm_dev->dev_private;
struct exynos_drm_plane *exynos_plane;
enum exynos_drm_output_type out_type;
-   enum drm_plane_type type;
unsigned int win;
int ret;
 
@@ -509,10 +514,13 @@ static int decon_bind(struct device *dev, struct device 
*master, void *data)
for (win = ctx->first_win; win < WINDOWS_NR; win++) {
int tmp = (win == ctx->first_win) ? 0 : win;
 
-   type = exynos_plane_get_type(tmp, CURSOR_WIN);
+   ctx->configs[win].pixel_formats = decon_formats;
+   ctx->configs[win].num_pixel_formats = ARRAY_SIZE(decon_formats);
+   ctx->configs[win].zpos = win;
+   ctx->configs[win].type = decon_win_types[tmp];
+
ret = exynos_plane_init(drm_dev, >planes[win],
-   1 << ctx->pipe, type, decon_formats,
-   ARRAY_SIZE(decon_formats), win);
+   1 << ctx->pipe, >configs[win]);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 7868d30d8eac..6b28e3f73e4e 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -41,13 +41,13 @@
 #define MIN_FB_WIDTH_FOR_16WORD_BURST 128
 
 #define WINDOWS_NR 2
-#define CURSOR_WIN 1
 
 struct decon_context {
struct device   *dev;
struct drm_device   *drm_dev;
struct exynos_drm_crtc  *crtc;
struct exynos_drm_plane planes[WINDOWS_NR];
+   struct exynos_drm_plane_config  configs[WINDOWS_NR];
struct clk  *pclk;
struct clk  *aclk;
struct clk  *eclk;
@@ -82,6 +82,11 @@ static const uint32_t decon_formats[] = {
DRM_FORMAT_BGRA,
 };
 
+static const enum drm_plane_type decon_win_types[WINDOWS_NR] = {
+   DRM_PLANE_TYPE_PRIMARY,
+   DRM_PLANE_TYPE_CURSOR,
+};
+
 static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc)
 {
struct decon_context *ctx = crtc->ctx;
@@ -672,8 +677,7 @@ static int decon_bind(struct device *dev, struct device 
*master, void *data)
struct decon_context *ctx = dev_get_drvdata(dev);
struct drm_device *drm_dev = data;
struct exynos_drm_plane *exynos_plane;
-   enum drm_plane_type type;
-   unsigned int zpos;
+   unsigned int i;
int ret;
 
ret = decon_ctx_initialize(ctx, drm_dev);
@@ -682,11 +686,14 @@ static int decon_bind(struct device *dev, struct device 
*master, void *data)
return ret;
}
 
-   for (zpos = 0; zpos < 

[PATCH 15/25] drm/exynos: add generic check for plane state

[Marek Szyprowski]

This patch adds generic check for plane state: pixel format and display
area dimensions, so drivers can always assume that they get valid plane
state to set.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |  2 ++
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 51 +++
 2 files changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 9624855128a1..bee0696ccddc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -24,6 +24,8 @@
 
 #define DEFAULT_WIN0
 
+#define EXYNOS_BAD_PIXEL_FORMAT 0xu
+
 #define to_exynos_crtc(x)  container_of(x, struct exynos_drm_crtc, base)
 #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
 
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index b620d7a76799..e5af4cd5e287 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -173,6 +173,52 @@ static struct drm_plane_funcs exynos_plane_funcs = {
.atomic_destroy_state = exynos_drm_plane_destroy_state,
 };
 
+static int
+exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config,
+ struct exynos_drm_plane_state *state)
+{
+   uint32_t format = EXYNOS_BAD_PIXEL_FORMAT;
+   int i;
+
+   for (i = 0; i < config->num_pixel_formats; i++)
+   if (config->pixel_formats[i] == state->base.fb->pixel_format)
+   format = state->base.fb->pixel_format;
+
+   if (format == EXYNOS_BAD_PIXEL_FORMAT) {
+   DRM_DEBUG_KMS("unsupported pixel format");
+   return -ENOTSUPP;
+   }
+
+   return 0;
+}
+
+static int
+exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
+   struct exynos_drm_plane_state *state)
+{
+   bool width_ok = false, height_ok = false;
+
+   if (state->src.w == state->crtc.w)
+   width_ok = true;
+
+   if (state->src.h == state->crtc.h)
+   height_ok = true;
+
+   if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_X) &&
+   state->h_ratio == (1 << 15))
+   width_ok = true;
+
+   if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_Y) &&
+   state->v_ratio == (1 << 15))
+   height_ok = true;
+
+   if (width_ok & height_ok)
+   return 0;
+
+   DRM_DEBUG_KMS("scalling is not supported");
+   return -ENOTSUPP;
+}
+
 static int exynos_plane_atomic_check(struct drm_plane *plane,
 struct drm_plane_state *state)
 {
@@ -187,6 +233,11 @@ static int exynos_plane_atomic_check(struct drm_plane 
*plane,
/* translate state into exynos_state */
exynos_plane_mode_set(exynos_state);
 
+   ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state);
+   if (ret)
+   return ret;
+
+   ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
return ret;
 }
 
-- 
1.9.2

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[PATCH 01/25] ARM: dts: exynos4: add rotator nodes

[Marek Szyprowski]

This patch adds device node for Rotator device to Exynos 4210 and 4x12
device tree files.

Signed-off-by: Marek Szyprowski 
---
 arch/arm/boot/dts/exynos4.dtsi| 10 +-
 arch/arm/boot/dts/exynos4210.dtsi |  8 
 arch/arm/boot/dts/exynos4x12.dtsi |  4 
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 2f31f773b096..3fa575ad7693 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -718,6 +718,15 @@
iommus = <_jpeg>;
};
 
+   rotator: rotator@1281 {
+   compatible = "samsung,exynos4210-rotator";
+   reg = <0x1281 0x1000>;
+   interrupts = <0 83 0>;
+   clocks = < CLK_ROTATOR>;
+   clock-names = "rotator";
+   iommus = <_rotator>;
+   };
+
hdmi: hdmi@12D0 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D0 0x7>;
@@ -945,7 +954,6 @@
interrupts = <5 0>;
clock-names = "sysmmu", "master";
clocks = < CLK_SMMU_ROTATOR>, < CLK_ROTATOR>;
-   power-domains = <_lcd0>;
#iommu-cells = <0>;
};
 
diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index 3e5ba665d200..b7474cf27e82 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -279,3 +279,11 @@
< CLK_OUT_CPU>, < CLK_XXTI>, < CLK_XUSBXTI>;
#clock-cells = <1>;
 };
+
+ {
+   power-domains = <_lcd0>;
+};
+
+_rotator {
+   power-domains = <_lcd0>;
+};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index b77dac61ffb5..148b47ad3120 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -339,6 +339,10 @@
compatible = "samsung,exynos4212-jpeg";
 };
 
+ {
+   compatible = "samsung,exynos4212-rotator";
+};
+
  {
compatible = "samsung,exynos4212-mixer";
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
-- 
1.9.2

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[PATCH 11/25] drm/exynos: introduce exynos_drm_plane_state structure

[Marek Szyprowski]

This patch introduces exynos_drm_plane_state structure, which subclasses
drm_plane_state and holds precalculated data suitable for configuring
Exynos hardware.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  21 ++---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c|  21 ++---
 drivers/gpu/drm/exynos/exynos_drm_drv.h   |  56 +++-
 drivers/gpu/drm/exynos/exynos_drm_fimd.c  |  33 +++
 drivers/gpu/drm/exynos/exynos_drm_plane.c | 125 +++---
 drivers/gpu/drm/exynos/exynos_mixer.c |  61 +++--
 6 files changed, 197 insertions(+), 120 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index a3161b0428b9..27039468364b 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -260,9 +260,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
*crtc,
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_plane *plane)
 {
+   struct exynos_drm_plane_state *state =
+   to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_plane_state *state = plane->base.state;
-   struct drm_framebuffer *fb = state->fb;
+   struct drm_framebuffer *fb = state->base.fb;
unsigned int win = plane->zpos;
unsigned int bpp = fb->bits_per_pixel >> 3;
unsigned int pitch = fb->pitches[0];
@@ -272,11 +273,11 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
if (test_bit(BIT_SUSPENDED, >flags))
return;
 
-   val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
+   val = COORDINATE_X(state->crtc.x) | COORDINATE_Y(state->crtc.y);
writel(val, ctx->addr + DECON_VIDOSDxA(win));
 
-   val = COORDINATE_X(plane->crtc_x + plane->crtc_w - 1) |
-   COORDINATE_Y(plane->crtc_y + plane->crtc_h - 1);
+   val = COORDINATE_X(state->crtc.x + state->crtc.w - 1) |
+   COORDINATE_Y(state->crtc.y + state->crtc.h - 1);
writel(val, ctx->addr + DECON_VIDOSDxB(win));
 
val = VIDOSD_Wx_ALPHA_R_F(0x0) | VIDOSD_Wx_ALPHA_G_F(0x0) |
@@ -289,15 +290,15 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
 
writel(dma_addr, ctx->addr + DECON_VIDW0xADD0B0(win));
 
-   val = dma_addr + pitch * plane->crtc_h;
+   val = dma_addr + pitch * state->src.h;
writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));
 
if (ctx->out_type != IFTYPE_HDMI)
-   val = BIT_VAL(pitch - plane->crtc_w * bpp, 27, 14)
-   | BIT_VAL(plane->crtc_w * bpp, 13, 0);
+   val = BIT_VAL(pitch - state->crtc.w * bpp, 27, 14)
+   | BIT_VAL(state->crtc.w * bpp, 13, 0);
else
-   val = BIT_VAL(pitch - plane->crtc_w * bpp, 29, 15)
-   | BIT_VAL(plane->crtc_w * bpp, 14, 0);
+   val = BIT_VAL(pitch - state->crtc.w * bpp, 29, 15)
+   | BIT_VAL(state->crtc.w * bpp, 14, 0);
writel(val, ctx->addr + DECON_VIDW0xADD2(win));
 
decon_win_set_pixfmt(ctx, win, fb);
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 15e1e165020f..7868d30d8eac 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -399,9 +399,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
*crtc,
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_plane *plane)
 {
+   struct exynos_drm_plane_state *state =
+   to_exynos_plane_state(plane->base.state);
struct decon_context *ctx = crtc->ctx;
-   struct drm_plane_state *state = plane->base.state;
-   struct drm_framebuffer *fb = state->fb;
+   struct drm_framebuffer *fb = state->base.fb;
int padding;
unsigned long val, alpha;
unsigned int last_x;
@@ -434,22 +435,22 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
writel(fb->height, ctx->regs + VIDW_WHOLE_Y(win));
 
/* offset from the start of the buffer to read */
-   writel(plane->src_x, ctx->regs + VIDW_OFFSET_X(win));
-   writel(plane->src_y, ctx->regs + VIDW_OFFSET_Y(win));
+   writel(state->src.x, ctx->regs + VIDW_OFFSET_X(win));
+   writel(state->src.y, ctx->regs + VIDW_OFFSET_Y(win));
 
DRM_DEBUG_KMS("start addr = 0x%lx\n",
(unsigned long)val);
DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
-   plane->crtc_w, plane->crtc_h);
+   state->crtc.w, state->crtc.h);
 
-   val = VIDOSDxA_TOPLEFT_X(plane->crtc_x) |
-   

Re: [PATCH v4] tests/exynos: add fimg2d performance analysis

[Tobias Jakobi]

Hello Hyungwon,


Hyungwon Hwang wrote:
> Hello Tobias,
> 
> On Mon, 09 Nov 2015 10:47:13 +0100
> Tobias Jakobi  wrote:
> 
>> Hello Hyungwon,
>>
>>
>> Hyungwon Hwang wrote:
>>> Hello,
>>>
>>> I think this patch should update .gitignore, not for adding the
>>> built binary to untracked file list.
>> Thanks!
>>
>>
>>> Also, I want to make clear about the purpose of this test program.
>>> What do you want to get after this test? This program runs G2D with
>>> randomly chosen number of pixel and shows the elapsed time to do
>>> that. I run it on my board. But I could not find any meaning of the
>>> test. If you just want to know the execution time of solid fill,
>>> what about get the width and height from user and run the same tests
>>> iteratively for more accurate result? Or at least, increasing
>>> number of pixels?
>> The test is to measure the dependency between amount of pixels the G2D
>> has to process and the amount of time for the G2D to process such
>> pixels.
>>
>> It's exactly what a performance test should do, measure the time it
>> takes for a certain workload to complete.
>>
>> In particular the test wants to answer the question if the dependency
>> stated above is of linear type.
>>
>> Of course it's not, since we have setup time, so at least it should be
>> affine linear. But even that is not true, since you see subtle
>> 'branching' when doing high density plots (that's why I added export
>> of the data to Mathematica).
>>
>>
>> What you ask for (user input) is in fact already implemented. The user
>> can specify the buffer width and height, which in turn limits the size
>> of the rectangle that is solid filled.
>>
>> If you want smaller rectangles filled, decrease buffer width and
>> height, if you want bigger ones filled, increase.
>>
>>
>> The second purpose is to stress test the G2D, as already indicated in
>> the commit description. The G2D can be overclocked quite a lot under
>> certain conditions. With increase MIF/INT voltages I can run it with
>> 400MHz instead of the 200MHz defaults. The application can now be used
>> to check stability. E.g. if voltages are too low the system can
>> quickly lock-up.
>>
>> In particular one could also check how processing time depends on the
>> clock rate of the G2D. One interesting question here is how memory
>> bandwidth limits us.
>>
>>
>>
>> With best wishes,
>> Tobias
> 
> Yes. I agree with the broad view. Please see the below, I run the test
> 2 times in a row.
> 
> root@localhost:~# ./exynos_fimg2d_perf  -i 10 -w 1024 -h 1024   
> exynos/fimg2d: G2D version (4.1).
> starting simple G2D performance test
> buffer width = 1024, buffer height = 1024, iterations = 10
> num_pixels = 136000, usecs = 236000
> num_pixels = 8492, usecs = 47083
> num_pixels = 100688, usecs = 200042
> num_pixels = 141312, usecs = 216667
> num_pixels = 39962, usecs = 92708
> num_pixels = 95046, usecs = 156542
> num_pixels = 2562, usecs = 34666
> num_pixels = 176485, usecs = 326916
> num_pixels = 17760, usecs = 56625
> num_pixels = 1625, usecs = 31833
> starting multi G2D performance test (batch size = 3)
> buffer width = 1024, buffer height = 1024, iterations = 10
> num_pixels = 245180, usecs = 385083
> num_pixels = 276320, usecs = 398625
> num_pixels = 196807, usecs = 35
> num_pixels = 305540, usecs = 420458
> num_pixels = 65978, usecs = 120250
> num_pixels = 265028, usecs = 379417
> num_pixels = 139079, usecs = 213667
> num_pixels = 24970, usecs = 67625
> num_pixels = 46808, usecs = 114125
> num_pixels = 100804, usecs = 179750
> root@localhost:~# ./exynos_fimg2d_perf  -i 10 -w 1024 -h 1024 
> exynos/fimg2d: G2D version (4.1).
> starting simple G2D performance test
> buffer width = 1024, buffer height = 1024, iterations = 10
> num_pixels = 18676, usecs = 95541
> num_pixels = 117056, usecs = 218875
> num_pixels = 80784, usecs = 137209
> num_pixels = 427, usecs = 33209
> num_pixels = 238044, usecs = 403041
> num_pixels = 4392, usecs = 37709
> num_pixels = 19880, usecs = 59750
> num_pixels = 3666, usecs = 36542
> num_pixels = 4630, usecs = 36166
> num_pixels = 70834, usecs = 125917
> starting multi G2D performance test (batch size = 3)
> buffer width = 1024, buffer height = 1024, iterations = 10
> num_pixels = 216516, usecs = 347042
> num_pixels = 242863, usecs = 422417
> num_pixels = 28176, usecs = 72292
> num_pixels = 110713, usecs = 179167
> num_pixels = 292266, usecs = 431750
> num_pixels = 274127, usecs = 392833
> num_pixels = 291659, usecs = 415875
> num_pixels = 140202, usecs = 218833
> num_pixels = 122400, usecs = 193084
> num_pixels = 168647, usecs = 251375
> 
> As you said, I can adjust the buffer width and height. But because the
> program choose the number of pixel to process randomly, I can't compare
> the result after I modified something (clock, or something else like
> you mentioned).
I have trouble following you here. It seems to be that by 'compare' you
mean that you want to compare performance using these numbers by 

[PATCH 08/25] drm/exynos: rotator: convert to common clock framework

[Marek Szyprowski]

This driver was not used after introduction of common clock framework.
This patch adds missing prepare/unprepare calls and allows to use it
again with current kernel code.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_rotator.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c 
b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index 2f5c118f4c8e..bea0f7826d30 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -790,10 +790,10 @@ static int rotator_remove(struct platform_device *pdev)
 static int rotator_clk_crtl(struct rot_context *rot, bool enable)
 {
if (enable) {
-   clk_enable(rot->clock);
+   clk_prepare_enable(rot->clock);
rot->suspended = false;
} else {
-   clk_disable(rot->clock);
+   clk_disable_unprepare(rot->clock);
rot->suspended = true;
}
 
-- 
1.9.2

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[PATCH 13/25] drm/exynos: mixer: enable video overlay plane only when VP is available

[Marek Szyprowski]

Video overlay plane should be registered only when suitable hardware
sub-block (Video Processor) is available.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index a683edce5b68..015e85cabcc9 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -1205,6 +1205,9 @@ static int mixer_bind(struct device *dev, struct device 
*manager, void *data)
const uint32_t *formats;
unsigned int fcount;
 
+   if (zpos == VP_DEFAULT_WIN && !ctx->vp_enabled)
+   continue;
+
if (zpos < VP_DEFAULT_WIN) {
formats = mixer_formats;
fcount = ARRAY_SIZE(mixer_formats);
-- 
1.9.2

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[PATCH 00/25] Exynos DRM: new life of IPP (Image Post Processing) subsystem

[Marek Szyprowski]

Dear All,

This patch series introduces a new life into Exynos IPP (Image Post
Processing) subsystem by integrating it (transparently for userspace
applications) with Exynos DRM core plane management. This means that all
CRTC drivers transparently get support for standard features of IPP
subsystem like rotation and scaling.

Support for features not supported natively by CRTC drivers is
implemented with a help of temporary framebuffers, where image data is
processed by IPP subsystem before performing the scanout by a CRTC driver.

This patchset is a first version of this 'new feature' and I would like
get some comments on the proposed approach. I plan to continue working
on enhancing Exynos DRM drivers and especially do the cleanup the IPP
subsystem.

Most of the new features are added by the last 2 patches. All other
patches are bugfixes in various Exynos DRM subdrivers and significant
core rewrite - introducing a subclass of drm_plane_state was needed and
all drivers have been converted to use it. Some initial cleanups in IPP
subsystem were also needed to let Exynos core to call it internally from
the driver core. This part will be cleaned even more in the future.


My solution has been tested on Exynos4412-based Odroid U3 and
Exynos5420-based Odroid XU3. To check rotation, cropping and scaling
I've developed a simple test application, which use atomic mode
setting/page flipping API. You can download it here:

https://git.linaro.org/?p=people/marek.szyprowski/atomictest.git

The application draws a rectangle with test pattern and then moves it
around the screen. To see how all mentioned features work (plane
rotation, cropping, scaling and off-screen display), please run the
following commands:

scaling + rotation:
# ./atomictest -b400x300 -f60 -t100 -m2x1 -x1x1

cropping + rotation:
# ./atomictest -b400x300 -f60 -t100 -m2x1 -c1x1

cropping + rotation + off-screen display:
# ./atomictest -b400x300 -f60 -t100 -m2x1 -c1x1 -o400x300

scaling + cropping + rotation:
# ./atomictest -b400x300 -f60 -t100 -m2x1 -x1x1 -c1x1 

For more information about parameters, run the application with -h
parameter or check the source code.


My TODO list (please comment the priority of those tasks):

1. add support for color space conversion, support for foreign pixel
formats and fb-modifiers to my plane-IPP integration code (currently
only RGB single plane modes are supported)

2. provide support for IPP features (framebuffer rotation, scaling,
cropping, color space conversion) with userspace atomic API instead of
(or together with) Exynos custom IPP ioctls; the important question is
weather the existing Exynos IPP API (userspace ioctls) should be kept or
can be removed (existing userspace API is misleading in many aspects).

3. simplify IPP subsystem core (the code looks over-engineered a bit,
there are also some known issues with error paths), remove
non-functional write-back and output modes

4. simplify interface to IPP HW-specific mem2mem subdrivers

5. implement output mode for IPP sub-drivers, use it where possible
instead of using temporary framebuffer (image data is then transferred
directly from scaling hw block to display engine via local path, no
temporary framebuffers are needed)

6. implement write-back feature with atomic API as respective CRTC
properties


Patches have been prepared on top of linux-next from 10-11-2015. First
2 patches should be applied to Samsung SoC tree, all other should go
to Exynos DRM tree.

Best regards
Marek Szyprowski
Samsung R Institute Poland


Patch summary:

Marek Szyprowski (21):
  ARM: dts: exynos4: add rotator nodes
  ARM: dts: exynos542x: add rotator node
  drm/exynos: gsc: add device tree support and remove usage of static
mappings
  drm/exynos: rotator: convert to common clock framework
  drm/exynos: exynos7-decon: remove excessive check
  drm/exynos: move dma_addr attribute from exynos plane to exynos fb
  drm/exynos: introduce exynos_drm_plane_state structure
  drm/exynos: mixer: use crtc->state->adjusted_mode instead of
crtc->mode
  drm/exynos: mixer: enable video overlay plane only when VP is
available
  drm/exynos: introduce exynos_drm_plane_config structure
  drm/exynos: add generic check for plane state
  drm/exynos: mixer: use ratio precalculated in exynos_state
  drm/exynos: fix clipping when scalling is enabled
  drm/exynos: fimd: fix dma burst size setting for small plane size
  drm/exynos: add fb pointer to exynos_drm_plane_state
  drm/exynos: gem: set default alignment for dumb GEM buffers
  drm/exynos: gem: remove old unused prototypes
  drm/exynos: gem: simplify access to exynos gem object
  drm/exynos: ipp: make framework context global
  drm/exynos: add generic plane rotation property support
  drm/exynos: add support for plane scaling

Seung-Woo Kim (4):
  drm/exynos: gsc: prepare and unprepare gsc clock
  drm/exynos: gsc: fix wrong pm_runtime state
  drm/exynos: fix to calculate offset of each plane for ipp fimc
  drm/exynos: fix to calculate 

[PATCH 18/25] drm/exynos: fimd: fix dma burst size setting for small plane size

[Marek Szyprowski]

This patch fixes trashed display of buffers cropped to very small width.
Even if DMA is unstable and causes tearing when changing the burst size,
it is still better than displaying a garbage.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c | 24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 44226b2b46c7..6c04ff6432d4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -487,7 +487,7 @@ static void fimd_commit(struct exynos_drm_crtc *crtc)
 
 
 static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,
-   struct drm_framebuffer *fb)
+   uint32_t pixel_format, int width)
 {
unsigned long val;
 
@@ -498,11 +498,11 @@ static void fimd_win_set_pixfmt(struct fimd_context *ctx, 
unsigned int win,
 * So the request format is ARGB then change it to XRGB.
 */
if (ctx->driver_data->has_limited_fmt && !win) {
-   if (fb->pixel_format == DRM_FORMAT_ARGB)
-   fb->pixel_format = DRM_FORMAT_XRGB;
+   if (pixel_format == DRM_FORMAT_ARGB)
+   pixel_format = DRM_FORMAT_XRGB;
}
 
-   switch (fb->pixel_format) {
+   switch (pixel_format) {
case DRM_FORMAT_C8:
val |= WINCON0_BPPMODE_8BPP_PALETTE;
val |= WINCONx_BURSTLEN_8WORD;
@@ -538,17 +538,15 @@ static void fimd_win_set_pixfmt(struct fimd_context *ctx, 
unsigned int win,
break;
}
 
-   DRM_DEBUG_KMS("bpp = %d\n", fb->bits_per_pixel);
-
/*
-* In case of exynos, setting dma-burst to 16Word causes permanent
-* tearing for very small buffers, e.g. cursor buffer. Burst Mode
-* switching which is based on plane size is not recommended as
-* plane size varies alot towards the end of the screen and rapid
-* movement causes unstable DMA which results into iommu crash/tear.
+* Setting dma-burst to 16Word causes permanent tearing for very small
+* buffers, e.g. cursor buffer. Burst Mode switching which based on
+* plane size is not recommended as plane size varies alot towards the
+* end of the screen and rapid movement causes unstable DMA, but it is
+* still better to change dma-burst than displaying garbage.
 */
 
-   if (fb->width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
+   if (width < MIN_FB_WIDTH_FOR_16WORD_BURST) {
val &= ~WINCONx_BURSTLEN_MASK;
val |= WINCONx_BURSTLEN_4WORD;
}
@@ -723,7 +721,7 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
}
 
-   fimd_win_set_pixfmt(ctx, win, fb);
+   fimd_win_set_pixfmt(ctx, win, fb->pixel_format, state->src.w);
 
/* hardware window 0 doesn't support color key. */
if (win != 0)
-- 
1.9.2

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[PATCH 04/25] drm/exynos: gsc: fix wrong pm_runtime state

[Marek Szyprowski]

From: Seung-Woo Kim 

At probe time, gsc clock is not enabled, so pm_runtime state should
be deactive. So this patch removes pm_runtime_set_active() from
gsc_probe().

Signed-off-by: Seung-Woo Kim 
Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_gsc.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c 
b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 72a9c84e06b6..ed55d37b6330 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -1713,7 +1713,6 @@ static int gsc_probe(struct platform_device *pdev)
mutex_init(>lock);
platform_set_drvdata(pdev, ctx);
 
-   pm_runtime_set_active(dev);
pm_runtime_enable(dev);
 
ret = exynos_drm_ippdrv_register(ippdrv);
-- 
1.9.2

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[PATCH 06/25] drm/exynos: fix to calculate offset of each plane for ipp fimc

[Marek Szyprowski]

From: Seung-Woo Kim 

NV12 and YUV420 formats are need to calculate offset of each plane
for ipp fimc in a gem buffer. Without proper offset, only Y plane
can be processed, so result shows green frame.
This patch fixes to calculate offset for cbcr planes for NV12 and
YUV420 formats.

Signed-off-by: Seung-Woo Kim 
Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_fimc.c | 106 +++
 drivers/gpu/drm/exynos/exynos_drm_ipp.c  |  15 -
 drivers/gpu/drm/exynos/exynos_drm_ipp.h  |   2 +
 3 files changed, 121 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c 
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index c747824f3c98..72a7ca188be5 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -403,6 +403,97 @@ static void fimc_handle_lastend(struct fimc_context *ctx, 
bool enable)
fimc_write(ctx, cfg, EXYNOS_CIOCTRL);
 }
 
+static int fimc_set_planar_addr(struct drm_exynos_ipp_buf_info *buf_info,
+   u32 fmt, struct drm_exynos_sz *sz)
+{
+   dma_addr_t *base[EXYNOS_DRM_PLANAR_MAX];
+   uint64_t size[EXYNOS_DRM_PLANAR_MAX];
+   uint64_t ofs[EXYNOS_DRM_PLANAR_MAX];
+   bool bypass = false;
+   uint64_t tsize = 0;
+   int i;
+
+   for_each_ipp_planar(i) {
+   base[i] = _info->base[i];
+   size[i] = buf_info->size[i];
+   ofs[i] = 0;
+   tsize += size[i];
+   }
+
+   if (!tsize) {
+   DRM_INFO("%s:failed to get buffer size.\n", __func__);
+   return 0;
+   }
+
+   switch (fmt) {
+   case DRM_FORMAT_NV12:
+   case DRM_FORMAT_NV21:
+   case DRM_FORMAT_NV16:
+   case DRM_FORMAT_NV61:
+   ofs[0] = sz->hsize * sz->vsize;
+   ofs[1] = ofs[0] >> 1;
+   if (*base[0] && *base[1]) {
+   if (size[0] + size[1] < ofs[0] + ofs[1])
+   goto err_info;
+   bypass = true;
+   }
+   break;
+   case DRM_FORMAT_YUV410:
+   case DRM_FORMAT_YVU410:
+   case DRM_FORMAT_YUV411:
+   case DRM_FORMAT_YVU411:
+   case DRM_FORMAT_YUV420:
+   case DRM_FORMAT_YVU420:
+   case DRM_FORMAT_YUV422:
+   case DRM_FORMAT_YVU422:
+   case DRM_FORMAT_YUV444:
+   case DRM_FORMAT_YVU444:
+   ofs[0] = sz->hsize * sz->vsize;
+   ofs[1] = ofs[2] = ofs[0] >> 2;
+   if (*base[0] && *base[1] && *base[2]) {
+   if (size[0]+size[1]+size[2] < ofs[0]+ofs[1]+ofs[2])
+   goto err_info;
+   bypass = true;
+   }
+   break;
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_ARGB:
+   ofs[0] = sz->hsize * sz->vsize << 2;
+   if (*base[0]) {
+   if (size[0] < ofs[0])
+   goto err_info;
+   }
+   bypass = true;
+   break;
+   default:
+   bypass = true;
+   break;
+   }
+
+   if (!bypass) {
+   *base[1] = *base[0] + ofs[0];
+   if (ofs[1] && ofs[2])
+   *base[2] = *base[1] + ofs[1];
+   }
+
+   DRM_DEBUG_KMS("%s:y[0x%x],cb[0x%x],cr[0x%x]\n", __func__,
+   *base[0], *base[1], *base[2]);
+
+   return 0;
+
+err_info:
+   DRM_ERROR("invalid size for fmt[0x%x]\n", fmt);
+
+   for_each_ipp_planar(i) {
+   base[i] = _info->base[i];
+   size[i] = buf_info->size[i];
+
+   DRM_ERROR("buf[%d] - base[0x%x] sz[%llu] ofs[%llu]\n",
+   i, *base[i], size[i], ofs[i]);
+   }
+
+   return -EINVAL;
+}
 
 static int fimc_src_set_fmt_order(struct fimc_context *ctx, u32 fmt)
 {
@@ -689,6 +780,7 @@ static int fimc_src_set_addr(struct device *dev,
struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
struct drm_exynos_ipp_property *property;
struct drm_exynos_ipp_config *config;
+   int ret;
 
if (!c_node) {
DRM_ERROR("failed to get c_node.\n");
@@ -709,6 +801,12 @@ static int fimc_src_set_addr(struct device *dev,
switch (buf_type) {
case IPP_BUF_ENQUEUE:
config = >config[EXYNOS_DRM_OPS_SRC];
+   ret = fimc_set_planar_addr(buf_info, config->fmt, >sz);
+   if (ret) {
+   dev_err(dev, "failed to set plane src addr.\n");
+   return ret;
+   }
+
fimc_write(ctx, buf_info->base[EXYNOS_DRM_PLANAR_Y],
EXYNOS_CIIYSA0);
 
@@ -1148,6 +1246,7 @@ static int fimc_dst_set_addr(struct device *dev,
struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;

[PATCH 23/25] drm/exynos: ipp: make framework context global

[Marek Szyprowski]

IPP framework stored global context in driver data of its platform device.
This patch moves it to global variable to simplify access. There exists
only one such framework, so there is no drawback of this change.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_ipp.c | 50 ++---
 1 file changed, 15 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c 
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 0404e18d84cc..44a6689e0f4c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -42,7 +42,6 @@
  * 7. need to power_on implement power and sysmmu ctrl.
  */
 
-#define get_ipp_context(dev)   platform_get_drvdata(to_platform_device(dev))
 #define ipp_is_m2m_cmd(c)  (c == IPP_CMD_M2M)
 
 /*
@@ -95,6 +94,7 @@ struct ipp_context {
struct workqueue_struct *cmd_workq;
 };
 
+static struct ipp_context *ctx;
 static LIST_HEAD(exynos_drm_ippdrv_list);
 static DEFINE_MUTEX(exynos_drm_ippdrv_lock);
 static BLOCKING_NOTIFIER_HEAD(exynos_drm_ippnb_list);
@@ -226,9 +226,6 @@ static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 
prop_id)
 int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
struct drm_file *file)
 {
-   struct drm_exynos_file_private *file_priv = file->driver_priv;
-   struct device *dev = file_priv->ipp_dev;
-   struct ipp_context *ctx = get_ipp_context(dev);
struct drm_exynos_ipp_prop_list *prop_list = data;
struct exynos_drm_ippdrv *ippdrv;
int count = 0;
@@ -320,9 +317,6 @@ static struct drm_exynos_ipp_event_work 
*ipp_create_event_work(void)
 int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
struct drm_file *file)
 {
-   struct drm_exynos_file_private *file_priv = file->driver_priv;
-   struct device *dev = file_priv->ipp_dev;
-   struct ipp_context *ctx = get_ipp_context(dev);
struct drm_exynos_ipp_property *property = data;
struct exynos_drm_ippdrv *ippdrv;
struct drm_exynos_ipp_cmd_node *c_node;
@@ -803,22 +797,18 @@ static int ipp_set_mem_node(struct exynos_drm_ippdrv 
*ippdrv,
return ret;
 }
 
-static void ipp_handle_cmd_work(struct device *dev,
-   struct exynos_drm_ippdrv *ippdrv,
-   struct drm_exynos_ipp_cmd_work *cmd_work,
-   struct drm_exynos_ipp_cmd_node *c_node)
+static void ipp_handle_cmd_work(struct exynos_drm_ippdrv *ippdrv,
+   struct drm_exynos_ipp_cmd_work *cmd_work,
+   struct drm_exynos_ipp_cmd_node *c_node)
 {
-   struct ipp_context *ctx = get_ipp_context(dev);
-
cmd_work->ippdrv = ippdrv;
cmd_work->c_node = c_node;
queue_work(ctx->cmd_workq, _work->work);
 }
 
-static int ipp_queue_buf_with_run(struct device *dev,
-   struct drm_exynos_ipp_cmd_node *c_node,
-   struct drm_exynos_ipp_mem_node *m_node,
-   struct drm_exynos_ipp_queue_buf *qbuf)
+static int ipp_queue_buf_with_run(struct drm_exynos_ipp_cmd_node *c_node,
+ struct drm_exynos_ipp_mem_node *m_node,
+ struct drm_exynos_ipp_queue_buf *qbuf)
 {
struct exynos_drm_ippdrv *ippdrv;
struct drm_exynos_ipp_property *property;
@@ -859,7 +849,7 @@ static int ipp_queue_buf_with_run(struct device *dev,
struct drm_exynos_ipp_cmd_work *cmd_work = c_node->start_work;
 
cmd_work->ctrl = IPP_CTRL_PLAY;
-   ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
+   ipp_handle_cmd_work(ippdrv, cmd_work, c_node);
} else {
ret = ipp_set_mem_node(ippdrv, c_node, m_node);
if (ret) {
@@ -893,9 +883,6 @@ static void ipp_clean_queue_buf(struct drm_device *drm_dev,
 int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
struct drm_file *file)
 {
-   struct drm_exynos_file_private *file_priv = file->driver_priv;
-   struct device *dev = file_priv->ipp_dev;
-   struct ipp_context *ctx = get_ipp_context(dev);
struct drm_exynos_ipp_queue_buf *qbuf = data;
struct drm_exynos_ipp_cmd_node *c_node;
struct drm_exynos_ipp_mem_node *m_node;
@@ -950,7 +937,7 @@ int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, 
void *data,
 * M2M case run play control for streaming feature.
 * other case set address and waiting.
 */
-   ret = ipp_queue_buf_with_run(dev, c_node, m_node, qbuf);
+   ret = ipp_queue_buf_with_run(c_node, m_node, qbuf);
if (ret) {
DRM_ERROR("failed to run command.\n");
goto err_clean_node;
@@ -1024,10 +1011,7 @@ err_status:
 int 

[PATCH 25/25] drm/exynos: add support for plane scaling

[Marek Szyprowski]

This patch adds support for plane scaling. Minor changes were needed to
use existing Exynos IPP integration code for enabling scaling feature.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_plane.c |  8 +---
 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c | 22 --
 drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h |  8 ++--
 3 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index e24285b148c2..0d0c451b4f6b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -57,7 +57,8 @@ static int exynos_plane_get_size(int start, unsigned length, 
unsigned last)
return size;
 }
 
-static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
+static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state,
+ const struct exynos_drm_plane_config *config)
 
 {
struct drm_plane_state *state = _state->base;
@@ -86,7 +87,8 @@ static void exynos_plane_mode_set(struct 
exynos_drm_plane_state *exynos_state)
src_w = state->src_w >> 16;
src_h = state->src_h >> 16;
 
-   exynos_plane_ipp_setup(exynos_state, _x, _y, _w, _h);
+   exynos_plane_ipp_setup(exynos_state, config, _x, _y, _w,
+  _h, _w, _h);
 
/* set ratio */
exynos_state->h_ratio = (src_w << 16) / crtc_w;
@@ -245,7 +247,7 @@ static int exynos_plane_atomic_check(struct drm_plane 
*plane,
return 0;
 
/* translate state into exynos_state */
-   exynos_plane_mode_set(exynos_state);
+   exynos_plane_mode_set(exynos_state, exynos_plane->config);
 
ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state);
if (ret)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c 
b/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c
index 126d0bde2ccf..2d12eb391262 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.c
@@ -121,15 +121,24 @@ static int exynos_plane_ipp_transform(struct 
exynos_drm_plane_state *state)
 }
 
 void exynos_plane_ipp_setup(struct exynos_drm_plane_state *state,
+   const struct exynos_drm_plane_config *config,
unsigned int *src_x, unsigned int *src_y,
-   unsigned int *src_w, unsigned int *src_h)
+   unsigned int *src_w, unsigned int *src_h,
+   unsigned int *crtc_w, unsigned int *crtc_h)
 {
int rotation = state->base.rotation;
int pre_x, pre_y, post_x, post_y;
 
state->rotation = rotation;
 
-   if (rotation == 0 || rotation == BIT(DRM_ROTATE_0))
+   /* check if ipp is really needed */
+   if (rotation == BIT(DRM_ROTATE_0) &&
+   (*src_w == *crtc_w ||
+   ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_X) &&
+   *src_w * 2 == *crtc_w)) &&
+   (*src_h == *crtc_h ||
+   ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE_Y) &&
+   *src_h * 2 == *crtc_h)))
return;
 
state->ipp_needed = true;
@@ -183,6 +192,15 @@ void exynos_plane_ipp_setup(struct exynos_drm_plane_state 
*state,
swap(state->ipp_dst.w, state->ipp_dst.h);
break;
}
+
+   /* apply scalling */
+   state->ipp_dst.w = state->ipp_dst.w * *crtc_w / *src_w;
+   state->ipp_dst.h = state->ipp_dst.h * *crtc_h / *src_h;
+
+   *src_x = *src_x * *crtc_w / *src_w;
+   *src_y = *src_y * *crtc_h / *src_h;
+   *src_w = *crtc_w;
+   *src_h = *crtc_h;
 }
 
 int exynos_plane_ipp_check(struct exynos_drm_plane *plane,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h 
b/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h
index defb4f95e075..1709bb1a26e4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane_ipp.h
@@ -15,8 +15,10 @@
 #ifdef CONFIG_DRM_EXYNOS_PLANE_IPP
 
 void exynos_plane_ipp_setup(struct exynos_drm_plane_state *state,
+   const struct exynos_drm_plane_config *config,
unsigned int *src_x, unsigned int *src_y,
-   unsigned int *src_w, unsigned int *src_h);
+   unsigned int *src_w, unsigned int *src_h,
+   unsigned int *crtc_w, unsigned int *crtc_h);
 
 int exynos_plane_ipp_check(struct exynos_drm_plane *plane,
   struct exynos_drm_plane_state *state);
@@ -34,8 +36,10 @@ int exynos_plane_ipp_attach_properties(struct drm_device 
*dev,
 
 static inline
 void exynos_plane_ipp_setup(struct exynos_drm_plane_state *state,
+   const struct exynos_drm_plane_config *config,
   

[PATCH 22/25] drm/exynos: gem: simplify access to exynos gem object

[Marek Szyprowski]

Replace calls to exynos_drm_gem_get_{dma_addr,size}, by a simpler
function exynos_drm_gem_get(). This lets the caller to get access to
exynos_drm_gem object and extract any information about GEM object
without searching object tree for getting each parameter.

Signed-off-by: Marek Szyprowski 
---
 drivers/gpu/drm/exynos/exynos_drm_g2d.c | 48 +-
 drivers/gpu/drm/exynos/exynos_drm_gem.c | 52 +
 drivers/gpu/drm/exynos/exynos_drm_gem.h | 23 +--
 drivers/gpu/drm/exynos/exynos_drm_ipp.c | 41 ++
 drivers/gpu/drm/exynos/exynos_drm_ipp.h |  2 +-
 5 files changed, 52 insertions(+), 114 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c 
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index c17efdb238a6..7c83e64f9f1c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -179,7 +179,7 @@ struct g2d_buf_desc {
 struct g2d_buf_info {
unsigned intmap_nr;
enum g2d_reg_type   reg_types[MAX_REG_TYPE_NR];
-   unsigned long   handles[MAX_REG_TYPE_NR];
+   void*obj[MAX_REG_TYPE_NR];
unsigned inttypes[MAX_REG_TYPE_NR];
struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
 };
@@ -360,11 +360,10 @@ add_to_list:
 }
 
 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
-   unsigned long obj,
+   void *obj,
bool force)
 {
-   struct g2d_cmdlist_userptr *g2d_userptr =
-   (struct g2d_cmdlist_userptr *)obj;
+   struct g2d_cmdlist_userptr *g2d_userptr = obj;
struct page **pages;
 
if (!obj)
@@ -407,7 +406,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
unsigned long userptr,
unsigned long size,
struct drm_file *filp,
-   unsigned long *obj)
+   void **obj)
 {
struct drm_exynos_file_private *file_priv = filp->driver_priv;
struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
@@ -434,7 +433,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
 */
if (g2d_userptr->size == size) {
atomic_inc(_userptr->refcount);
-   *obj = (unsigned long)g2d_userptr;
+   *obj = g2d_userptr;
 
return _userptr->dma_addr;
}
@@ -517,7 +516,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct 
drm_device *drm_dev,
g2d_userptr->in_pool = true;
}
 
-   *obj = (unsigned long)g2d_userptr;
+   *obj = g2d_userptr;
 
return _userptr->dma_addr;
 
@@ -549,9 +548,7 @@ static void g2d_userptr_free_all(struct drm_device *drm_dev,
 
list_for_each_entry_safe(g2d_userptr, n, _priv->userptr_list, list)
if (g2d_userptr->in_pool)
-   g2d_userptr_put_dma_addr(drm_dev,
-   (unsigned long)g2d_userptr,
-   true);
+   g2d_userptr_put_dma_addr(drm_dev, g2d_userptr, true);
 
g2d->current_pool = 0;
 }
@@ -706,26 +703,23 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
buf_desc = _info->descs[reg_type];
 
if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
-   unsigned long size;
+   struct exynos_drm_gem *exynos_gem;
 
-   size = exynos_drm_gem_get_size(drm_dev, handle, file);
-   if (!size) {
+   exynos_gem = exynos_drm_gem_get(drm_dev, handle, file);
+   if (IS_ERR(exynos_gem)) {
ret = -EFAULT;
goto err;
}
 
if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
-   size)) {
+exynos_gem->size)) {
+   exynos_drm_gem_put(drm_dev, exynos_gem);
ret = -EFAULT;
goto err;
}
 
-   addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
-   file);
-   if (IS_ERR(addr)) {
-   ret = -EFAULT;
-   goto err;
-   }
+