The clocks for NAND, OneNAND and Transport Stream Interface(TSI)
controllers could be either enabled or disabled at boot. To ensure
that these are turned off until used, add them to the list of clocks
to be turned off during boot.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
The clocks for PCM, Slimbus, Spdif added to off list in order
to turn them off at boot time.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/mach-exynos/clock-exynos4.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/mach-exynos/clock
The clock instance parameter in Samsung clock interface is not being checked
for NULL pointers. Add checks for NULL pointers.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/plat-samsung/clock.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
This patchset does following:
Patch 1: Segregate and move common code to new function
Patch 2: Adds C2 idle state
It has been tested on Kukjin's for-next branch on Origen board.
Chander Kashyap (2):
ARM: Exynos4: CPUIDLE: Add generic function for exynos4 cpuidle
ARM: EXYNOS4: CPUIDLE: Add
Moved out the code from exynos4_enter_core0_aftr to a separate
function exynos4_do_idle in order to make it usable for other
idle states.
Also update the wakeup mask without touching reserved bits.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap
To enter into c2 state:
1. ARM should be off
2. All local power domains should be off
3. All IPs belonging to TOP domain should not be in use
In this state TOP domain remains in retention state.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Signed-off-by: Chander Kashyap chander.kash
This patchset does as follows:
Patch 1: Enable only required bus clock in case of multiple clock sources.
Patch 2: Add pm_runtime_dont_use_autosuspend() in sdhci_s3c_remove();
Patch 3: Disable clocks in runtime suspend and enable at runtime resume.
Chander Kashyap (3):
mmc: sdhci-s3c: Enable
of old bus clock and enables the
best clock selected in sdhci_s3c_set_clock().
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
drivers/mmc/host/sdhci-s3c.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers
]
(pm_runtime_set_autosuspend_delay+0x30/0x3c)
[c0171608] (pm_runtime_set_autosuspend_delay+0x30/0x3c) from [bf0069c4]
(sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c])
[bf0069c4] (sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c]) from [c016a014]
(platform_drv_probe+0x18/0x1c)
Signed-off-by: Chander Kashyap
Hi Jaehoon Chung,
On 14 September 2012 15:25, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Chander,
Could you add the error control for clk_enable()?
It is maintained as original and clk is already checked for error using IS_ERR.
On 09/14/2012 06:08 PM, Chander Kashyap wrote:
In case
From: Chander Kashyap chander.kash...@gmail.com
Perform clock disable/enable in runtime suspend/resume.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
Changelog:
v2:
- Wrapped clk_disable in probe and clk_enable in remove
From: Thomas Abraham thomas.abra...@linaro.org
This patch series migrates Exynos4 clock support to common clock framework.
The first patch in this series removes the existing Exynos4 clock support
that uses the Samsung specific clock framework. The second patch in this
series add Exynos4 clock
Commit a0ae0240507... ARM: kernel: add device tree init map function started
using 24 LSBs of MPIDR to calculate the cpu_logical_map. Hence update the same
in exynos_secondary_startup code.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Inderpal Singh inderpal.si
info at http://vger.kernel.org/majordomo-info.html
working fine.
Tested-by: Chander Kashyap chander.kash...@linaro.org
--
with warm regards,
Chander Kashyap
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More
On 24 April 2014 13:18, Chander Kashyap chander.kash...@linaro.org wrote:
On 22 April 2014 17:55, Chander Kashyap chander.kash...@linaro.org wrote:
Currently status/configuration power register values are hard-coded for cpu1.
Make it generic so that it is useful for SoC's with more than two
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multicluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multicluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap
patches.
Chander Kashyap (5):
driver: cpuidle-big-little: add of_device_id structure
cpuidle: config: Add ARCH_EXYNOS entry to select cpuidle-big-little
driver
driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
exynos: cpuidle: do not allow cpuidle registration
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v3:
1. Removed
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
---
Changes in v3:
1
Exynos5420 is a big-little SoC from Samsung. It has 4 A15 and 4 A7 cores.
In order to use generic cpuidle-big-little driver, this patch adds Exynos5420
specific check to initialize generic cpuidle driver.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap
this driver.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
drivers/cpuidle/cpuidle-big_little.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-big_little.c
b/drivers/cpuidle
Hi Andreas,
On 5 May 2014 14:29, Andreas Färber afaer...@suse.de wrote:
Hi,
Am 05.05.2014 10:27, schrieb Chander Kashyap:
Exynos5420 is a big-little SoC from Samsung. It has 4 A15 and 4 A7 cores.
In order to use generic cpuidle-big-little driver, this patch adds Exynos5420
specific check
patches.
Chander Kashyap (5):
driver: cpuidle-big-little: add of_device_id structure
cpuidle: config: Add ARCH_EXYNOS entry to select cpuidle-big-little
driver
driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
exynos: cpuidle: do not allow cpuidle registration
this driver.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
drivers/cpuidle/cpuidle-big_little.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-big_little.c
b/drivers/cpuidle
Add support to select generic big-little cpuidle driver for Samsung Exynos
series SoC's. This is required for Exynos big-llittle SoC's eg, Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v4:
1. Typo
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
---
Changes in v4: None
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v4: None
Changes in v3
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case
On 9 May 2014 13:47, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On 09.05.2014 09:50, Chander Kashyap wrote:
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power
Hi Lorenzo
On 9 May 2014 21:02, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
On Mon, May 05, 2014 at 10:27:20AM +0100, Chander Kashyap wrote:
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks
Hi Lorenzo,
On 13 May 2014 22:44, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
On Tue, May 13, 2014 at 12:43:31PM +0100, Chander Kashyap wrote:
[...]
+static void exynos_suspend(u64 residency)
+{
+ unsigned int mpidr, cpunr;
+
+ mpidr = read_cpuid_mpidr
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with warm regards,
Chander Kashyap
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the body
On 14 May 2014 08:32, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Wed, 14 May 2014, Chander Kashyap wrote:
On 14 May 2014 08:14, Abhilash Kesavan kesavan.abhil...@gmail.com wrote:
Hi Lorenzo,
On Tue, May 13, 2014 at 10:18 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote
On 9 May 2014 14:04, Chander Kashyap chander.kash...@linaro.org wrote:
On 9 May 2014 13:47, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On 09.05.2014 09:50, Chander Kashyap wrote:
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v5:
1. Add
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
://www.spinics.net/lists/arm-kernel/msg331100.html
Changelog is in respective patches.
Chander Kashyap (5):
driver: cpuidle-big-little: add of_device_id structure
arm: exynos: add generic function to calculate cpu number
cpuidle: config: Add ARCH_EXYNOS entry to select cpuidle-big-little
driver
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc...@linaro.org
---
Changes in v4: None
this driver.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
drivers/cpuidle/cpuidle-big_little.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-big_little.c
b/drivers/cpuidle
Add support to select generic big-little cpuidle driver for Samsung Exynos
series SoC's. This is required for Exynos big-little SoC's eg, Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v4:
1. Typo
Hi Daniel,
On 14 May 2014 15:26, Daniel Lezcano daniel.lezc...@linaro.org wrote:
On 05/14/2014 10:03 AM, Chander Kashyap wrote:
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle
Hi Tomasz,
On 16 May 2014 02:56, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Chander,
On 14.05.2014 10:03, Chander Kashyap wrote:
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle
driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
://www.spinics.net/lists/arm-kernel/msg331100.html
Changelog is in respective patches.
Chander Kashyap (5):
driver: cpuidle-big-little: add of_device_id structure
arm: exynos: add generic function to calculate cpu number
cpuidle: config: Add ARCH_EXYNOS entry to select cpuidle-big-little
driver
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by: Daniel Lezcano daniel.lezc
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v6: None
Changes in v5
Add support to select generic big-little cpuidle driver for Samsung Exynos
series SoC's. This is required for Exynos big-llittle SoC's eg, Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
Changes in v4:
1. Typo
this driver.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
drivers/cpuidle/cpuidle-big_little.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-big_little.c
b/drivers/cpuidle
Hi Daniel/Kgene,
On 16 May 2014 13:33, Chander Kashyap chander.kash...@linaro.org wrote:
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver.
Tested on SMDK5420
On 19 May 2014 11:10, Chander Kashyap chander.kash...@linaro.org wrote:
Hi Daniel/Kgene,
On 16 May 2014 13:33, Chander Kashyap chander.kash...@linaro.org wrote:
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC
On 26 May 2014 15:59, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Chander,
On 16.05.2014 10:03, Chander Kashyap wrote:
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver
On 28 May 2014 14:32, Daniel Lezcano daniel.lezc...@linaro.org wrote:
On 05/28/2014 06:35 AM, Kukjin Kim wrote:
Chander Kashyap wrote:
On 26 May 2014 15:59, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Chander,
On 16.05.2014 10:03, Chander Kashyap wrote:
Exynos5420 is a big-little Soc
this list: send the line unsubscribe linux-samsung-soc
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Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not strong, but I believe that Lorenzo's
questions matter if we're using S2 for CPUidle (where we actually turn
off power and hot unplug
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S
On 11 June 2014 18:45, Lorenzo Pieralisi lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi
On Wed, Jun 11, 2014 at 8:58 PM, Kukjin Kim kgene@samsung.com wrote:
On 06/12/14 00:19, Doug Anderson wrote:
Chander,
On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyapk.chan...@samsung.com
wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitrenicolas.pi...@linaro.org
wrote:
Hi Doug,
On 13 June 2014 20:40, Doug Anderson diand...@chromium.org wrote:
Chander,
On Fri, Jun 13, 2014 at 4:54 AM, Chander Kashyap k.chan...@samsung.com
wrote:
This patch is effectively changing the mcpm_entry_point address from
nsbase + 0x1c to nsbase + 0x8
Hence while integrating
From: Chander Kashyap chander.kash...@linaro.org
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan
From: Chander Kashyap chander.kash...@linaro.org
Add support to select generic big-little cpuidle driver for Samsung Exynos
series SoC's. This is required for Exynos big-llittle SoC's eg, Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan
From: Chander Kashyap chander.kash...@linaro.org
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan
From: Chander Kashyap chander.kash...@linaro.org
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Reviewed-by: Tomasz Figa t.f
From: Chander Kashyap chander.kash...@linaro.org
This driver will be used by many big.Little Soc's. As of now it does
string matching of hardcoded compatible string to init the driver. This
comparison list will keep on growing with addition of new SoC's.
Hence add of_device_id structure
From: Chander Kashyap chander.kash...@linaro.org
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver.
Tested on SMDK5420.
Rebased on 3.16-rc1
Changelog is in respective patches.
Chander Kashyap (5):
driver: cpuidle-big
On Fri, Apr 11, 2014 at 4:10 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
The code to initiate and exit the powerdown sequence is the same in pm.c and
cpuidle.c.
Let's split the common part in the pm.c and reuse it from the cpu_pm notifier.
That is one more step forward to make the
On Thu, Jun 26, 2014 at 3:18 PM, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On 26.06.2014 11:07, Chander Kashyap wrote:
On Fri, Apr 11, 2014 at 4:10 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
[snip]
@@ -359,6 +373,7 @@ static int exynos_cpu_pm_notifier(struct
On 19 August 2013 00:57, Kukjin Kim kgene@samsung.com wrote:
On 08/12/13 15:23, Chander Kashyap wrote:
ping
On 23 July 2013 15:17, Chander Kashyapchander.kash...@linaro.org wrote:
ping.
On 14 June 2013 20:11, Chander Kashyapchander.kash...@linaro.org
wrote:
Two cells were used
On 28 August 2013 16:01, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On Wednesday 28 of August 2013 15:20:40 Chander Kashyap wrote:
On 19 August 2013 00:57, Kukjin Kim kgene@samsung.com wrote:
On 08/12/13 15:23, Chander Kashyap wrote:
ping
On 23 July 2013 15:17, Chander
Two cells were used to specify interrupts in mct node, while second cell
always remains unused. Hence use only one cell.
Suggested by Tomasz Figa.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
changes in v2:
- Drop Changes for Exynos4 as done in separate patch by Tomasz
On 28 August 2013 16:48, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On Wednesday 28 of August 2013 16:30:41 Chander Kashyap wrote:
Two cells were used to specify interrupts in mct node, while second cell
always remains unused. Hence use only one cell.
Suggested by Tomasz Figa
Ki Kukjin,
On 28 August 2013 17:36, Chander Kashyap chander.kash...@linaro.org wrote:
On 28 August 2013 16:48, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On Wednesday 28 of August 2013 16:30:41 Chander Kashyap wrote:
Two cells were used to specify interrupts in mct node, while second
This patch series fixes two problem with MCT node in Exynos5 platforms.
1. In Exynos5250 it fixes the number of interrupt-cells.
2. Removes invalid properties in MCT node for Exynos5420 and Exynos5250.
Chander Kashyap (2):
ARM: DT: Exynos5250: fix number of interrupt-cells in mct node
DTS
Two cells were used to specify interrupts in mct node, while second cell
always remains unused. Hence use only one cell.
Suggested by Tomasz Figa.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5250.dtsi | 19 +--
1 file changed, 9
Remove interrupt-controller and #interrupt-cells properties of MCT device tree
node, as MCT is not an interrupt controllor.
Suggested by: Tomasz Figa
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5250.dtsi |2 --
arch/arm/boot/dts/exynos5420.dtsi
Hi Viresh,
On 29 August 2013 17:21, Tomasz Figa t.f...@samsung.com wrote:
Hi Viresh,
On Thursday 29 of August 2013 13:45:56 Viresh Kumar wrote:
On Tue, Jun 18, 2013 at 11:59 AM, Chander Kashyap
chander.kash...@linaro.org wrote:
Instead of having to specify the number for CPUs
Temporary parent migration is required during cpu frequency scaling. Hence
this patch adds support to supply alternate parent name for cpu clock i.e.
mout_cpu.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
drivers/clk/samsung/clk-exynos5250.c |4 +++-
1 file changed, 3
and
alternate_parent to temp_parent
Chander Kashyap (3):
clk: add support for temporary parent clock migration
clk: update users of clk_register_mux and DEFINE_CLK_MUX
clk: samsung: Exynos5250: Add alternate parent name for mout_cpu
arch/arm/mach-imx/clk.h|6
to temp_parent_clock.
Hence in clk_set_rate API check for the CLK_SET_RATE_TEMP_PARENT flag, then
latch on to alternate parent clock temporarily. Once the requested rate is set
on the clk, re-parent back to original parent clock.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
drivers/clk
On 4 September 2013 04:06, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Chander,
On Tuesday 03 of September 2013 17:04:28 Chander Kashyap wrote:
Some platform has provision to change cpu parent clock during
cpu frequency scaling. This patch series provides a mechanism to
implement the same
On 4 September 2013 03:17, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
Hi Chander,
On 09/03/2013 01:34 PM, Chander Kashyap wrote:
Some platforms use to migrate temporarily to another parent during cpu
frequency
scaling, e.g. Exynos and Tegra. Once the frequency is changed
Exynos5420 is octacore SoC from Samsung. Hence extend exynos-mct clocksource
driver to support 8 local interrupts.
Also extend dt entries for 8 interrupts.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi |9 +++--
drivers/clocksource
Exynos5420 is an octacore SoC. This patch series enables the remaining 4 cores.
Chander Kashyap (2):
clocksource: mct: extend mct to support 8 local interrupts for
Exynos5420
arm: dt: Exynos5420: populate cpu node enteries to 8 cpus
arch/arm/boot/dts/exynos5420.dtsi | 37
Exynos5420 is octacore SoC from samsung.
Hence populate all the cpu node enteries.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
Hi Tomasz,
On 5 September 2013 15:25, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On Thursday 05 of September 2013 14:54:46 Chander Kashyap wrote:
Exynos5420 is octacore SoC from samsung.
Hence populate all the cpu node enteries.
Signed-off-by: Chander Kashyap chander.kash
On 5 September 2013 15:40, Tomasz Figa t.f...@samsung.com wrote:
On Thursday 05 of September 2013 15:33:17 Chander Kashyap wrote:
Hi Tomasz,
On 5 September 2013 15:25, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On Thursday 05 of September 2013 14:54:46 Chander Kashyap wrote
Exynos5420 is octacore SoC from samsung.
Hence populate all the cpu node enteries.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
Exynos5420 is an octacore SoC. This patch series enables the remaining 4 cores.
Changes in v2:
- Changed the cpu node @unit-address value to reg property value.
Chander Kashyap (2):
clocksource: mct: extend mct to support 8 local interrupts for
Exynos5420
arm: dt: Exynos5420
Exynos5420 is octacore SoC from Samsung. Hence extend exynos-mct clocksource
driver to support 8 local interrupts.
Also extend dt entries for 8 interrupts.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi |9 +++--
drivers/clocksource
Hi Vikas,
On 5 September 2013 16:09, Vikas Sajjan sajjan.li...@gmail.com wrote:
Hi Chander,
On Thu, Sep 5, 2013 at 3:52 PM, Chander Kashyap
chander.kash...@linaro.org wrote:
Exynos5420 is octacore SoC from samsung.
Hence populate all the cpu node enteries.
Signed-off-by: Chander Kashyap
Exynos5420 is an octacore SoC. This patch series enables the remaining 4 cores.
Changes in v2:
- Changed the cpu node @unit-address value to reg property value.
Changes in v3:
- Removed leading 0x from @unit-address value.
Chander Kashyap (2):
clocksource: mct: extend mct
Exynos5420 is octacore SoC from samsung.
Hence populate all the cpu node enteries.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
Exynos5420 is octacore SoC from Samsung. Hence extend exynos-mct clocksource
driver to support 8 local interrupts.
Also extend dt entries for 8 interrupts.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/boot/dts/exynos5420.dtsi |9 +++--
drivers/clocksource
On 4 September 2013 23:31, Tomasz Figa tomasz.f...@gmail.com wrote:
On Wednesday 04 of September 2013 10:43:28 Mike Turquette wrote:
Quoting Tomasz Figa (2013-09-03 15:36:50)
Hi Chander,
On Tuesday 03 of September 2013 17:04:28 Chander Kashyap wrote:
Some platform has provision
of September 2013 17:04:28 Chander Kashyap wrote:
Some platform has provision to change cpu parent clock during
cpu frequency scaling. This patch series provides a mechanism to
implement the same using CCF.
Patch1 provides mechanism to migrate to new parent temporarily.
Patch2 updates
Pass '0' in place of hardcoded irq_base value as first_irq parameter to
irq_domain_add_simple in order to use linear irq domain.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
drivers/irqchip/exynos-combiner.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions
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