Dear Marc and Will,
On Monday, October 10, 2011 10:02 PM, Marc Zyngier wrote:
On 07/10/11 16:16, Will Deacon wrote:
Hi Marc,
On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
So to make my suggestion completely clear, here's a patch I'm now
carrying in my tree. It's only
Hi Thomas,
All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
mapped to linux irq numbers 16 to 31. These interrupts also need proper
handling.
Best regards,
Changhwan Youn
On 10/10/2011 03:11 AM, Thomas Abraham wrote:
All of Samsung's s5p platforms have timer irqs
This functions are added for properly controlling primary controller
in uart interrupt chained handler.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm/plat-samsung/irq-uart.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-samsung
This functions are added for properly controlling primary controller
in pwm interrupt chained handler.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm/plat-samsung/irq-vic-timer.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-samsung
functions for uart interrupt
chained handler
[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt
chained handler
[PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt
chained handler
Best regards,
Changhwan Youn
Patch summary:
Changhwan Youn (3
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm/common/gic.c |6 --
arch/arm/include/asm/hardware/gic.h |6 ++
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 4ddd0a6..23564ed 100644
This patch adds implementation External GIC on EXYNOS4 SoC.
Note: need to update timer codes for supporting old type of
EXYNOS4 SoCs.
[PATCH 1/7] ARM: EXYNOS4: Add external GIC io memory mapping
[PATCH 2/7] ARM: EXYNOS4: modify interrupt mappings for external GIC
[PATCH 3/7] ARM: EXYNOS4: set
To support external GIC needs to update mapping of interrupt number.
This patch modifies it for external GIC and accordingly removes
the unused code.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm/mach-exynos4/cpu.c |8 --
arch/arm/mach-exynos4/include/mach
For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.
External GIC of Exynos4 cannot support register banking so
several interrupt related code for CPU1 should be different
from that of CPU0.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm
External GIC cannot support PPI (Private Peripheral Interrupt) for
ARM private timers. Thus MCT should be selected as clock event timers
by default.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
---
arch/arm/mach-exynos4/Kconfig|3 +-
arch/arm/mach-exynos4/Makefile
MyungJoo Ham wrote:
When rtc_setalarm is called, the entries that are not chosen (entries
without valid time values) should be disabled. However, in the previous
rtc-s3c driver, they are not explicitly disabled (did not changed). This
patch allows to disable such entries even if they were
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MyungJoo Ham wrote:
The previous rtc-s3c had two issues related with its IRQ.
1. Users cannot open rtc
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