RE: [PATCH 5/7] ARM: EXYNOS4: Add support external GIC

2011-10-11 Thread Changhwan Youn
Dear Marc and Will, On Monday, October 10, 2011 10:02 PM, Marc Zyngier wrote: On 07/10/11 16:16, Will Deacon wrote: Hi Marc, On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote: So to make my suggestion completely clear, here's a patch I'm now carrying in my tree. It's only

RE: [PATCH 1/3] ARM: Samsung: Move timer irq numbers to end of linux irq space

2011-10-18 Thread Changhwan Youn
Hi Thomas, All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically mapped to linux irq numbers 16 to 31. These interrupts also need proper handling. Best regards, Changhwan Youn On 10/10/2011 03:11 AM, Thomas Abraham wrote: All of Samsung's s5p platforms have timer irqs

[PATCH 1/3] ARM: SAMSUNG: add entry and exit functions for uart interrupt chained handler

2011-04-18 Thread Changhwan Youn
This functions are added for properly controlling primary controller in uart interrupt chained handler. Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm/plat-samsung/irq-uart.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung

[PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler

2011-04-18 Thread Changhwan Youn
This functions are added for properly controlling primary controller in pwm interrupt chained handler. Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm/plat-samsung/irq-vic-timer.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung

[PATCH 0/3] ARM: SAMSUNG: add entry and exit functions for interrupt chained handler

2011-04-18 Thread Changhwan Youn
functions for uart interrupt chained handler [PATCH 2/3] ARM: SAMSUNG: add entry and exit functions for pwm interrupt chained handler [PATCH 3/3] ARM: EXYNOS4: add entry and exit functions for external interrupt chained handler Best regards, Changhwan Youn Patch summary: Changhwan Youn (3

[PATCH 4/7] ARM: GIC: move gic_chip_data structure declaration to header

2011-06-20 Thread Changhwan Youn
Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm/common/gic.c |6 -- arch/arm/include/asm/hardware/gic.h |6 ++ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 4ddd0a6..23564ed 100644

[PATCH 0/7] ARM: EXYNOS4: Adds External GIC

2011-06-20 Thread Changhwan Youn
This patch adds implementation External GIC on EXYNOS4 SoC. Note: need to update timer codes for supporting old type of EXYNOS4 SoCs. [PATCH 1/7] ARM: EXYNOS4: Add external GIC io memory mapping [PATCH 2/7] ARM: EXYNOS4: modify interrupt mappings for external GIC [PATCH 3/7] ARM: EXYNOS4: set

[PATCH 2/7] ARM: EXYNOS4: modify interrupt mappings for external GIC

2011-06-20 Thread Changhwan Youn
To support external GIC needs to update mapping of interrupt number. This patch modifies it for external GIC and accordingly removes the unused code. Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm/mach-exynos4/cpu.c |8 -- arch/arm/mach-exynos4/include/mach

[PATCH 5/7] ARM: EXYNOS4: Add support external GIC

2011-06-20 Thread Changhwan Youn
For full support of power modes, this patch adds implementation external GIC on EXYNOS4. External GIC of Exynos4 cannot support register banking so several interrupt related code for CPU1 should be different from that of CPU0. Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm

[PATCH 6/7] ARM: EXYNOS4: Remove clock event timers using ARM private timers

2011-06-20 Thread Changhwan Youn
External GIC cannot support PPI (Private Peripheral Interrupt) for ARM private timers. Thus MCT should be selected as clock event timers by default. Signed-off-by: Changhwan Youn chaos.y...@samsung.com --- arch/arm/mach-exynos4/Kconfig|3 +- arch/arm/mach-exynos4/Makefile

RE: [rtc-linux] [PATCH 2/3] rtc: rtc-s3c: Disable alarm entries that are not chosen.

2011-07-03 Thread Changhwan Youn
MyungJoo Ham wrote: When rtc_setalarm is called, the entries that are not chosen (entries without valid time values) should be disabled. However, in the previous rtc-s3c driver, they are not explicitly disabled (did not changed). This patch allows to disable such entries even if they were

RE: [PATCH 3/3] rtc: rtc-s3c: allow multiple open / allow no-ioctl-open'ed rtc to have irq.

2011-07-03 Thread Changhwan Youn
AbwBwAGUAbgAgAC8AIAB hAGwAbABvAHcAIABuAG8ALQBpAG8AYwB0AGwALQBvAHAAZQBuACcAZQBkACAAcgB0AGMAIAB0AG8AIABoAGEAdgBlACAAaQByAHEALgA= x-cr-puzzleid: {71A23705-5400-4E21-9C23-2B1E96E33A68} MyungJoo Ham wrote: The previous rtc-s3c had two issues related with its IRQ. 1. Users cannot open rtc