Hi Yakir,
Am Mittwoch, 16. Dezember 2015, 11:20:18 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some
Hi Yakir,
Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some
Hi Yakir,
Am Mittwoch, 9. Dezember 2015, 11:49:10 schrieb Yakir Yang:
> Thanks a lot for great debugging.
>
> On 12/08/2015 11:33 PM, Heiko Stübner wrote:
> > Hi Yakir,
> >
> > Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
> >> The Samsun
Hi Yakir,
Am Montag, 7. Dezember 2015, 14:37:19 schrieb Yakir Yang:
>The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some
Am Mittwoch, 28. Oktober 2015, 16:56:01 schrieb Yakir Yang:
> There are some IP limit on rk3288 that only support 4 physical lanes
> of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag.
>
> Tested-by: Javier Martinez Canillas
> Signed-off-by: Yakir Yang
Hi Yakir,
Am Mittwoch, 28. Oktober 2015, 16:27:45 schrieb Yakir Yang:
> Rockchip have three clocks for dp controller, we leave pclk_edp
> to analogix_dp driver control, and keep the sclk_edp_24m and
> sclk_edp in platform driver.
>
> Tested-by: Javier Martinez Canillas
>
Hi Yakir,
Am Mittwoch, 28. Oktober 2015, 16:21:59 schrieb Yakir Yang:
> Split the dp core driver from exynos directory to bridge directory,
> and rename the core driver to analogix_dp_*, rename the platform
> code to exynos_dp.
>
> Beside the new analogix_dp driver would export four hooks.
>
Am Freitag, 23. Oktober 2015, 10:39:19 schrieb Krzysztof Kozlowski:
> SRAM bindings for various SoCs, using the mmio-sram genalloc
> API, are spread over different places - per SoC vendor. Since all of
> these are quite similar (they depend on mmio-sram) move them to a common
> place.
>
>
Am Donnerstag, 22. Oktober 2015, 08:34:38 schrieb Doug Anderson:
> Note that personally I would only choose the "highest" priority as an
> absolute last resort. Leaving a little extra slack in there means
> that when the next person comes up with a really good reason to run
> before you do that
Am Montag, 12. Oktober 2015, 20:32:47 schrieb Kishon Vijay Abraham I:
> Hi,
>
> On Saturday 10 October 2015 09:25 PM, Yakir Yang wrote:
> > This phy driver would control the Rockchip DisplayPort module
> > phy clock and phy power, it is relate to analogix_dp-rockchip
> > dp driver. If you want DP
Hi Shawn,
Am Freitag, 14. August 2015, 16:34:35 schrieb Shawn Lin:
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these platforms. I've
Am Mittwoch, 12. August 2015, 16:12:41 schrieb Stephen Boyd:
Use the provider based method to get a clock's name so that we
can get rid of the clk member in struct clk_hw one day. Mostly
converted with the following coccinelle script.
@@
struct clk_hw *E;
@@
-__clk_get_name(E-clk)
Hi Yakir,
Am Samstag, 8. August 2015, 11:54:38 schrieb Yakir Yang:
+static int rockchip_dp_init(struct rockchip_dp_device *dp)
+{
+ struct device *dev = dp-dev;
+ struct device_node *np = dev-of_node;
+ int ret;
+
+ dp-grf = syscon_regmap_lookup_by_phandle(np, rockchip,grf);
+
Hi Yakir,
I think this Rockchip portion is missing a devicetree binding.
You have the ability to power down the actual edp phy by using
grf_edp_iddq_en from GRF_SOC_CON12. This is similar to how the
rk3288 usb-phy gets put into a deeper state. So maybe you could
provide a phy driver
Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
Hello,
This is a v7 of a series that adds support for multiple EC in a system
and also for the protocol version 3 that is used on newer ECs.
Most patches were taken from the downstream ChromiumOS v3.14 tree with
fixes
Hi,
Am Dienstag, 21. April 2015, 15:17:51 schrieb Bartlomiej Zolnierkiewicz:
Add cluster regulator support as a preparation to adding
generic arm_big_little_dt cpufreq_dt driver support for
ODROID-XU3 board. This allows arm_big_little[_dt] driver
to set not only the frequency but also the
Am Donnerstag, 4. Juni 2015, 12:13:54 schrieb Jiang Liu:
Now most IRQ flow handlers make no use of the first parameter 'irq'.
And for those who do make use of 'irq', we could easily get the irq
number through irq_desc-irq_data-irq. So kill the first parameter
'irq' of irq_flow_handler_t.
To
Am Donnerstag, 4. Juni 2015, 12:13:16 schrieb Jiang Liu:
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.
Signed-off-by: Jiang Liu jiang@linux.intel.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
Am Dienstag, 2. Juni 2015, 10:11:03 schrieb Javier Martinez Canillas:
Hello,
Newer Chromebooks have more than one Embedded Controller (EC) in the
system. These additional ECs are connected through I2C with a host EC
which is the one that is connected to the Application Processor (AP)
Hi Boris,
Am Freitag, 17. April 2015, 09:29:28 schrieb Boris Brezillon:
Clock rates are stored in an unsigned long field, but -round_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long
Am Montag, 6. April 2015, 18:15:02 schrieb Javier Martinez Canillas:
Commit 1b84f2a4cd4a (mfd: cros_ec: Use fixed size arrays to transfer
data with the EC) modified the struct cros_ec_command fields to not
use pointers for the input and output buffers and use fixed length
arrays instead.
Hi Javier,
Am Donnerstag, 16. April 2015, 09:29:59 schrieb Javier Martinez Canillas:
Hello,
On 04/06/2015 06:14 PM, Javier Martinez Canillas wrote:
Newer Chromebooks have more than one Embedded Controller (EC) in the
system. These additional ECs are connected through I2C with a host EC
Am Donnerstag, 15. Januar 2015, 16:16:03 schrieb Arnd Bergmann:
Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.
Signed-off-by: Arnd Bergmann a...@arndb.de
very nice
Hi Stefan,
Am Donnerstag, 18. Dezember 2014, 14:43:01 schrieb Stefan Hengelein:
So you actually tested the code I removed in the patch? can you
provide a configuration that compiles that piece of code?
Yep, one of my boards (Asus eeeReader DR-900) was actually able to transmit
stuff via the
Am Dienstag, 30. September 2014, 15:30:00 schrieb Guenter Roeck:
On Tue, Sep 30, 2014 at 02:20:02PM -0700, Andrew Morton wrote:
On Tue, 19 Aug 2014 17:45:27 -0700 Guenter Roeck li...@roeck-us.net
wrote:
Introduce a system restart handler call chain to solve the described
problems.
So
Hi Pankaj,
Am Dienstag, 30. September 2014, 09:33:38 schrieb Pankaj Dubey:
Hi,
On Monday, September 29, 2014 9:38 PM, Heiko Stübner wrote,
Am Montag, 29. September 2014, 14:17:38 schrieb Pankaj Dubey:
Currently a syscon entity can be only registered directly through a
platform
Am Montag, 29. September 2014, 14:17:38 schrieb Pankaj Dubey:
Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated syscon driver. However in
certain use cases it is desirable to make a device used with another
driver a syscon interface
Hi Pankaj, Joachim,
Am Dienstag, 23. September 2014, 20:12:50 schrieb Joachim Eastwood:
On 22 September 2014 06:40, Pankaj Dubey pankaj.du...@samsung.com wrote:
Currently a syscon entity can be only registered directly through a
platform device that binds to a dedicated syscon driver.
The restart-handler series from Guenter Roeck got accepted recently and
implements among other things also the restart handler in the samsung
watchdog driver and where applicable in the clock drivers. So there is
no need for having the restart callbacks in s3c24xx boards anymore.
Signed-off-by:
Am Samstag, 23. August 2014, 09:35:05 schrieb Guenter Roeck:
On Tue, Aug 19, 2014 at 05:45:27PM -0700, Guenter Roeck wrote:
Various drivers implement architecture and/or device specific means
to restart (reset) the system. Various mechanisms have been implemented
to support those schemes.
Am Mittwoch, 20. August 2014, 21:15:10 schrieb Doug Anderson:
Guenter / Heiko,
On Tue, Aug 19, 2014 at 5:45 PM, Guenter Roeck li...@roeck-us.net wrote:
From: Heiko Stübner he...@sntech.de
Add infrastructure to write the correct value to the restart register and
register the restart
Am Donnerstag, 7. August 2014, 16:38:02 schrieb Jaehoon Chung:
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed
Am Freitag, 1. August 2014, 13:26:43 schrieb Jaehoon Chung:
Hi, All.
It seems too late that this patch-set is merged into linux-3.16.
Also there are some conflicts in device-tree. (I will remove the conflicts)
So if everybody is ok, I will rebase on linux-next after released
linux-3.16. At
Hi,
Am Mittwoch, 30. Juli 2014, 20:05:09 schrieb Jaehoon Chung:
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed
Am Sonntag, 27. Juli 2014, 23:10:21 schrieb Hartmut Knaack:
Arnd Bergmann schrieb:
@@ -205,6 +217,9 @@ static void exynos_adc_v1_init_hw(struct exynos_adc
*info)
/* Enable 12-bit ADC resolution */
con1 |= ADC_V1_CON_RES;
writel(con1, ADC_V1_CON(info-regs));
+
+ /*
Am Dienstag, 22. Juli 2014, 10:39:38 schrieb Arnd Bergmann:
On Tuesday 22 July 2014 11:11:14 Chanwoo Choi wrote:
This patch add support for s3c2410/s3c2416/s3c2440/s3c2443 ADC. The
s3c24xx
is alomost same as ADCv1. But, There are a little difference as following:
- ADCMUX register address
This series provides restart-notifier integration for the architectures
I care about - S3C24XX and Rockchip.
It of course depends on kernel: Add support for restart notifier call chain
from Guenter Roeck.
Samsung machines can generally be reset using their watchdog, but some
also provide a
S3C2412, S3C2443 and their derivatives contain a special software-reset
register in their system-controller.
Therefore register a restart-notifier for those.
Tested on a s3c2416-based board, s3c2412 compile-tested.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
On a lot of Samsung systems the watchdog is responsible for restarting the
system and until now this code was contained in plat-samsung/watchdog-reset.c .
With the introduction of the restart notifiers, this code can now move into
driver itself, removing the need for arch-specific code.
Tested
Add infrastructure to write the correct value to the restart register and
register the restart notifier for both rk3188 (including rk3066) and rk3188.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/clk/rockchip/clk-rk3188.c | 2 ++
drivers/clk/rockchip/clk-rk3288.c | 2 ++
Am Samstag, 5. Juli 2014, 13:00:43 schrieb Tomasz Figa:
On 05.07.2014 06:46, Viresh Kumar wrote:
On Fri, Jul 4, 2014 at 11:14 PM, Tomasz Figa t.f...@samsung.com wrote:
This huge series is a (hopefully final) attempt to convert Samsung
S5PV210
into a DT-only and multiplatform-aware
Am Montag, 30. Juni 2014, 20:49:18 schrieb Jaehoon Chung:
dw-mmc controller can support multiple slots.
But, there are no use-cases anywhere. So we don't need to support the
slot-node for dw-mmc controller.
And supports-highspeed property in dw-mmc is deprecated.
supports-highspeed property
Am Montag, 23. Juni 2014, 23:29:09 schrieb Vasily Khoruzhick:
There's a several typos in a driver: 2410 instead of S3C2410
and wrong argument to ARRAY_SIZE(). They prevent s3c2410
from properly booting.
Signed-off-by: Vasily Khoruzhick anars...@gmail.com
Thanks for catching these.
Am Montag, 23. Juni 2014, 23:29:10 schrieb Vasily Khoruzhick:
Without these aliases clock lookup fails in s3c2410fb,
s3cmci, s3c2410-nand, s3c24xx-i2s, and i2c-s3c2410 drivers.
Signed-off-by: Vasily Khoruzhick anars...@gmail.com
Reviewed-by: Heiko Stuebner he...@sntech.de
---
Am Freitag, 30. Mai 2014, 21:54:13 schrieb Seungwon Jeon:
+ Dinh Nguyen dingu...@altera.com
+ Heiko Stuebner he...@sntech.de
On Wed, May 28, 2014, Jaehoon Chung wrote:
dw-mmc controller can support the multiple slot.
So each slot's property can be difference.
And support-highspeed
Heiko Stübner on this. Heiko, you seem to have done some work on
i80 in the past[0] and I'm wondering if you could share any insights you
may have here.
In particular I'd like your take on the approach taken in this patch to
describe i80 parameters to a generic command-mode display timings
be other
people following that list that might be interested in looking at this
series, while not subscribed to alsa-devel - I can name at least Heiko
Stübner, who should be able to test it on further s3c24xx-based boards.
Sadly, I don't have a working sound setup on my 2 s3c boards.
Heiko
Am Mittwoch, 21. Mai 2014, 18:39:26 schrieb Vasily Khoruzhick:
On Wed, May 21, 2014 at 6:29 PM, Heiko Stübner he...@sntech.de wrote:
Am Mittwoch, 21. Mai 2014, 17:07:47 schrieb Tomasz Figa:
On 21.05.2014 16:53, Vasily Khoruzhick wrote:
On Wed, May 21, 2014 at 4:28 PM, Tomasz Figa t.f
Am Mittwoch, 21. Mai 2014, 19:09:19 schrieb Vasily Khoruzhick:
On Wed, May 21, 2014 at 6:56 PM, Heiko Stübner he...@sntech.de wrote:
Openmoko Freerunner (S3C2440) where there may be sound reachable someway
and a Oyo ebook-reader (S3C2416) whose i2s is I think compatible with
the s3c64xx
Am Donnerstag, 15. Mai 2014, 11:18:44 schrieb Doug Anderson:
Thomas,
On Tue, May 13, 2014 at 6:11 PM, Thomas Abraham ta.oma...@gmail.com wrote:
From: Thomas Abraham thomas...@samsung.com
+static int exynos4210_armclk_pre_rate_change(struct clk_notifier_data
*ndata, +
Hi Doug,
Am Donnerstag, 15. Mai 2014, 12:36:45 schrieb Doug Anderson:
On Thu, May 15, 2014 at 12:17 PM, Heiko Stübner he...@sntech.de wrote:
Am Donnerstag, 15. Mai 2014, 11:18:44 schrieb Doug Anderson:
Thomas,
On Tue, May 13, 2014 at 6:11 PM, Thomas Abraham ta.oma...@gmail.com
wrote
Am Mittwoch, 14. Mai 2014, 18:35:29 schrieb Viresh Kumar:
On 14 May 2014 18:20, Arnd Bergmann a...@arndb.de wrote:
Could we please come up with a way to probe this from DT in the
cpufreq-cpu0 driver itself, so we don't have to add a device in every
platform using it?
Its followed that way
Hi Kukjin,
Am Dienstag, 13. Mai 2014, 07:47:57 schrieb Kukjin Kim:
On 05/10/14 08:33, Heiko Stübner wrote:
Hi Tomasz,
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,
I remember
It is meant to go on top of for_3.16/exynos5260 in tfiga/samsung-clk git
which introduces an API change for the samsung ccf.
The separate patch
ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversion
should still go on top of this series.
changes since v2.1:
- adapt to changed samsung
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only write the raw value in the samsung_clock case.
The
This adds a driver for controlling the external clock outputs of
s3c24xx architectures including the dclk muxes and dividers.
The driver at the moment only supports the legacy non-dt boards using these
clock outputs. The clock-output control itself is part of the system-controller
mainly
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock framework
is enabled.
This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.
The
Describe the clock controller of s3c2410, s3c2440 and s3c2442.
Signed-off-by: Heiko Stuebner he...@sntech.de
Acked-by: Tomasz Figa t.f...@samsung.com
---
.../bindings/clock/samsung,s3c2410-clock.txt | 50 ++
1 file changed, 50 insertions(+)
create mode 100644
This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
As
This adds the necessary init functions to init the clocks from the common
clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy
clock code.
This also includes empty stubs for the *_setup_clocks functions that are
called from the cpufreq driver on resume.
Signed-off-by:
Convert all machines using these cpus to use the ccf clock driver
instead of the legacy Samsung clock implementation.
Some of the more esotheric machines will probably need a fixup, as they
do strange things to the clkout outputs, that I did not really understand
nor have the hardware to check.
Convert the machines using the s3c2410 to use the new driver based
on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup
from someone with the hardware.
Signed-off-by: Heiko Stuebner he...@sntech.de
With the move to the common clock framework completed for s3c2410, s3c2440
and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Tomasz Figa
Am Freitag, 9. Mai 2014, 18:49:41 schrieb Paul Bolle:
@@ -643,7 +654,8 @@ config MACH_RX1950
select PM_H1940 if PM
select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ
select S3C2440_XTAL_16934400
- select S3C24XX_DCLK
+ select S3C24XX_DCLK if SAMSUNG_CLOCK
+ select
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
On 09.05.2014 18:49, Paul Bolle wrote:
On Wed, 2014-04-23 at 22:09 +0200, Heiko Stübner wrote:
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock
Hi Tomasz,
Am Samstag, 10. Mai 2014, 01:11:45 schrieb Tomasz Figa:
On 10.05.2014 01:07, Heiko Stübner wrote:
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
On 09.05.2014 18:49, Paul Bolle wrote:
On Wed, 2014-04-23 at 22:09 +0200, Heiko Stübner wrote:
Add platform device
Am Dienstag, 6. Mai 2014, 13:16:14 schrieb Kukjin Kim:
Heiko Stübner wrote:
This series tries to simplify the s3c24xx debug macro, removing
dependencies
on mach/ includes, static mappings and finally moving it into
include/debug.
I think, it's good way :)
The one slightly invasive
Hi Arnd,
Am Freitag, 2. Mai 2014, 00:35:21 schrieb Arnd Bergmann:
On Thursday 01 May 2014 12:11:25 Mark Brown wrote:
On Tue, Apr 29, 2014 at 07:18:34PM +0800, Xia Kaixu wrote:
From: Arnd Bergmann a...@arndb.de
SND_S3C_DMA_LEGACY can only be set on S3C24xx, which does not
(yet)
Hi Sachin,
Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for achieving this.
Signed-off-by: Sachin Kamat
Am Donnerstag, 1. Mai 2014, 15:32:14 schrieb Arnd Bergmann:
On Thursday 01 May 2014 16:14:44 Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for
Am Montag, 28. April 2014, 17:56:31 schrieb Russell King - ARM Linux:
So, in response to Matt Porter's complaint about breaking prima2, here's
another 16 patches which changes the way the L2 cache is initialised on
many platforms. This series moves towards a situation where the generic
code
This finally removes all remaining SAMSUNG_CLOCK conditional code
from s3c24xx architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
This is of course meant to go on top of the s3c2410 ccf conversion
arch/arm/mach-s3c24xx/Kconfig | 5 -
arch/arm/mach-s3c24xx/common.c
This series tries to simplify the s3c24xx debug macro, removing dependencies
on mach/ includes, static mappings and finally moving it into include/debug.
The one slightly invasive change is the need for the developer to select
the uart type by himself, which gets rid of the debug macro trying to
addruart from the generic debug macro is doing exactly the same using
the common lowlevel uart definition, so there is no cause for this
special casing for s3c24xx.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/compressed/head.S | 5 -
1 file changed, 5 deletions(-)
diff
Using the lowlevel debug uart is a corner case - even more so in a
multiplatform environment. So it seems reasonable to simply let the
developer set the appropriate uart type for the debugged SoC.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug
This removes the need for mach/-headers in the debug macro.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug | 19 +--
arch/arm/mach-s3c24xx/include/mach/debug-macro.S | 9 ++---
2 files changed, 19 insertions(+), 9
Move debug-macro.S from mach/include to include/debug where all other common
debug macros are.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug | 1 +
.../{mach-s3c24xx/include/mach/debug-macro.S = include/debug/s3c24xx.S}
Am Donnerstag, 24. April 2014, 11:34:55 schrieb Russell King - ARM Linux:
On Thu, Apr 24, 2014 at 12:24:31PM +0200, Heiko Stübner wrote:
+choice
+ prompt S3C24XX low-level debugging port type
+ depends on DEBUG_LL ARCH_S3C24XX
+
+ config DEBUG_S3C24XX_UART_S3C2440
This series tries to simplify the s3c24xx debug macro, removing dependencies
on mach/ includes, static mappings and finally moving it into include/debug.
The one slightly invasive change is the need for the developer to select
the uart type by himself, which gets rid of the debug macro trying to
addruart from the generic debug macro is doing exactly the same using
the common lowlevel uart definition, so there is no cause for this
special casing for s3c24xx.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/boot/compressed/head.S | 5 -
1 file changed, 5 deletions(-)
diff
Using the lowlevel debug uart is a corner case - even more so in a
multiplatform environment. So it seems reasonable to simply let the
developer set the appropriate uart type for the debugged SoC.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock framework
is enabled.
This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.
The
Describe the clock controller of s3c2410, s3c2440 and s3c2442.
Signed-off-by: Heiko Stuebner he...@sntech.de
Acked-by: Tomasz Figa t.f...@samsung.com
---
.../bindings/clock/samsung,s3c2410-clock.txt | 50 ++
1 file changed, 50 insertions(+)
create mode 100644
This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
As
This adds the necessary init functions to init the clocks from the common
clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy
clock code.
This also includes empty stubs for the *_setup_clocks functions that are
called from the cpufreq driver on resume.
Signed-off-by:
Convert all machines using these cpus to use the ccf clock driver
instead of the legacy Samsung clock implementation.
Some of the more esotheric machines will probably need a fixup, as they
do strange things to the clkout outputs, that I did not really understand
nor have the hardware to check.
Convert the machines using the s3c2410 to use the new driver based
on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup
from someone with the hardware.
Signed-off-by: Heiko Stuebner he...@sntech.de
With the move to the common clock framework completed for s3c2410, s3c2440
and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Tomasz Figa
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock framework
is enabled.
This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.
The
Convert the machines using the s3c2410 to use the new driver based
on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup
from someone with the hardware.
Signed-off-by: Heiko Stuebner he...@sntech.de
With the move to the common clock framework completed for s3c2410, s3c2440
and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Tomasz Figa
Am Mittwoch, 23. April 2014, 22:55:51 schrieb Tomasz Figa:
Hi,
On 23.04.2014 22:42, Sergei Shtylyov wrote:
Hello.
On 04/23/2014 11:34 PM, Heiko Stübner wrote:
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only write the raw value in the samsung_clock case.
The
Hi,
Am Mittwoch, 16. April 2014, 16:35:36 schrieb Arnd Bergmann:
On Wednesday 16 April 2014 17:20:51 Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic.
Signed-off-by: Sachin Kamat
Am Donnerstag, 3. April 2014, 18:24:25 schrieb Kukjin Kim:
Mike Turquette wrote:
Quoting Kukjin Kim (2014-04-01 21:25:45)
Heiko Stübner wrote:
Hi Arnd,
Am Samstag, 29. März 2014, 02:47:33 schrieb Arnd Bergmann:
On Friday 28 March 2014, Kukjin Kim wrote:
Kukjin Kim
Hi Arnd,
Am Samstag, 29. März 2014, 02:47:33 schrieb Arnd Bergmann:
On Friday 28 March 2014, Kukjin Kim wrote:
Kukjin Kim wrote:
On 03/19/14 13:01, Mike Turquette wrote:
Thanks :-)
Acked-by: Mike Turquettemturque...@linaro.org
It's time. Please pull this [5/6] and [GIT
Am Donnerstag, 27. Februar 2014, 10:48:26 schrieb Pankaj Dubey:
On 02/27/2014 09:16 AM, Mike Turquette wrote:
Quoting Pankaj Dubey (2014-02-25 21:24:07)
CC: Ben Dooks ben-li...@fluff.org
CC: Kukjin Kim kgene@samsung.com
CC: Russell King li...@arm.linux.org.uk
Signed-off-by:
Am Sonntag, 16. Februar 2014, 18:32:24 schrieb Heiko Stübner:
On 2014-01-06 Sachin Kamat posted two patches converting Exynos to use
the generic uncompress.h.
But in fact all Samsung platforms can go this route, as all Samsung
uncompress.h files are simply used to set up the serial port
Am Dienstag, 25. Februar 2014, 21:11:09 schrieb Sachin Kamat:
Hi Heiko,
On 25 February 2014 19:47, Heiko Stübner he...@sntech.de wrote:
Am Sonntag, 16. Februar 2014, 18:32:24 schrieb Heiko Stübner:
On 2014-01-06 Sachin Kamat posted two patches converting Exynos to use
the generic
Two patches from Sachin Kamat already removed the Exynos-uncompress.h .
But in fact all Samsung platforms can use the generic uncompress code
without needing local implementation.
Therefore this two-part series removes the rest of the uncompress.h files
from all Samsung platforms.
Tested on a
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