Keep a pointer to the corresponding s3c_irq_data struct as irq_chip_data.
This removes the need to fetch the intc struct from the irq_domains
host_data, thus making it independent of the underlying irq_domain
structure.
Also keep the real register offset of the interrupt in the s3c_irq_data
Hi Arnd,
thanks again for taking the time to look at the changes.
Am Montag, 25. März 2013, 23:00:46 schrieb Arnd Bergmann:
On Monday 25 March 2013, Heiko Stübner wrote:
Add the necessary code to initialize the interrupt controller
thru devicetree data using the irqchip infrastructure
This v6 addresses more comments from Arnd Bergmann, setting the compatible
property to the first supported SoC (s3c2410) instead of using the s3c24xx
wildcard. It also switches the parent-irq and controller irq in the dt
irq descriptor bringing it to a format of
ctrl_num parent_irq ctrl_irq
This move is necessary to make use of the irqchip infrastructure
for the following devicetree support for s3c24xx architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c24xx/Makefile |2 +-
drivers/irqchip/Makefile
Might be confusing for people to read the code without having the
datasheet nearby.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/irqchip/irq-s3c24xx.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-s3c24xx.c
The list in used was from the s3c2450, a close cousin of the s3c2416.
As it's not possible to distinguish between the s3c2416 and s3c2450
the additional interrupts of the s3c2450 will only be available thru
devicetree later.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
Enables post-init setting of the desired typehandler for the interrupt.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/irqchip/irq-s3c24xx.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/irqchip/irq-s3c24xx.c b/drivers/irqchip/irq-s3c24xx.c
For dt-enabled machines we want to use a big irq_domain over all controllers
and therefore need to access not only the main controllers but the
sub-controller as well.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/irqchip/irq-s3c24xx.c | 99 +
Keep a pointer to the corresponding s3c_irq_data struct as irq_chip_data.
This removes the need to fetch the intc struct from the irq_domains
host_data, thus making it independent of the underlying irq_domain
structure.
Also keep the real register offset of the interrupt in the s3c_irq_data
Add the necessary code to initialize the interrupt controller
thru devicetree data using the irqchip infrastructure.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 53 +
drivers/irqchip/irq-s3c24xx.c | 231
Am Dienstag, 5. März 2013, 18:42:17 schrieb Arnd Bergmann:
No other file in the kernel besides i2c-s3c2410.c uses
the current plat/regs-iic.h, so we can simply move the
header file to live in the same directory as the driver,
as a preparation to multiplatform builds.
A patch doing the same is
Am Donnerstag, 4. April 2013, 18:36:57 schrieb Tomasz Figa:
This series is an attempt to make the samsung-time clocksource driver ready
for multiplatform kernels. It moves the driver to drivers/clocksource,
cleans it up from uses of static platform-specific definitions, simplifies
timer
this by increasing NR_IRQS to at least (IRQ_S3C2443_AC97 + 1)
if CPU_S3C2440 is selected, so the subintc IRQ domain gets properly
registered.
Cc: Heiko Stübner he...@sntech.de
Signed-off-by: Tomasz Figa tomasz.f...@gmail.com
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Thanks
Am Montag, 8. April 2013, 21:53:07 schrieb Sylwester Nawrocki:
The external pending interrupt register address (EINTPEND) offset is
0xa8, not 0x08. Without this patch the external interrupts are not
properly acknowledged, which may lead to an interrupt storm and the
system hang as soon as any
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller
Am Mittwoch, 10. April 2013, 12:15:48 schrieb Kukjin Kim:
Heiko Stübner wrote:
This is the second installment of beginning devicetree support the
Samsung S3C24xx architectures and focuses on the s3c2416 for now.
Included is the devicetree support for the s3c24xx irq controller
Hi Tomasz,
thanks for your comments, more inline.
Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
Hi Heiko,
Basically looks good to me, but please see my inline comments about
handling of EINT0-3.
On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
The s3c24xx pins
Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
Hi Tomasz,
thanks for your comments, more inline.
Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
Hi Heiko,
Basically looks good to me
Am Mittwoch, 10. April 2013, 21:51:11 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
Hi Tomasz,
thanks for your comments, more
Am Mittwoch, 10. April 2013, 22:17:43 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 22:11:03 Heiko Stübner wrote:
Am Mittwoch, 10. April 2013, 21:51:11 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
Am Mittwoch, 10. April 2013, 14:31:29 schrieb
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller
Am Donnerstag, 11. April 2013, 10:54:45 schrieb Tomasz Figa:
Hi Heiko,
As previously, generally looks good to me, but see my comments inline.
On Thursday 11 of April 2013 01:16:41 Heiko Stübner wrote:
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore
Am Donnerstag, 11. April 2013, 11:43:19 schrieb Tomasz Figa:
On Thursday 11 of April 2013 11:32:03 Heiko Stübner wrote:
Am Donnerstag, 11. April 2013, 10:54:45 schrieb Tomasz Figa:
Hi Heiko,
As previously, generally looks good to me, but see my comments inline.
On Thursday 11
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller
Hi Arnd,
Am Donnerstag, 11. April 2013, 23:37:20 schrieb Arnd Bergmann:
No other file in the kernel besides i2c-s3c2410.c uses the current
plat/regs-iic.h, so we can simply move the header file to live in the
same directory as the driver, as a preparation to multiplatform builds.
There is
Hi Alexander,
Am Freitag, 12. April 2013, 14:20:45 schrieb Alexander Varnin:
Hello. I'm trying to bring up sdhci-s3c driver on S3C2443 SOC.
It seems to initialize correctly, but immediately after that it get
suspended by some force. This turns off all interrupts, so SD controller
doesn't
Hi Tomasz,
Am Freitag, 12. April 2013, 21:17:16 schrieb Tomasz Figa:
This series is an attempt to make the samsung-time clocksource driver ready
for multiplatform kernels. It moves the driver to drivers/clocksource,
cleans it up from uses of static platform-specific definitions, simplifies
Am Samstag, 13. April 2013, 00:26:43 schrieb Arnd Bergmann:
On Saturday 13 April 2013 00:22:48 Heiko Stübner wrote:
Without dt support, you get this:
CC drivers/clocksource/samsung_pwm.o
drivers/clocksource/samsung_pwm.c:620: warning:
‘samsung_pwm_clocksource_init_of’ defined
Definitions in s3c24xx.dtsi are usable for all s3c24xx SoCs, but some
need to be extended with proper compatible properties, as can be seen
in s3c2416.dtsi .
Signed-off-by: Heiko Stuebner he...@sntech.de
---
This patch depends on the not yet merged s3c24xx pinctrl support and
the samsung-time
Definitions in s3c24xx.dtsi are usable for all s3c24xx SoCs, but some
need to be extended with proper compatible properties, as can be seen
in s3c2416.dtsi .
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
changes since v1:
fix compatible
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller
Am Sonntag, 14. April 2013, 14:20:35 schrieb Wolfram Sang:
On Thu, Apr 11, 2013 at 02:04:50AM +0200, Arnd Bergmann wrote:
No other file in the kernel besides i2c-s3c2410.c uses the current
plat/regs-iic.h, so we can simply move the header file to live in the
same directory as the driver, as
The s3c2412 uses the same dma channel selection-type as the s3c2443 and later
but introduced the notion of a receive channel to keep the spi channels,
together that are separate in hardware.
This series split the spi channels like later socs do (the s3c24xx-spi driver
does not use dma at all) and
While s3c24xx before s3c2412 (2410, 2440, 2442) use one dma channel
for both sending and receiving spi data, all later s3c24xx socs use
separate channels.
To keep with the structure of one spi channel s3c2412 introduced
a channel_rx attribute to the map and selects the correct request
channel
The values read from the channel map always also contain the
DMA_CH_VALID (= 131) setting, which should not get written
into the register, even if this bit is unused.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c24xx/dma-s3c2443.c |3 ++-
1 files changed, 2
The s3c2412 dma init contained code to handle dma-direction specific
settings. As now all s3c2412-dma-channels are direction-independent this
is not needed anymore.
As the s3c2412 also was the only user of this, it can go away completely.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller
This series tries to provide a basic dmaengine driver for the s3c24xx
SoCs.
The driver currently has some limitations, in that it does not support the
earlier s3c24xx socs, that cannot use every channel, but have special
channel requirements for specific slave-targets.
Another limitation is,
Each dma channel has its own clock. The upcoming dma driver wants to
handle these itself and therefore needs to be able to get the correct
clock for a channel.
Therefore rename the dma clocks to dma.X for s3c2412, s3c2416 and
s3c2443. This does not change the behaviour for the old dma driver at
This adds a new driver to support the s3c24xx dma using the dmaengine
and make the old one in mach-s3c24xx obsolete in the long run.
Conceptually the s3c24xx-dma feels like a distant relative of the pl08x
with numerous virtual channels being mapped to a lot less physical ones.
The driver
The spi-s3c64xx device is also used on the s3c2416 and s3c2443 SoCs.
The driver also already uses only generic dma-engine operations.
Therefore add another elif to set the s3c24xx filter.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/plat-samsung/devs.c |5 -
1 files
Am Freitag, 10. Mai 2013, 02:32:05 schrieb Kukjin Kim:
Heiko Stübner wrote:
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.
The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts
Am Montag, 28. April 2014, 17:56:31 schrieb Russell King - ARM Linux:
So, in response to Matt Porter's complaint about breaking prima2, here's
another 16 patches which changes the way the L2 cache is initialised on
many platforms. This series moves towards a situation where the generic
code
Hi Sachin,
Am Donnerstag, 1. Mai 2014, 16:14:44 schrieb Sachin Kamat:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for achieving this.
Signed-off-by: Sachin Kamat
Am Donnerstag, 1. Mai 2014, 15:32:14 schrieb Arnd Bergmann:
On Thursday 01 May 2014 16:14:44 Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic SRAM bindings are used
for
Hi Arnd,
Am Freitag, 2. Mai 2014, 00:35:21 schrieb Arnd Bergmann:
On Thursday 01 May 2014 12:11:25 Mark Brown wrote:
On Tue, Apr 29, 2014 at 07:18:34PM +0800, Xia Kaixu wrote:
From: Arnd Bergmann a...@arndb.de
SND_S3C_DMA_LEGACY can only be set on S3C24xx, which does not
(yet)
Am Dienstag, 6. Mai 2014, 13:16:14 schrieb Kukjin Kim:
Heiko Stübner wrote:
This series tries to simplify the s3c24xx debug macro, removing
dependencies
on mach/ includes, static mappings and finally moving it into
include/debug.
I think, it's good way :)
The one slightly invasive
Am Freitag, 9. Mai 2014, 18:49:41 schrieb Paul Bolle:
@@ -643,7 +654,8 @@ config MACH_RX1950
select PM_H1940 if PM
select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ
select S3C2440_XTAL_16934400
- select S3C24XX_DCLK
+ select S3C24XX_DCLK if SAMSUNG_CLOCK
+ select
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
On 09.05.2014 18:49, Paul Bolle wrote:
On Wed, 2014-04-23 at 22:09 +0200, Heiko Stübner wrote:
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock
Hi Tomasz,
Am Samstag, 10. Mai 2014, 01:11:45 schrieb Tomasz Figa:
On 10.05.2014 01:07, Heiko Stübner wrote:
Am Freitag, 9. Mai 2014, 19:53:21 schrieb Tomasz Figa:
On 09.05.2014 18:49, Paul Bolle wrote:
On Wed, 2014-04-23 at 22:09 +0200, Heiko Stübner wrote:
Add platform device
It is meant to go on top of for_3.16/exynos5260 in tfiga/samsung-clk git
which introduces an API change for the samsung ccf.
The separate patch
ARM: S3C24XX: remove SAMSUNG_CLOCK remnants after ccf conversion
should still go on top of this series.
changes since v2.1:
- adapt to changed samsung
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only write the raw value in the samsung_clock case.
The
This adds a driver for controlling the external clock outputs of
s3c24xx architectures including the dclk muxes and dividers.
The driver at the moment only supports the legacy non-dt boards using these
clock outputs. The clock-output control itself is part of the system-controller
mainly
Add platform device and select the correct implementation automatically
depending on wether the old samsung_clock or the common clock framework
is enabled.
This is only done for machines already using the old dclk implementation,
as everybody else should move to use dt anyway.
The
Describe the clock controller of s3c2410, s3c2440 and s3c2442.
Signed-off-by: Heiko Stuebner he...@sntech.de
Acked-by: Tomasz Figa t.f...@samsung.com
---
.../bindings/clock/samsung,s3c2410-clock.txt | 50 ++
1 file changed, 50 insertions(+)
create mode 100644
This driver can handle the clock controllers of the socs mentioned above,
as they share a common clock tree with only small differences.
The clock structure is built according to the manuals of the included
SoCs and might include changes in comparison to the previous clock
structure.
As
This adds the necessary init functions to init the clocks from the common
clock framework and necessary CONFIG_SAMSUNG_CLOCK ifdefs around the legacy
clock code.
This also includes empty stubs for the *_setup_clocks functions that are
called from the cpufreq driver on resume.
Signed-off-by:
Convert all machines using these cpus to use the ccf clock driver
instead of the legacy Samsung clock implementation.
Some of the more esotheric machines will probably need a fixup, as they
do strange things to the clkout outputs, that I did not really understand
nor have the hardware to check.
Convert the machines using the s3c2410 to use the new driver based
on the common clock framework instead of the legacy Samsung clock driver.
As with the s3c244x, machines using the clkout output will need a fixup
from someone with the hardware.
Signed-off-by: Heiko Stuebner he...@sntech.de
With the move to the common clock framework completed for s3c2410, s3c2440
and s3c2442, the legacy clock code for these machines can go away too.
This also includes the legacy dclk code, as all legacy users are converted.
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Tomasz Figa
Hi Kukjin,
Am Dienstag, 13. Mai 2014, 07:47:57 schrieb Kukjin Kim:
On 05/10/14 08:33, Heiko Stübner wrote:
Hi Tomasz,
It seems this one just hit linux-next (in next-20140509).
Which is bad, because:
a) it conflicts with patches already applied in samsung-clk tree,
I remember
Am Mittwoch, 14. Mai 2014, 18:35:29 schrieb Viresh Kumar:
On 14 May 2014 18:20, Arnd Bergmann a...@arndb.de wrote:
Could we please come up with a way to probe this from DT in the
cpufreq-cpu0 driver itself, so we don't have to add a device in every
platform using it?
Its followed that way
Am Donnerstag, 15. Mai 2014, 11:18:44 schrieb Doug Anderson:
Thomas,
On Tue, May 13, 2014 at 6:11 PM, Thomas Abraham ta.oma...@gmail.com wrote:
From: Thomas Abraham thomas...@samsung.com
+static int exynos4210_armclk_pre_rate_change(struct clk_notifier_data
*ndata, +
Hi Doug,
Am Donnerstag, 15. Mai 2014, 12:36:45 schrieb Doug Anderson:
On Thu, May 15, 2014 at 12:17 PM, Heiko Stübner he...@sntech.de wrote:
Am Donnerstag, 15. Mai 2014, 11:18:44 schrieb Doug Anderson:
Thomas,
On Tue, May 13, 2014 at 6:11 PM, Thomas Abraham ta.oma...@gmail.com
wrote
be other
people following that list that might be interested in looking at this
series, while not subscribed to alsa-devel - I can name at least Heiko
Stübner, who should be able to test it on further s3c24xx-based boards.
Sadly, I don't have a working sound setup on my 2 s3c boards.
Heiko
Am Mittwoch, 21. Mai 2014, 18:39:26 schrieb Vasily Khoruzhick:
On Wed, May 21, 2014 at 6:29 PM, Heiko Stübner he...@sntech.de wrote:
Am Mittwoch, 21. Mai 2014, 17:07:47 schrieb Tomasz Figa:
On 21.05.2014 16:53, Vasily Khoruzhick wrote:
On Wed, May 21, 2014 at 4:28 PM, Tomasz Figa t.f
Am Mittwoch, 21. Mai 2014, 19:09:19 schrieb Vasily Khoruzhick:
On Wed, May 21, 2014 at 6:56 PM, Heiko Stübner he...@sntech.de wrote:
Openmoko Freerunner (S3C2440) where there may be sound reachable someway
and a Oyo ebook-reader (S3C2416) whose i2s is I think compatible with
the s3c64xx
Heiko Stübner on this. Heiko, you seem to have done some work on
i80 in the past[0] and I'm wondering if you could share any insights you
may have here.
In particular I'd like your take on the approach taken in this patch to
describe i80 parameters to a generic command-mode display timings
Am Freitag, 30. Mai 2014, 21:54:13 schrieb Seungwon Jeon:
+ Dinh Nguyen dingu...@altera.com
+ Heiko Stuebner he...@sntech.de
On Wed, May 28, 2014, Jaehoon Chung wrote:
dw-mmc controller can support the multiple slot.
So each slot's property can be difference.
And support-highspeed
Am Montag, 23. Juni 2014, 23:29:09 schrieb Vasily Khoruzhick:
There's a several typos in a driver: 2410 instead of S3C2410
and wrong argument to ARRAY_SIZE(). They prevent s3c2410
from properly booting.
Signed-off-by: Vasily Khoruzhick anars...@gmail.com
Thanks for catching these.
Am Montag, 23. Juni 2014, 23:29:10 schrieb Vasily Khoruzhick:
Without these aliases clock lookup fails in s3c2410fb,
s3cmci, s3c2410-nand, s3c24xx-i2s, and i2c-s3c2410 drivers.
Signed-off-by: Vasily Khoruzhick anars...@gmail.com
Reviewed-by: Heiko Stuebner he...@sntech.de
---
Hi Kgene,
Am Sonntag 02 Oktober 2011, 09:38:18 schrieb Kukjin Kim:
How about following? I think following is also not bad...
ok, I don't claim to have the right solution, so if keeping the TYPE_xxx enum
is better, I will do a rework of the series according to your solution and
resend it.
Am Mittwoch, 5. Oktober 2011, 07:31:09 schrieb Rajeshwari Shinde:
Add support for lookup of sdhci-s3c controller clocks using generic names
for s3c2416, s3c64xx, s5pc100, s5pv210 and exynos4 SoC's.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
[...]
diff --git
Hi Kgene,
Am Montag, 10. Oktober 2011, 06:28:19 schrieb Kukjin Kim:
Kukjin Kim wrote:
Heiko Stübner wrote:
Hi Kgene,
Am Sonntag 02 Oktober 2011, 09:38:18 schrieb Kukjin Kim:
How about following? I think following is also not bad...
ok, I don't claim to have the right
The adc blocks of S3C2443 and S3C2416/2450 differ in some regards
from previous (S3C2410, etc) and later (S3C64XX, S5P) SoCs.
This patch series adds support for these ADC implementations.
Each patch was compile tested. But as I have only access to S3C2416
hardware, real life testing happened
The adc blocks of the S3C2443 and S3C2416 define some
additional registers and bits.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/plat-samsung/include/plat/regs-adc.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git
The mux bits in the adccon register should be cleared only
if muxing is really done in ADCCON and not another register.
This patch introduces a conditional for this.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/plat-samsung/adc.c |3 ++-
1 files changed, 2 insertions(+), 1
The adc blocks of S3C2443 and S3C2416 contain quirks not present
in the stock S3C24xx adc. Therefore allow them to alter the
device name via s3c_adc_setname.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/plat-samsung/include/plat/adc-core.h |2 +-
1 files changed, 1
The S3C2443-adc is 10 bit wide and has its mux-select
in an extra register at base+0x18
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c2443/s3c2443.c |3 +++
arch/arm/plat-samsung/adc.c | 17 -
2 files changed, 15 insertions(+), 5 deletions(-)
diff
The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its
source selection in the register base+0x18 and its width
selection in bit 03 of the ADCCON register.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c2416/s3c2416.c |3 +++
arch/arm/plat-samsung/adc.c | 25
Hi,
somehow this did not apply against linux-next for me:
error: patch failed: arch/arm/mach-exynos4/clock.c:1250
error: arch/arm/mach-exynos4/clock.c: patch does not apply
error: patch failed: arch/arm/mach-s3c64xx/clock.c:697
error: arch/arm/mach-s3c64xx/clock.c: patch does not apply
error:
Hi Kgene,
Am Freitag, 14. Oktober 2011, 09:14:11 schrieb Kukjin Kim:
Heiko Stübner wrote:
[...]
Heiko Stuebner (8):
S3C2416: Add armdiv_mask constant.
[...]
As a note, if required, 1st patch which is fixing will be sent to stable.
I don't think this is really necessary.
The original
These days most Samsung stuff gets in the kernel through Kukjin Kim.
This patch changes MAINTAINERS to reflect this.
By adding Kukjin Kim to the maintainers for S3C2410, S3C244x and
S3C64xx alongside Ben Dooks the extra entries become identical to the
base ARM/SAMSUNG entry and can move into it.
Am Sonntag 23 Oktober 2011, 00:12:14 schrieb Heiko Stübner:
These days most Samsung stuff gets in the kernel through Kukjin Kim.
This patch changes MAINTAINERS to reflect this.
By adding Kukjin Kim to the maintainers for S3C2410, S3C244x and
S3C64xx alongside Ben Dooks the extra entries
Hi Paul,
Am Donnerstag, 10. November 2011, 01:14:59 schrieb Thomas Abraham:
On 10 November 2011 05:00, Paul Schilling paul.s.schill...@gmail.com
wrote:
Boot past init slow - stalled when using jffs2 also.
On Wed, Nov 9, 2011 at 4:12 PM, Paul Schilling
paul.s.schill...@gmail.com
Am Dienstag, 15. November 2011, 08:11:05 schrieb Kukjin Kim:
Kukjin Kim wrote:
Heiko Stübner wrote:
Am Sonntag 23 Oktober 2011, 00:12:14 schrieb Heiko Stübner:
These days most Samsung stuff gets in the kernel through Kukjin Kim.
This patch changes MAINTAINERS to reflect
Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.
This series adds support for those SoCs.
As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according
regs-rtc.h uses a mixture of tabs and spaces and also (xy)
to format bits. So, before adding new stuff clean up the formatting
and also add spaces to the bit definitions (i.e. (x y) )
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/plat-samsung/include/plat/regs-rtc.h | 66
Use the data field of of_device_id to hold the type for
s3c_cpu_type.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/rtc/rtc-s3c.c | 27 +--
1 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index
As the S3C24xx SoCs use the same rtc device a renaming capability like in
the adc driver is necessary.
This patch adds a s3c_rtc_setname function and names the rtc devices for
S3C2443 and S3C2416 accordingly.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c2416/s3c2416.c
Hi Thomas,
thanks for your review and you are of course right with both your suggestions.
I will submit a v2 series shortly, implementing these suggestions.
Heiko
Am Sonntag, 11. Dezember 2011, 06:47:43 schrieb Thomas Abraham:
Hi Heiko,
On 9 December 2011 15:20, Heiko Stübner he
Use the data field of of_device_id to hold the type for
s3c_cpu_type.
Signed-off-by: Heiko Stuebner he...@sntech.de
Reviewed-by: Thomas Abraham thomas.abra...@linaro.org
---
drivers/rtc/rtc-s3c.c | 31 ++-
1 files changed, 22 insertions(+), 9 deletions(-)
diff
Am Montag, 5. Dezember 2011, 15:06:06 schrieb Mark Brown:
Add stub runtime_pm calls which go through the flow of enabling and
disabling but don't actually do anything with the device itself as
there's nothing useful we can do. This provides the core PM framework
with information about when the
Am Dienstag, 13. Dezember 2011, 15:49:44 schrieb Heiko Stübner:
Am Montag, 5. Dezember 2011, 17:50:13 schrieb Mark Brown:
Enable and disable the clocks to the SPI controller using runtime PM.
This serves the dual purpose of reducing power consumption a little and
letting the core know when
Am Donnerstag, 15. Dezember 2011, 00:54:58 schrieb Axel Lin:
Hi Kukjin,
Axel and Will, thanks for pointing out.
Oops, I couldn't have much time to follow up :(
But let me look at that in this weekend and I know, it can be escaped
before merge window :)
I also found the same build
As the driver is also buildable as a module it should need
a cleanup function for the removal of the module.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/usb/gadget/s3c-hsudc.c | 25 +
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git
The number of get and put calls should always be equal.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/usb/gadget/s3c-hsudc.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/gadget/s3c-hsudc.c b/drivers/usb/gadget/s3c-hsudc.c
index
Instead of adding and deleting the gadget device in the start and stop
invocations. Use device_register in the probe method to initialize
and add the gadget device and unregister it in the remove function.
This also requires a release function for the gadget device.
Signed-off-by: Heiko Stuebner
udc_start and udc_stop reduce code duplication in comparison to
start and stop generalising calls done by all drivers
(i.e. bind and unbind) and moving these calls to common code.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/usb/gadget/s3c-hsudc.c | 44
The udc has three supplies: vdda (3.3V), vddi (1.2V) and vddosc (1.8-3.3V).
Turn these on and off on start and stop calls.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/usb/gadget/s3c-hsudc.c | 43 ---
1 files changed, 39 insertions(+), 4
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