Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 68
-
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
The patch removes redundant checks, redundant HW reads
and simplifies code.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 64
1 file changed, 15
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame was processed correctly. The patch fixes it.
I can't understand well, then we don't need to
On 08/26/2014 03:35 PM, Andrzej Hajda wrote:
On 08/26/2014 07:57 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
FIMC in default mode of operation uses only one input buffer,
but the driver used also second buffer, as a result only the
first frame
memory
drm/exynos/ipp: remove events during command cleaning
drm/exynos/fimc: avoid clearing overflow bits
drm/exynos/fimc: do not enable fimc twice
drm/exynos/fimc: simplify buffer queuing
drm/exynos/fimc: fix source buffer registers
With some minor comments,
Reviewed-by: Joonyoung Shim
Hi,
On 08/27/2014 07:27 PM, Andrzej Hajda wrote:
On 08/26/2014 07:00 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 08/22/2014 04:52 PM, Andrzej Hajda wrote:
In case of allocation errors some already allocated buffers
were not freed. The patch fixes it.
Signed-off-by: Andrzej Hajda a.ha
Hi Andrzej,
On 08/28/2014 06:07 PM, Andrzej Hajda wrote:
Since file pointer is preserved in c_node passing it
as argument in node functions is redundant.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 14 ++
1 file changed, 6
Hi Andrzej,
On 08/28/2014 06:07 PM, Andrzej Hajda wrote:
Process should not have access to ipp nodes created by another
process. The patch adds necessary checks.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 15 ++-
1 file
+---
1 file changed, 5 insertions(+), 7 deletions(-)
About both patch 16 and 17
Reviewed-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 05f0f4e..9e9714a 100644
--- a/drivers/gpu
Hi,
On 09/17/2014 03:49 PM, Inki Dae wrote:
On 2014년 09월 17일 15:35, Andrzej Hajda wrote:
Hi,
On 09/16/2014 08:35 AM, Daniel Vetter wrote:
On Mon, Sep 15, 2014 at 12:52:17PM -0600, Daniel Drake wrote:
Pageflipping currently causes some inconsistencies that lead to
crashes. Just run an app
Hi,
On 09/18/2014 01:41 AM, Daniel Drake wrote:
On Wed, Sep 17, 2014 at 7:45 AM, Daniel Vetter dan...@ffwll.ch wrote:
I think fb refcounting in exynos is just plain busted. If you look at
other drivers the only place the refcount framebuffers or backing
storage objects is for pageflips to
Hi,
On 09/17/2014 10:48 PM, Inki Dae wrote:
This patch removes DRM_EXYNOS_GEM_MMAP ictrl feature specific
to Exynos drm and instead uses drm generic mmap.
We had used the interface specific to Exynos drm to do mmap directly,
not to use demand paging which maps each page with physical memory
Hi Andrzej,
On 09/18/2014 10:17 PM, Andrzej Hajda wrote:
The patch replaces legacy functions
drm_plane_init() / drm_crtc_init() with
drm_universal_plane_init() and drm_crtc_init_with_planes().
It allows to replace fake primary plane with the real one.
Signed-off-by: Andrzej Hajda
Hi,
On 09/19/2014 07:54 PM, Andrzej Hajda wrote:
On 09/19/2014 03:02 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 09/18/2014 10:17 PM, Andrzej Hajda wrote:
The patch replaces legacy functions
drm_plane_init() / drm_crtc_init() with
drm_universal_plane_init() and drm_crtc_init_with_planes
Hi,
On 09/19/2014 08:11 PM, Joonyoung Shim wrote:
Hi,
On 09/19/2014 07:54 PM, Andrzej Hajda wrote:
On 09/19/2014 03:02 AM, Joonyoung Shim wrote:
Hi Andrzej,
On 09/18/2014 10:17 PM, Andrzej Hajda wrote:
The patch replaces legacy functions
drm_plane_init() / drm_crtc_init
The exynos5 SoCs using A15+A7 can boot to A15 or A7. If it boots using
A7, it can't detect right UART physical address only the part number of
CP15. It's possible to solve as checking Cluster ID additionally.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/include/debug
Hi Tomasz,
On 10/02/2014 12:13 AM, Tomasz Figa wrote:
Hi Inki,
On 17.09.2014 15:48, Inki Dae wrote:
This interface and relevant codes aren't used anymore.
Hmm, I might be missing something, but after removing this IOCTL, how do
we obtain an offset to pass to mmap()?
There is
6de01473746af225c688ee430123001d57d9af2a Mon Sep 17 00:00:00 2001
From: Joonyoung Shim jy0922.s...@samsung.com
Date: Thu, 2 Oct 2014 17:48:27 +0900
Subject: [PATCH] drm/exynos: use drm_vblank_on()
We need to use drm_vblank_on() as a counterpart to drm_vblank_off()
after the commit 7ffd7a68511c (drm: Always reject
Hi,
Kevin Hilman khilman at kernel.org writes:
Hi Abhilash,
Abhilash Kesavan a.kesavan at samsung.com writes:
I had noticed a similar issue where only 6 cores would come up during
development on 5420. This was because there was a check in our u-boot
secondary boot-up path which
Hi,
On 10/17/2014 09:06 PM, Kevin Hilman wrote:
On Wed, Oct 15, 2014 at 4:35 AM, Joonyoung Shim jy0922.s...@samsung.com
wrote:
Hi,
Kevin Hilman khilman at kernel.org writes:
Hi hdmi_resources_init,
Abhilash Kesavan a.kesavan at samsung.com writes:
I had noticed a similar issue where
/553b7f40465ab4fad6c270f289cd4780942f7fae
On Wed, Oct 22, 2014 at 11:17 PM, Joonyoung Shim
jy0922.s...@samsung.com wrote:
Add Cc the patch author and committer from github.
On 10/23/2014 10:04 AM, Joonyoung Shim wrote:
Hi,
On 10/17/2014 09:06 PM, Kevin Hilman wrote:
On Wed, Oct 15, 2014 at 4
locally on my computer but its not public
anywhere.
You are just author of the patch on github and it was committed to github by
Abhilash.
Thanks.
On Wed, Oct 22, 2014 at 11:36 PM, Joonyoung Shim
jy0922.s...@samsung.com wrote:
On 10/23/2014 10:25 AM, Mauro Ribeiro wrote:
Joonyoung
On 10/23/2014 10:49 AM, Joonyoung Shim wrote:
Hi,
On 10/23/2014 10:42 AM, Mauro Ribeiro wrote:
Joonyoung,
Abhilash looks to be the father of it...
Also I have no idea why I'm appearing as a commiter of that.. as me or
anyone from Hardkernel doesn't have access to that github account
The exynos fimd provides video type selection bits from system register
but exynos3 series don't has it, so needs has_vtsel flag and we can
distinguish whether set video type selection bits.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 6
The exynos fimd provides video type selection bits from system register
but exynos3 series don't has it, so needs has_vtsel flag and we can
distinguish whether set video type selection bits.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 6
The exynos fimd provides video type selection bits from system register
but exynos3 series don't has it, so needs has_vtsel flag and we can
distinguish whether set video type selection bits.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 6
The exynos fimd provides video type selection bits from system register
but exynos3 series don't has it, so needs has_vtsel flag and we can
distinguish whether set video type selection bits.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
Changelog from v1:
- rebase on latest exynos-drm
It's better to be checking whether triggerring in fimd_trigger function.
Also it will return if in triggerring on fimd_te_handler, then it can't
execute remain codes.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
Based on lastest exynos-drm-next branch.
drivers/gpu/drm/exynos
The drm_handle_vblank should be called whenever be vsync, te interrupt
means vsync on i80 interface.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
Based on lastest exynos-drm-next branch and patch of Youngjun Cho
(drm/exynos: fimd: move handle vblank position in TE handler).
drivers
Hi,
On 11/14/2014 02:01 PM, YoungJun Cho wrote:
Hi JoonYoung,
On 11/14/2014 11:36 AM, Joonyoung Shim wrote:
The drm_handle_vblank should be called whenever be vsync, te interrupt
means vsync on i80 interface.
That's right.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
1 file changed, 68 insertions(+), 22
deletions(-)
Any comments for this series?
Best regards,
Tomasz
Ping.
Best regards,
Tomasz
This series looks good to me.
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
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On 05/19/2013 08:32 PM, Tomasz Figa wrote:
Hi,
On Wednesday 01 of May 2013 22:00:25 Daniel Vetter wrote:
On Wed, May 01, 2013 at 09:06:09PM +0200, Tomasz Figa wrote:
This patch modifies the driver to perform two stage parsing of video
timings from device tree, to get timing information as
On 06/06/2013 06:47 PM, Tomasz Figa wrote:
Hi Joonyoung,
On Thursday 06 of June 2013 13:30:49 Joonyoung Shim wrote:
On 05/19/2013 08:32 PM, Tomasz Figa wrote:
Hi,
On Wednesday 01 of May 2013 22:00:25 Daniel Vetter wrote:
On Wed, May 01, 2013 at 09:06:09PM +0200, Tomasz Figa wrote
Hi,
On 02/03/2015 10:41 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
This issue was caused by the latest exynos_update_plane() clean up
that unified plane operations. After those changes the plane failed
to go the On state. This patch fix this problem by
Hi,
On 02/03/2015 11:16 PM, Gustavo Padovan wrote:
2015-02-02 Joonyoung Shim jy0922.s...@samsung.com:
Hi,
On 01/30/2015 11:44 PM, Gustavo Padovan wrote:
Hi Joonyoung,
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
Hi,
On 01/23/2015 09:43 PM, Gustavo Padovan wrote:
From: Daniel
insertions(+), 23 deletions(-)
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
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Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Use drm_atomic_set_fb_for_plane() in the legacy page_flip path to keep
track of the framebuffer pointer and reference.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are created
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s callback
from the underlying layer. However neither one of these layers implement
win_enable() - FIMD, Mixer and VIDI. Thus
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The new atomic infrastructure needs the .mode_set_nofb() callback to
update CRTC timings before setting any plane.
Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The atomic helper to disable planes also uses the optional
.atomic_disable() helper. The unique operation it does is calling
.win_disable()
Is there any reason to split this patch
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
This series clean ups a few more paths from exynos-drm with the most important
being the removal of the global page flip queue and the removal in driver
internal data (struct
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Add CRTC callbacks .atomic_begin() .atomic_flush(). On exynos they
unprotect the windows before the commit and protects it after based on
a plane mask tha store which plane will be
Hi Daniel,
On 02/04/2015 11:28 PM, Daniel Vetter wrote:
On Wed, Feb 04, 2015 at 04:44:12PM +0900, Joonyoung Shim wrote:
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
Hi Daniel,
On 02/04/2015 11:30 PM, Daniel Vetter wrote:
On Wed, Feb 04, 2015 at 04:49:25PM +0900, Joonyoung Shim wrote:
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Add CRTC callbacks .atomic_begin() .atomic_flush(). On exynos
Hi Daniel,
On 02/04/2015 11:16 PM, Daniel Vetter wrote:
On Wed, Feb 04, 2015 at 04:42:57PM +0900, Joonyoung Shim wrote:
Hi,
On 02/04/2015 04:14 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s
);
+ clk_disable_unprepare(hdata-res.hdmi);
+ }
+
if (hdata-hdmiphy_port)
put_device(hdata-hdmiphy_port-dev);
put_device(hdata-ddc_adpt-dev);
Looks fine to me but i'm not sure any there are any side effects to
change parent clock of mout_hdmi clock.
Acked-by: Joonyoung Shim jy0922.s
Hi,
On 02/06/2015 02:59 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The primary plane default zpos is now 0, so remove checks for zpos ==
-1. We don't need to set win to 0 anymore it is already zero.
Could you also remove DEFAULT_ZPOS define? And zpos
Hi,
On 02/06/2015 02:59 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Usually userspace don't want to have two overlay planes on the same zpos
so this change assign a different zpos for each plane. Before this change
a zpos of value zero was created for
Hi,
On 02/05/2015 11:45 PM, Javier Martinez Canillas wrote:
Hello Andrzej,
Thanks a lot for finally finding what was causing the HDMI issue.
On 02/05/2015 01:35 PM, Andrzej Hajda wrote:
Hi,
Exynos chipsets since 542x have asynchronous bridges connecting different
IPs.
These bridges
Hi,
On 02/05/2015 10:06 PM, Daniel Vetter wrote:
On Thu, Feb 05, 2015 at 12:48:07PM +, Daniel Stone wrote:
Hi,
On 5 February 2015 at 12:26, Rob Clark robdcl...@gmail.com wrote:
On Thu, Feb 5, 2015 at 4:15 AM, Daniel Vetter dan...@ffwll.ch wrote:
Yeah I noticed the zpos fun when hacking
Hi Gustavo,
On 02/06/2015 02:59 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are
)
+ if (is_drm_iommu_supported(dev))
vunmap(exynos_gem_obj-buffer-kvaddr);
/* release drm framebuffer and real buffer */
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
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Hi,
On 02/03/2015 12:58 PM, Kukjin Kim wrote:
Marek Szyprowski wrote:
Hi all,
This is yet another update on patchset, which enables HDMI support for
Exynos based platforms.
Beside DTS changes, this patchset adds parent domain support for Exynos
PM domains and add support for 'hdmi' clock
Hi Kukjin,
On 11/28/2014 09:35 PM, Javier Martinez Canillas wrote:
Hello Sjoerd,
On 11/28/2014 01:06 PM, Sjoerd Simons wrote:
CONFIG_FHANDLE is required by systemd, which is the default init system
in more and more distributions. So lets enable it for Exynos as well
(it's already enabled
Hi,
On 01/14/2015 09:24 AM, Javier Martinez Canillas wrote:
On 01/14/2015 01:19 AM, Javier Martinez Canillas wrote:
I dug further on this issue and found that the cause is that the exynos_mixer
driver needs some clocks (CLK_HDMI and CLK_SCLK_HDMI) grabbed by exynos_hdmi
to be kept enabled
Hi,
On 01/22/2015 10:06 AM, Sebastian Reichel wrote:
Hi,
On Wed, Oct 29, 2014 at 02:13:28PM +0100, Marek Szyprowski wrote:
This patch adds a driver implementing correct reboot and poweroff
procedures for Exynos4412-based Hardkernel's Odroid X/X2/U2/U3/U3+
boards.
Sorry it took so long.
+Cc Inki Dae.
Hi,
On 01/15/2015 07:26 PM, Marek Szyprowski wrote:
Hello,
On 2015-01-15 11:10, Tobias Jakobi wrote:
Marek Szyprowski wrote: This is on a ODROID-X2.
The issues with FIMC / DRM FIMC are not related to HDMI patches. They will
be handled separately. For the time being simply
Hi Kevin,
On 01/15/2015 10:08 AM, Kevin Hilman wrote:
From: Kevin Hilman khil...@linaro.org
The odroid-xu3 has 4 INA231 current sensors on board which can be
accessed from the Linux via the hwmon interface.
There is one sensor for each of these power rails:
- A15 cluster: VDD_ARM
- A7
Hi,
On 02/11/2015 10:39 AM, Tobias Jakobi wrote:
Hello Joonyoung!
Joonyoung Shim wrote:
Hi,
On 02/03/2015 10:53 PM, Tobias Jakobi wrote:
The blend test uses the userptr functionality of exynos-drm, which
is currently not safe to use. If the kernel hasn't been build with
exynos-iommu
On 01/30/2015 11:36 PM, Gustavo Padovan wrote:
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s callback
Hi,
On 01/30/2015 11:42 PM, Gustavo Padovan wrote:
Hi Joonyoung,
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping
Hi,
On 01/30/2015 11:44 PM, Gustavo Padovan wrote:
Hi Joonyoung,
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
Hi,
On 01/23/2015 09:43 PM, Gustavo Padovan wrote:
From: Daniel Kurtz djku...@chromium.org
The 'mode' is the modeline information which specifies the ideal mode
On 01/31/2015 02:17 AM, Gustavo Padovan wrote:
2015-01-30 Daniel Vetter dan...@ffwll.ch:
On Fri, Jan 30, 2015 at 03:57:53PM +, Daniel Stone wrote:
Hi,
On 30 January 2015 at 14:30, Gustavo Padovan gust...@padovan.org wrote:
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
We
+Cc dri-devel ML,
Hi,
On 01/31/2015 06:45 AM, Gustavo Padovan wrote:
From: Prathyush K prathyus...@samsung.com
When VPLL clock of less than 140 MHz was used and all the three
clocks - hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs
during S2R when HDMI is connected. Since we want
Hi Sjoerd,
On 12/05/2014 04:27 AM, Sjoerd Simons wrote:
Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the
same as the vendors naming, which means it's prefixed with exynos5422
instead of exynos5800 as the SoC name even though it includes the
exyno5800 dtsi.
This is required in order to ensure that core system devices such as
voltage regulators attached via I2C are available early in boot.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/i2c/busses/i2c-exynos5.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion
Hi,
On 01/12/2015 03:40 PM, Joonyoung Shim wrote:
Hi,
On 01/09/2015 01:42 AM, Javier Martinez Canillas wrote:
Hello Joonyoung,
On 01/07/2015 10:55 AM, Joonyoung Shim wrote:
I don't think iommu support and power domain issue are related. I also
get displaying stripes via hdmi
Hi,
On 01/09/2015 01:42 AM, Javier Martinez Canillas wrote:
Hello Joonyoung,
On 01/07/2015 10:55 AM, Joonyoung Shim wrote:
I don't think iommu support and power domain issue are related. I also
get displaying stripes via hdmi but it is just power domain issue
regardless iommu support.
I
+Cc Tomi Valkeinen,
Hi Uwe,
On 01/12/2015 04:50 PM, Uwe Kleine-König wrote:
Hello,
On Mon, Jan 12, 2015 at 11:53:02AM +0900, Joonyoung Shim wrote:
This is required in order to ensure that core system devices such as
voltage regulators attached via I2C are available early in boot.
Deferred
On 01/06/2015 06:49 PM, Javier Martinez Canillas wrote:
Hello Marek,
On Fri, Dec 5, 2014 at 11:22 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
On 2014-12-02 10:59, Sjoerd Simons wrote:
This is another attempt to finally make Exynos SYSMMU driver fully
integrated with DMA-mapping
Hi Javier,
On 01/07/2015 06:33 PM, Javier Martinez Canillas wrote:
Hello Joonyoung,
On 01/07/2015 03:03 AM, Joonyoung Shim wrote:
On 01/06/2015 06:49 PM, Javier Martinez Canillas wrote:
Also I tried forcing the kernel to not disable unused power domains by
passing the pd_ignore_unused
On 01/13/2015 02:24 PM, Joonyoung Shim wrote:
Hi,
On 01/13/2015 01:09 AM, Javier Martinez Canillas wrote:
Hello Joonyoung,
On 01/12/2015 07:40 AM, Joonyoung Shim wrote:
And also making changes to the clocks in the clk-exynos5420 driver. Can
you please explain the rationale for those
Hi,
On 01/13/2015 01:09 AM, Javier Martinez Canillas wrote:
Hello Joonyoung,
On 01/12/2015 07:40 AM, Joonyoung Shim wrote:
And also making changes to the clocks in the clk-exynos5420 driver. Can
you please explain the rationale for those changes? I'm asking because
without your clock
-by: Joonyoung Shim jy0922.s...@samsung.com
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Hi,
On 02/03/2015 10:53 PM, Tobias Jakobi wrote:
The blend test uses the userptr functionality of exynos-drm, which
is currently not safe to use. If the kernel hasn't been build with
exynos-iommu support, then the blend test is going to produce (kernel)
memory corruption, eventually leading
Hi,
On 03/26/2015 11:10 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Hi,
Here goes some clean ups to the exynos drivers. The main clean ups is
the presetting and zpos making the property immutable and the removal
of *_win_data structures.
v2
Hi,
On 03/26/2015 11:10 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are created
+Cc dri-devel ML.
Hi Alban,
On 01/30/2015 06:18 AM, Alban Browaeys wrote:
The hdmi outputs black screen only even though under the hood Xorg and
framebuffer console are fine : devices found and initialized, but
not a pixel out.
Commit 93bca243ec96 (drm/exynos: remove struct
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s callback
from the underlying layer. However neither one of these layers implement
win_enable() - FIMD, Mixer and
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The drm_file event_list hasn't been used anymore by exynos, so we don't
need any code to clean it.
No, it is used from drm core e.g. drm_irq.c file.
Thanks.
+Cc Kukjin,
Hi,
On 01/29/2015 10:31 PM, Gustavo Padovan wrote:
From: Prathyush K prathyus...@samsung.com
When VPLL clock of less than 140 MHz was used and all the three
clocks - hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs
during S2R when HDMI is connected. Since we want to use
pipe value to crtc device matched with out_type. */
int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev,
unsigned int out_type);
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
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Hi,
On 01/23/2015 09:43 PM, Gustavo Padovan wrote:
From: Daniel Kurtz djku...@chromium.org
The 'mode' is the modeline information which specifies the ideal mode
requested by the mode set initiator (usually userspace).
The 'adjusted_mode' is the actual hardware mode after all the crtcs
and
+Cc Inki,
Hi,
On 01/30/2015 02:10 AM, Gustavo Padovan wrote:
From: Mandeep Singh Baines m...@chromium.org
The goal of the change is to make sure we send the vblank event on the
current vblank. My hope is to fix any races that might be causing flicker.
After this change I only see a flicker
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.
It changes how planes are
);
mixer_reg_write(res, MXR_RESOLUTION, val);
}
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
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Hi,
On 01/30/2015 09:24 AM, Joonyoung Shim wrote:
+Cc dri-devel ML.
Hi Alban,
On 01/30/2015 06:18 AM, Alban Browaeys wrote:
The hdmi outputs black screen only even though under the hood Xorg and
framebuffer console are fine : devices found and initialized, but
not a pixel out.
Commit
Hi,
On 03/31/2015 04:11 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Run dpms operations through the atomic intefaces. This basically removes
the .dpms() callback from econders and crtcs and use .disable() and
.enable() to turn the crtc on and off.
Hi,
On 03/28/2015 12:58 AM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
Now that no one is using the functions exported by exynos_drm_plane due
to the atomic conversion we can make remove some of the them or make them
static.
Signed-off-by: Gustavo
Hi,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index e71e331..e0b085b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -275,9 +275,6 @@ int exynos_drm_fbdev_init(struct
Hi Lukasz,
On 04/17/2015 09:39 PM, Lukasz Majewski wrote:
Hi Joonyoung,
Hi Lukasz,
On 04/15/2015 08:05 PM, Lukasz Majewski wrote:
Hi Joonyoung,
Hi Lukasz,
On 01/30/2015 05:14 PM, Lukasz Majewski wrote:
Hi Eduardo, Abhilash,
On Thu, Jan 22, 2015 at 06:02:07PM +0530, Abhilash Kesavan
Hi Tobias,
On 04/21/2015 06:30 AM, Tobias Jakobi wrote:
Hello,
I've spend some time on figuring out how to use the VP on my Exynos4412.
I noticed that currently it seems to be pretty broken (I've put a full
crashlog with drm.debug=0xff at the end).
As far as I can see, the problem stems
Hi Tobias,
On 04/22/2015 11:56 PM, Tobias Jakobi wrote:
Hello Inki,
On 2015-04-22 16:26, Inki Dae wrote:
Right. However, there is a case that we should consider for Exynos SoC.
Exynos SoC has a Hardware video codec which is called MFC. This hardware
can use a special function for
:1;
- bool local_path:1;
- bool transparency:1;
- bool activated:1;
bool enabled:1;
bool resume:1;
};
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Thanks.
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Hi Tobias,
On 04/23/2015 09:12 PM, Tobias Jakobi wrote:
Move the defines for the pixelformats that the mixer supports out
of mixer_graph_buffer() to the top of the source.
Then select the mixer pixelformat (pf) in mixer_graph_buffer() based on
the plane's pf (and not bpp).
Also add handling
Hi Tobias,
On 04/23/2015 09:28 PM, Tobias Jakobi wrote:
Hello,
I've noticed some inconsistency in what is currently exported as 'zpos' DRM
propery to userspace. Currently we create three planes, where the zpos maps
to the mixer 'win' (is this simply short for window?).
But this is
Hi Tobias,
On 04/28/2015 09:58 PM, Tobias Jakobi wrote:
Hello Joonyoung,
On 2015-04-27 08:52, Joonyoung Shim wrote:
Hi Tobias,
On 04/24/2015 05:29 PM, Tobias Jakobi wrote:
Hello Joonyoung,
On 2015-04-24 04:13, Joonyoung Shim wrote:
Hi Tobias,
On 04/23/2015 09:28 PM, Tobias Jakobi
Hi Tobias,
On 04/24/2015 05:29 PM, Tobias Jakobi wrote:
Hello Joonyoung,
On 2015-04-24 04:13, Joonyoung Shim wrote:
Hi Tobias,
On 04/23/2015 09:28 PM, Tobias Jakobi wrote:
Hello,
I've noticed some inconsistency in what is currently exported as 'zpos' DRM
propery to userspace
Hi Tobias,
On 04/24/2015 05:10 PM, Tobias Jakobi wrote:
On 2015-04-24 03:48, Joonyoung Shim wrote:
Hi Tobias,
On 04/23/2015 09:12 PM, Tobias Jakobi wrote:
Move the defines for the pixelformats that the mixer supports out
of mixer_graph_buffer() to the top of the source.
Then select
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