From: Thomas Abraham
Exynos4210, Exynos4x12 and Exynos5250 based platforms have switched over
to use cpufreq-cpu0 driver for cpufreq functionality. So the Exynos
specific cpufreq drivers for these platforms can be removed.
Cc: Kukjin Kim
Cc: Jaecheol Lee
Signed-off-by: Thomas Abraham
From: Thomas Abraham
For all Exynos based platforms, add CPU nodes, operating points and cpu
clock frequency table for migrating from Exynos specific cpufreq driver
to using generic cpufreq-cpu0 driver.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4210-origen.dts |6
From: Thomas Abraham
Remove the platform device instantiation for Exynos specific cpufreq
driver and add the platform device for cpufreq-cpu0 driver.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/common.c |5 -
arch/arm/mach-exynos/common.h
From: Thomas Abraham
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type and the independent
clock blocks that made up the arm clock can be removed.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/clock/exynos5250
From: Thomas Abraham
The CPU clock provider supplies the clock to the CPU clock domain. The
composition and organization of the CPU clock provider could vary among
Exynos SoCs. A CPU clock provider can be composed of clock mux, dividers
and gates. This patch defines a new clock type for CPU
From: Thomas Abraham
On some platforms such as the Samsung Exynos, changing the frequency
of the CPU clock requires changing the frequency of the PLL that is
supplying the CPU clock. To change the frequency of the PLL, the CPU
clock is temporarily reparented to another parent clock.
The clock
ster branch.
Thomas Abraham (7):
cpufreq: cpufreq-cpu0: allow optional safe voltage during frequency
transitions
clk: samsung: add infrastructure to register cpu clocks
devicetree: bindings: add cpu clock configuration data binding for Exynos4/5
ARM: dts: Exynos: add cpu nodes, opp an
From: Thomas Abraham
To allow Exynos4412 based Odroidx and Origen-quad boards to operate between
200MHz to 1.4Ghz, update the vdd_arm voltage range to operate between these
cpu clock speeds.
Cc: Dongjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4412-odroidx.dts |2
From: Thomas Abraham
Add Maxim 77686 PMIC node for Exynos5250 based SMDK5250 board.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 142 +
1 files changed, 142 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250
On Sun, Jan 12, 2014 at 7:56 AM, Tomasz Figa wrote:
> On 10.01.2014 12:59, Thomas Abraham wrote:
>>
>> Hi Lukasz,
>>
>> On Fri, Jan 10, 2014 at 4:02 PM, Lukasz Majewski
>> wrote:
>>>
>>> Hi Thomas,
>>>
>>> I've investigate
Hi Shawn,
On Mon, Jan 13, 2014 at 8:44 AM, Shawn Guo wrote:
> Hi Thomas,
>
> On Thu, Jan 09, 2014 at 09:29:20PM +0530, Thomas Abraham wrote:
>> @@ -19,6 +19,10 @@ Optional properties:
>> - cooling-min-level:
>> - cooling-max-level:
>> Please refer to
On Sun, Jan 12, 2014 at 6:28 PM, Tomasz Figa wrote:
>
>
> On 12.01.2014 13:41, Lukasz Majewski wrote:
>>
>> On Sun, 12 Jan 2014 13:05:47 +0100
>> Tomasz Figa wrote:
>>
>>> On 12.01.2014 09:23, Lukasz Majewski wrote:
>>>>
>>>&
On Sun, Jan 12, 2014 at 7:49 AM, Tomasz Figa wrote:
> On 11.01.2014 06:25, Thomas Abraham wrote:
>>
>> On Fri, Jan 10, 2014 at 7:48 PM, Lukasz Majewski
>> wrote:
>>>
>>> Hi Thomas,
>>>
>>>> Hi Lukasz,
>>>>
>>>>
Hi Tomasz,
On Sun, Jan 12, 2014 at 7:17 AM, Tomasz Figa wrote:
> Hi Thomas, Lukasz,
>
> Let me put my two cents in.
>
>
> On 11.01.2014 05:43, Thomas Abraham wrote:
>>
>> On Fri, Jan 10, 2014 at 6:55 PM, Lukasz Majewski
>> wrote:
>>>
>>> H
single clock provider helps with faster
>> >> completion of CPU clock speed switching during DVFS operations.
>> >>
>> >> Signed-off-by: Thomas Abraham
>> >> ---
>> >> drivers/clk/samsung/clk-exynos4.c | 96
>> >>
and adds infrastructure to register the CPU
>> >> clock providers for Samsung platforms.
>> >>
>> >> Signed-off-by: Thomas Abraham
>> >> ---
>> >> drivers/clk/samsung/clk.c | 71
>> >> +++
h, div_atb, div_pclk_dbg,
>> div_copy and div_hpm. This composition of mutiple components into
>> a single clock provider helps with faster completion of CPU clock
>> speed switching during DVFS operations.
>>
>> Signed-off-by: Thomas Abraha
be composed of clock mux,
>> dividers and gates. This patch defines a new clock type for CPU clock
>> provider and adds infrastructure to register the CPU clock providers
>> for Samsung platforms.
>>
>> Signed-off-by: Thoma
Hi Lukasz,
On Fri, Jan 10, 2014 at 4:02 PM, Lukasz Majewski wrote:
> Hi Thomas,
>
>> Add CPU nodes for Exynos4210 SoC and also properties required by the
>> cpufreq-cpu0 driver.
>>
>> Signed-off-by: Thomas Abraham
>> ---
>> arch/arm/boot/dts/exynos4210
ls during the changes
>> in CPU clock speed.
>>
>> (c) The CPU clock supply as been restructured as
>> [ Output of APLL -> Opaque CPU clock provider -> CPU clock output
>> ] And with the changes in (a) and (b) above, the cpufreq-cpu0 driver
>>
generic cpufreq-cpu0 driver is sufficient
for Exynos4210 based platforms since this SoC uses a single clock
and voltage line for both the ARM cores. So remove the support for
Exynos4210 specific cpufreq driver and use cpufreq-cpu0 driver
for Exynos4210 platforms
Signed-off-by: Thomas Abraham
In order to use the cpufreq-cpu0 driver on Exynos4 based platforms,
statically add the platform device for cpufreq-cpu0 platform driver.
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/mach-exynos4-dt.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch
Add CPU nodes for Exynos4210 SoC and also properties required by the
cpufreq-cpu0 driver.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4210-origen.dts |6 ++
arch/arm/boot/dts/exynos4210-trats.dts |6 ++
arch/arm/boot/dts/exynos4210-universal_c210
the safe voltage level.
This patch adds optional support to temporarily switch to a safe voltage
level during CPU frequency transitions.
Cc: Shawn Guo
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/cpufreq/cpufreq-cpu0.txt |5 ++
drivers/cpufreq/cpufreq-cpu0.c
infrastructure to register the CPU clock providers for Samsung
platforms.
Signed-off-by: Thomas Abraham
---
drivers/clk/samsung/clk.c | 71 +
drivers/clk/samsung/clk.h | 37 +++-
2 files changed, 107 insertions(+), 1 deletions
helps with faster completion of CPU clock
speed switching during DVFS operations.
Signed-off-by: Thomas Abraham
---
drivers/clk/samsung/clk-exynos4.c | 96 -
1 files changed, 95 insertions(+), 1 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos4.c
b
the cpufreq-cpu0 driver
can now be used and can remove the use of Exynos4210 specific
cpufreq driver.
This approach is currently tried on Exynos4210 only. The same approach
can be adopted for other Exynos SoCs as well. This patch series is
based on linux-next master branch.
Thomas
On 13 July 2013 04:57, Yadwinder Singh Brar wrote:
> Presently, using exynos_defconfig with CONFIG_DEBUG_LL and CONFIG_EARLY_PRINTK
> on, kernel is not booting, we are getting following:
>
> [0.00] [ cut here ]
> [0.00] kernel BUG at mm/vmalloc.c:1134!
> [
e mode 100644 arch/arm/mach-s3c24xx/common-s3c2443.c
> create mode 100644 drivers/clk/samsung/Kconfig
> create mode 100644 drivers/clk/samsung/clk-s3c2443.c
> create mode 100644 include/dt-bindings/clock/samsung,s3c2443-clock.h
>
> --
> 1.7.10.4
>
Thanks for consolidating
On 18 April 2013 21:00, Russell King - ARM Linux wrote:
> On Thu, Apr 04, 2013 at 07:51:43PM +0900, Kukjin Kim wrote:
>> +static u64 dma_mask64 = DMA_BIT_MASK(64);
> ...
>> + if (event != BUS_NOTIFY_ADD_DEVICE)
>> + return NOTIFY_DONE;
>> +
>> + dev->dma_mask = &dma_mask64;
>
>
On 25 April 2013 05:03, Olof Johansson wrote:
> On Thu, Dec 13, 2012 at 06:36:18PM +0530, Thomas Abraham wrote:
>> Add pinctrl device nodes for Exynos5250 SoC.
>>
>> Signed-off-by: Thomas Abraham
>
> Replying to an old email of a patch that has been merged because
ing warnings on 4412 Origen board with
>> exynos_defconfig (Note that clocks are all 0). However, it boots fine
>> on Arndale board.
>
> I think this issue should be fixed with the patch that Thomas Abraham
> just sent. Thomas, can you confirm?
Yes, this issue is resolved wi
On 4 April 2013 12:27, Kukjin Kim wrote:
> Thomas Abraham wrote:
>>
>> This patch series allows device tree enabled platforms to setup a runtime
>> I/O mapping for the chip-id controller. This helps to remove statically
>> defined I/O mapping for the Chip-ID controll
Add chip-id controller nodes for Exynos4 and Exynos5 SoCs.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4.dtsi|5 +
arch/arm/boot/dts/exynos5250.dtsi |5 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/common.c | 53 +-
arch/arm/mach-exynos/include/mach/map.h |1 -
2 files changed, 30 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index
Exynos4210, Exynos5250 and
Exynos5440.
Thomas Abraham (2):
ARM: Exynos: Create virtual I/O mapping for Chip-ID controller using device
tree
ARM: dts: Add chip-id controller node on Exynos4/5 SoC
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the
On 12 April 2013 19:33, Arnd Bergmann wrote:
> The new common clock drivers for exynos are using compile
> time constants and soc_is_exynos* macros to provide backwards
> compatibility for pre-DT systems, which is not possible with
> multiplatform kernels. This moves all the necessary
> informatio
= <20>;
> + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
> +<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
> +<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
>
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
Acked-by: Linus Walleij
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
Acked-by: Seungwon Jeon
On 11 April 2013 08:43, Seungwon Jeon wrote:
> On Wednesday, April 10, 2013, Doug Anderson wrote:
>> Thomas,
>>
>> On Wed, Apr 10, 2013 at 6:56 AM, Doug Anderson wrote:
>> > On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
>> > wrote:
>> >> The
On 10 April 2013 05:00, Doug Anderson wrote:
> Thomas,
>
> On Mon, Apr 8, 2013 at 10:59 PM, Thomas Abraham
> wrote:
>> @@ -2002,7 +1994,7 @@ static int dw_mci_init_slot(struct dw_mci *host,
>> unsigned int id)
>> if (ret) {
>>
ri, Apr 5, 2013 at 6:53 AM, Thomas Abraham
> wrote:
>> With device core now able to setup the default pin configuration,
>> the pin configuration code based on the deprecated Samsung specific
>> gpio bindings is removed.
>>
>> Signed-off-by: Thomas Abraham
>>
On 8 April 2013 17:49, Seungwon Jeon wrote:
> On Friday, April 05, 2013, Thomas Abraham wrote:
>> With device core now able to setup the default pin configuration,
>> the pin configuration code based on the deprecated Samsung specific
>> gpio bindings is removed.
>&g
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
Acked-by: Linus Walleij
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
Acked-by: Seungwon Jeon
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
---
Changes since v2:
- Changed patch subject from "mmc: dwmmc: let..." to "mmc: dw_mmc: le
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
Acked-by: Linus Walleij
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
---
Hi Doug, Seungwon,
I
s for the improvements and fixes. Looking at the
second patch in this series, I crossed checked again with the
Exynos4412 user manual that I have. Your modifications are different
from what the manual has listed. I suspect, you have a newer copy of
the manual.
For this series:
Reviewed-by: Thoma
Hi Tomasz,
On 27 March 2013 18:40, Tomasz Figa wrote:
> Hi,
>
> I'm experiencing several kernel build failures when building linux-next
> (next-20130327) for ARCH_EXYNOS.
>
> Using unmodified exynos_defconfig:
>
> CC drivers/clocksource/exynos_mct.o
> drivers/clocksource/exynos_mct.c:557:1
On 22 March 2013 19:26, Vikas Sajjan wrote:
> Adds FIMD DT binding documentation for both Samsung SoC and Board, with an
> example
>
> Signed-off-by: Vikas Sajjan
> ---
> .../devicetree/bindings/video/samsung-fimd.txt | 68
>
> 1 file changed, 68 insertions(+)
> cre
On 22 March 2013 19:26, Vikas Sajjan wrote:
> Adds FIMD DT support to Origen quad board
>
> Signed-off-by: Vikas Sajjan
> ---
> arch/arm/boot/dts/exynos4412-origen.dts | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
> b/
On 22 March 2013 19:26, Vikas Sajjan wrote:
> From: Sachin Kamat
>
> Adds the lcd panel related picntrl nodes for Exynos4412 SoC
>
> Signed-off-by: Sachin Kamat
> Signed-off-by: Vikas Sajjan
> ---
> arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 14 ++
> 1 file changed, 14 insertion
On 18 March 2013 14:12, Shawn Guo wrote:
> On Sat, Mar 16, 2013 at 06:20:01PM +0530, Thomas Abraham wrote:
>> The mxs platform specific clk-div clock is an extended version of the
>> basic integer divider clock type that supports checking the stability
>> status of the divid
generic clock type that all platforms can utilize.
Cc: Shawn Guo
Cc: Mike Turquette
Signed-off-by: Thomas Abraham
---
drivers/clk/Makefile |1 +
drivers/clk/clk-divider-status.c | 119 ++
drivers/clk/mxs/Makefile |2 +-
drivers/clk/mxs
On 14 March 2013 17:31, Alexander Graf wrote:
>
> On 14.03.2013, at 05:19, Thomas Abraham wrote:
>
>> On 14 March 2013 05:29, Alexander Graf wrote:
>>> On my Exynos 5 based Arndale system, I need to pull the reset line down
>>> and then let it go up again to
On 14 March 2013 05:29, Alexander Graf wrote:
> On my Exynos 5 based Arndale system, I need to pull the reset line down
> and then let it go up again to actually perform a reset. Without that
> reset, I can't find any USB hubs on my bus, rendering the USB controller
> useless.
>
> We also only nee
On 12 March 2013 19:18, Sylwester Nawrocki wrote:
> On 03/12/2013 12:46 PM, Thomas Abraham wrote:
>> And, you mentioned Exynos4 will be dt-only from 3.10. Does that mean
>> we just drop support for universal and nuri non-dt board support? Or,
>> will there be a equivalent
On 12 March 2013 16:53, Sylwester Nawrocki wrote:
> Hi,
>
> On 03/12/2013 10:54 AM, Thomas Abraham wrote:
>> This change is fine but one point that should be considered is that on
>> non-dt platforms, the memory allocation of clk_table cannot really be
>> justified just
On 12 March 2013 16:20, Heiko Stübner wrote:
> Am Dienstag, 12. März 2013, 10:54:47 schrieb Thomas Abraham:
>> On 12 March 2013 05:14, Heiko Stübner wrote:
>> > This is needed to allow looking up previous created clocks when
>> > adding separate aliases to them.
>
On 12 March 2013 15:34, Heiko Stübner wrote:
> Am Dienstag, 12. März 2013, 10:57:30 schrieb Thomas Abraham:
>> On 12 March 2013 05:15, Heiko Stübner wrote:
>> > The current code adds aliases, if necessary, directly when adding the
>> > clock, limiting the number
On 12 March 2013 05:15, Heiko Stübner wrote:
> The current code adds aliases, if necessary, directly when adding the clock,
> limiting the number of possible aliases to one.
>
> Some platforms need more than one alias, like the hsmmc pclocks on s3c2416
> which need a "hsmmc" and "mmc_busclk.0" ali
On 12 March 2013 05:14, Heiko Stübner wrote:
> This is needed to allow looking up previous created clocks when
> adding separate aliases to them.
>
> Signed-off-by: Heiko Stuebner
> ---
> drivers/clk/samsung/clk.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/dri
On 12 March 2013 14:47, Heiko Stübner wrote:
> Am Dienstag, 12. März 2013, 10:02:55 schrieb Heiko Stübner:
>> Am Dienstag, 12. März 2013, 09:53:00 schrieb Thomas Abraham:
>> > On 12 March 2013 05:14, Heiko Stübner wrote:
>> > > This let to the suspend init never bei
On 12 March 2013 05:14, Heiko Stübner wrote:
> This let to the suspend init never being reached on non-DT platforms.
>
> Signed-off-by: Heiko Stueber
> ---
> drivers/clk/samsung/clk.c |2 --
> 1 files changed, 0 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk.c b/drive
+ __DIV(_id, NULL, cname, pname, o, s, w, 0, 0, a, NULL)
>
> #define DIV_F(_id, cname, pname, o, s, w, f, df) \
> - __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL)
> + __DIV(_id, NULL, cname, pname, o, s, w, f, df, NULL, NULL)
> +
> +#define DI
On 7 March 2013 05:41, Kukjin Kim wrote:
> Thomas Abraham wrote:
>>
>> Changes since v1:
>> - Change the compatible string from "samsung,pinctrl-exynos5250" to
>> "samsung,exynos5250-pinctrl".
>> - Rebased to v3.9-rc1
>>
>
> Thom
Add default pin state information for all client nodes that require
pin configuration support using pinctrl interface.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/cros5250-common.dtsi| 51 +--
arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 783 +
arch/arm
Add default pin state information for all client nodes that require
pin configuration support using pinctrl interface.
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4.dtsi| 10 +
arch/arm/boot/dts/exynos4210-smdkv310.dts | 53 +
2
controllers.
This means the old-styled Samsung specific gpio bindings, which have
been used till now for setting up the pin configurations, will not be
used anymore. The corresponding changes required in device drivers
have been posted seperatly.
Thomas Abraham (2):
ARM: dts: add pin state
On 6 March 2013 17:19, Mark Brown wrote:
> On Wed, Mar 06, 2013 at 12:42:09PM +0100, Heiko Stübner wrote:
>
>> What is going away is the deprecated non-pinctrl way to setup the pins on dt
>> platforms.
>
> OK, can we have a changelog improvement please? I didn't read the patch
> properly because
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
---
drivers/mmc/host/dw_mmc-exynos.c | 38 --
1 files changed, 0
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings in i2s driver is removed.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/sound/samsung-i2s.txt | 30 +
sound/soc/samsung
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/input/samsung-keypad.txt | 25 ++
drivers/input/keyboard/samsung
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/spi/spi-samsung.txt|8 +--
drivers/spi/spi-s3c64xx.c
With device core now able to setup the default pin configuration,
the call to devm_pinctrl_get_select_default can be removed. And
the pin configuration code based on the deprecated Samsung specific
gpio bindings is also removed.
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/mmc
Add Samsung Exynos5250 SoC specific data to enable pinctrl support for
all platforms based on Exynos5250.
Signed-off-by: Thomas Abraham
Reviewed-by: Tomasz Figa
Acked-by: Linus Walleij
---
drivers/pinctrl/pinctrl-exynos.c | 108 +
drivers/pinctrl/pinctrl
Skip the wakeup interrupt registration for Exynos5250 if pinctrl support
is enabled for Exynos5250.
Signed-off-by: Thomas Abraham
Reviewed-by: Tomasz Figa
Acked-by: Linus Walleij
---
arch/arm/mach-exynos/common.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch
Skip exynos5250 gpiolib registration if pinctrl support for exynos5250
is enabled.
Signed-off-by: Thomas Abraham
Reviewed-by: Tomasz Figa
Acked-by: Linus Walleij
---
drivers/gpio/gpio-samsung.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio
fic data which is
used by the Samsung pinctrl driver to setup the pinctrl/pinmux/eint
controllers. The second and third patches skips the wakeup interrupt and
gpiolib registration if the pinctrl support is enabled for Exynos5250.
Thomas Abraham (3):
pinctrl: exynos: add exynos5250 SoC specific d
On 6 March 2013 05:20, Doug Anderson wrote:
> Thomas,
>
> On Mon, Mar 4, 2013 at 6:04 AM, Thomas Abraham
> wrote:
>>
>> Ok. I will repost this patch again with pinctrl_1 and pinctrl_2
>> included. I had not included this in the earlier patch since I was not
>&g
On 6 March 2013 04:59, Doug Anderson wrote:
> Tomasz,
>
> Thanks for your response.
>
>
> On Sat, Mar 2, 2013 at 3:48 AM, Tomasz Figa wrote:
>>
>> The 4 patches above are already merged in Kgene's for-next-next (for 3.10)
>> branch.
>
> Excellent. I see them now. I haven't yet seen them show up
On 27 December 2012 22:28, Kukjin Kim wrote:
> Thomas Abraham wrote:
>>
>> Hi Linus,
>>
>> On 14 December 2012 21:21, Linus Walleij wrote:
>> > On Thu, Dec 13, 2012 at 12:54 PM, Thomas Abraham
>> > wrote:
>> >
>> >> Add
On 4 March 2013 19:33, Heiko Stübner wrote:
> Hi Thomas,
>
> Am Montag, 4. März 2013, 14:42:53 schrieb Thomas Abraham:
>> With device core now able to setup the default pin configuration,
>> the call to devm_pinctrl_get_select_default can be removed. And
>> the pin conf
Hi Doug,
On 2 March 2013 17:18, Tomasz Figa wrote:
> Hello Doug,
>
> On Friday 01 of March 2013 16:19:39 Doug Anderson wrote:
>> Thomas and Tomasz,
>>
>> I'm trying to get my head wrapped around the state of pinctrl for
>> exynos5250. I see various patches that have floated around at times
>> bu
With device core now able to setup the default pin configuration,
the call to devm_pinctrl_get_select_default can be removed. And
the pin configuration code based on the deprecated Samsung specific
gpio bindings is also removed.
Signed-off-by: Thomas Abraham
---
Hi Heiko, Tomasz,
We have to
On 4 March 2013 15:52, Jingoo Han wrote:
> Exynos5440 has two PCIe controllers which can be used as Root Complex.
> This driver supports the PCIe controllers as Root Complex mode.
>
> Signed-off-by: Surendranath Gurivireddy Balla
> Signed-off-by: Siva Reddy Kallam
> Signed-off-by: Jingoo Han
>
For all supported peripheral controllers on Exynos4 SoCs, add clock lookup
information.
Cc: Kukjin Kim
Reviewed-by: Sylwester Nawrocki
Tested-by: Sylwester Nawrocki
Reviewed-by: Tomasz Figa
Tested-by: Tomasz Figa
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4.dtsi| 50
The clock frequency of xxti and xusbxti clocks is dependent on the frequency of
the
on-board oscillator that is used to generate these clocks. So allow the
frequency
of these clocks to be specfied from device tree.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4210
For all supported peripheral controllers on Exynos5250, add clock lookup
information.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos5250.dtsi | 72 +
1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot
For all supported peripheral controllers on Exynos5440, add clock lookup
information.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos5440.dtsi | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440.dtsi
Add clock controller nodes for Exynos4210, Exynos4x12, Exynos5250 and
Exynos5440 SoC.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/boot/dts/exynos4210.dtsi |6 ++
arch/arm/boot/dts/exynos4x12.dtsi |6 ++
arch/arm/boot/dts/exynos5250.dtsi |6 ++
arch/arm
Add support for mct clock lookup and setup to ensure that the mct clock
is has been turned on.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
drivers/clocksource/exynos_mct.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/clocksource/exynos_mct.c b
With the migration of Exynos4 clocks to use common clock framework, the old
styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll' is used
as the tick clock for mct controller.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
drivers/clocksource/exynos_mct.c
With support for device tree based clock lookup now available, remove the
auxdata table from exynos4/5 dt-enabled machine file.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/mach-exynos4-dt.c | 69 +--
arch/arm/mach-exynos/mach-exynos5-dt.c | 98
The clock speed of xxti and xusbxti clocks depends on the oscillator used on the
board to generate these clocks. For non-dt platforms, allow the board support
for those platforms to set the clock frequency of xxti and xusbxti clocks.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm
-by: Tomasz Figa
Signed-off-by: Thomas Abraham
---
drivers/clk/Makefile |1 +
drivers/clk/samsung/Makefile |5 +
drivers/clk/samsung/clk.c| 273 ++
drivers/clk/samsung/clk.h| 262
4 files
oke this new wrapper function.
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
arch/arm/mach-exynos/common.c | 16
arch/arm/mach-exynos/mach-armlex4210.c |2 +-
arch/arm/mach-exynos/mach-exynos4-dt.c |2 +-
arch/arm/mach-exynos/mach-exynos5-dt.c
The Exynos5440 clocks are statically listed and registered using the Samsung
specific common clock helper functions.
Cc: Mike Turquette
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/clock/exynos5440-clock.txt | 61 +
drivers/clk/samsung/Makefile
Reviewed-by: Tomasz Figa
Tested-by: Tomasz Figa
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings/clock/exynos4-clock.txt| 215 +
drivers/clk/samsung/Makefile |1 +
drivers/clk/samsung/clk-exynos4.c | 843
3 files
The Exynos5250 clocks are statically listed and registered using the Samsung
specific common clock helper functions. Both device tree based clock lookup
and clkdev based clock lookups are supported.
Cc: Mike Turquette
Cc: Kukjin Kim
Signed-off-by: Thomas Abraham
---
.../devicetree/bindings
them.
Cc: Mike Turquette
Cc: Kukjin Kim
Reviewed-by: Sylwester Nawrocki
Tested-by: Sylwester Nawrocki
Reviewed-by: Tomasz Figa
Tested-by: Tomasz Figa
Signed-off-by: Thomas Abraham
---
drivers/clk/samsung/Makefile |2 +-
drivers/clk/samsung/clk-pll.c |
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