Re: [PATCH RFC v4 1/3] PM / Runtime: Add an API pm_runtime_set_slave

2015-02-12 Thread amit daniel kachhap
Hi Alan,

On Mon, Feb 9, 2015 at 9:28 PM, Alan Stern st...@rowland.harvard.edu wrote:
 On Mon, 9 Feb 2015, Amit Daniel Kachhap wrote:

 This API creates a pm runtime slave type device which does not itself
 participates in pm runtime but depends on the master devices to power
 manage them.

 This makes no sense.  How can a master device manage a slave device?
 Devices are managed by drivers, not by other devices.
May be my commit is not explaining the requirements completely and the
API name may not reflect the relevance. But If you see the 3rd patch
it has one clock use-case where this new feature is used and the
current pm runtime feature is not sufficient enough to handle it. I
have one more IOMMU use case also which is not part of this patch
series.
I am not sure if this approach is final but I looked at runtime.c file
and it has couple of API's like pm_runtime_forbid/allow which
blocks/unblocks the runtime callbacks according to driver requirement.
In the similar line I added this new API.

  These devices should have pm runtime callbacks.

 These devices (like clock) may not implement complete pm_runtime calls
 such as pm_runtime_get/pm_runtime_put due to subsystems interaction
 behaviour or any other reason.

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/base/power/runtime.c | 18 ++
  include/linux/pm.h   |  1 +
  include/linux/pm_runtime.h   |  2 ++
  3 files changed, 21 insertions(+)

 This patch is unacceptable because it does not update the runtime PM
 documentation file.
my fault. Will update in next version.

 Besides, doesn't the no_callbacks flag already do more or less what you
 want?
yes to some extent. But I thought its purpose is different so I added 1 more.

Regards,
Amit D

 Alan Stern

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[PATCH RFC v4 0/3] PM / Runtime: Feature to power manage slave devices

2015-02-09 Thread Amit Daniel Kachhap
This patch is somewhat similar to V3 version but uses pm runtime framework to
register/fetch the information about the device which may be slave or master.
Since the power domain has the necessary information about devices so it invokes
the save/restore runtime callbacks for the slave devices.

There was objection raised by Kevin and others that V3 is hacky in nature so 
this
revision fixes it by keeping the slave device information in pm runtime 
framework.

The model works like,
DEV1 (Attaches itself with PD but no support of  pm_runtime_get and
 /  pm_runtime_put. Registers itself as pm runtime slave device.
/   Its local runtime_suspend/resume is invoked by PD.
   /
  /
PD -- DEV2 (Implements complete PM runtime and calls pm_runtime_get and
  \ pm_runtime_put. This in turn invokes PD On/Off)
   \
DEV3 (Similar to DEV1)

This work is continuation of earlier work,

In V3: Used the existing API pm_genpd_dev_need_restore to add a feature to force
devices to perform restore/save during every power domain on/off
operation. This API is now removed.
Link (https://lkml.org/lkml/2014/12/13/74

In V2: Completely removed notfiers and add support for huge clock list to be
suspended and restored. There was some issue in this as some clocks are
not exposed and are just initialised by bootloaders. This approach
required all of them to be exposed which is cumbersome. Also some
clock API's set_parent are disabling the original parent clocks
which is not required.
Link (https://lkml.org/lkml/2014/11/24/290)

In V1: Implemented PM Domain notfier such as PD_ON_PRE, PD_ON_POST
PD_OFF_PRE and PD_OFF_POST. This was not supported and other
options suggested. link 
(http://www.spinics.net/lists/linux-samsung-soc/msg38442.html)

This work may also assist exynos iommu pm runtime posted earlier by Marek
http://lists.linaro.org/pipermail/linaro-mm-sig/2014-August/004099.html

Amit Daniel Kachhap (3):
  PM / Runtime: Add an API pm_runtime_set_slave
  PM / Domains: Save restore slave pm runtime devices
  clk: samsung: Add PM runtime support for clocks.

 drivers/base/power/domain.c  | 28 +
 drivers/base/power/runtime.c | 18 +
 drivers/clk/samsung/clk.c| 93 
 drivers/clk/samsung/clk.h| 11 ++
 include/linux/pm.h   |  1 +
 include/linux/pm_runtime.h   |  2 +
 6 files changed, 153 insertions(+)

-- 
2.2.0

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[PATCH RFC v4 1/3] PM / Runtime: Add an API pm_runtime_set_slave

2015-02-09 Thread Amit Daniel Kachhap
This API creates a pm runtime slave type device which does not itself
participates in pm runtime but depends on the master devices to power
manage them. These devices should have pm runtime callbacks.

These devices (like clock) may not implement complete pm_runtime calls
such as pm_runtime_get/pm_runtime_put due to subsystems interaction
behaviour or any other reason.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/base/power/runtime.c | 18 ++
 include/linux/pm.h   |  1 +
 include/linux/pm_runtime.h   |  2 ++
 3 files changed, 21 insertions(+)

diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 5070c4f..e247f08 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -1252,6 +1252,24 @@ void pm_runtime_no_callbacks(struct device *dev)
 EXPORT_SYMBOL_GPL(pm_runtime_no_callbacks);
 
 /**
+ * pm_runtime_set_slave - Set these devices as slave.
+ * @dev: Device to handle.
+ *
+ * Set the power.slave flag, which tells the PM core that this device is
+ * power-managed by the master device through the runtime callbacks. Since it
+ * will not manage runtime callbacks on its own, so runtime sysfs attributes is
+ * removed.
+ */
+void pm_runtime_set_slave(struct device *dev)
+{
+   spin_lock_irq(dev-power.lock);
+   dev-power.slave = true;
+   spin_unlock_irq(dev-power.lock);
+   if (device_is_registered(dev))
+   rpm_sysfs_remove(dev);
+}
+
+/**
  * pm_runtime_irq_safe - Leave interrupts disabled during callbacks.
  * @dev: Device to handle
  *
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 8b59763..a4090ef 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -581,6 +581,7 @@ struct dev_pm_info {
unsigned intuse_autosuspend:1;
unsigned inttimer_autosuspends:1;
unsigned intmemalloc_noio:1;
+   unsigned intslave:1;
enum rpm_requestrequest;
enum rpm_status runtime_status;
int runtime_error;
diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h
index 30e84d4..0707a4b 100644
--- a/include/linux/pm_runtime.h
+++ b/include/linux/pm_runtime.h
@@ -47,6 +47,7 @@ extern void __pm_runtime_disable(struct device *dev, bool 
check_resume);
 extern void pm_runtime_allow(struct device *dev);
 extern void pm_runtime_forbid(struct device *dev);
 extern void pm_runtime_no_callbacks(struct device *dev);
+extern void pm_runtime_set_slave(struct device *dev);
 extern void pm_runtime_irq_safe(struct device *dev);
 extern void __pm_runtime_use_autosuspend(struct device *dev, bool use);
 extern void pm_runtime_set_autosuspend_delay(struct device *dev, int delay);
@@ -168,6 +169,7 @@ static inline bool pm_runtime_suspended_if_enabled(struct 
device *dev) { return
 static inline bool pm_runtime_enabled(struct device *dev) { return false; }
 
 static inline void pm_runtime_no_callbacks(struct device *dev) {}
+static inline void pm_runtime_set_slave(struct device *dev) {}
 static inline void pm_runtime_irq_safe(struct device *dev) {}
 static inline bool pm_runtime_is_irq_safe(struct device *dev) { return false; }
 
-- 
2.2.0

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[PATCH RFC v4 2/3] PM / Domains: Save restore slave pm runtime devices

2015-02-09 Thread Amit Daniel Kachhap
Based on the runtime request of the active device, the callbacks of
the passive pm runtime devices will be invoked.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/base/power/domain.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index c5280f2..160e74a 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -49,6 +49,7 @@
 
 static LIST_HEAD(gpd_list);
 static DEFINE_MUTEX(gpd_list_lock);
+static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd);
 
 static struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
 {
@@ -176,6 +177,8 @@ static int genpd_power_on(struct generic_pm_domain *genpd)
pr_warn(%s: Power-%s latency exceeded, new value %lld ns\n,
genpd-name, on, elapsed_ns);
 
+   __pm_genpd_restore_devices(genpd);
+
return ret;
 }
 
@@ -397,6 +400,9 @@ static int __pm_genpd_save_device(struct pm_domain_data 
*pdd,
struct device *dev = pdd-dev;
int ret = 0;
 
+   if (dev-power.slave == true)
+   gpd_data-need_restore = 0;
+
if (gpd_data-need_restore  0)
return 0;
 
@@ -453,6 +459,28 @@ static void __pm_genpd_restore_device(struct 
pm_domain_data *pdd,
 }
 
 /**
+ * __pm_genpd_restore_devices- Restore the pre-suspend state of all device
+ * according to the restore flag.
+ * @genpd: PM domain the device belongs to.
+ */
+static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd)
+{
+   struct pm_domain_data *pdd;
+   struct generic_pm_domain_data *gpd_data;
+   struct device *dev;
+
+   /* Force restore the devices according to the restore flag */
+   list_for_each_entry(pdd, genpd-dev_list, list_node) {
+   dev = pdd-dev;
+   gpd_data = to_gpd_data(pdd);
+   if (dev-power.slave == true) {
+   gpd_data-need_restore = 1;
+   __pm_genpd_restore_device(pdd, genpd);
+   }
+   }
+}
+
+/**
  * genpd_abort_poweroff - Check if a PM domain power off should be aborted.
  * @genpd: PM domain to check.
  *
-- 
2.2.0

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[PATCH RFC v4 3/3] clk: samsung: Add PM runtime support for clocks.

2015-02-09 Thread Amit Daniel Kachhap
This patch adds PM runtime support for clocks associated with Power
Domain. The PM runtime suspend/resume handlers will be called when the
power domain associated with it, is turned on/off.

The registration of clocks happen in early initailisation. The probe
is later called to register the clock device with the power domain.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/clk/samsung/clk.c | 93 +++
 drivers/clk/samsung/clk.h | 11 ++
 2 files changed, 104 insertions(+)

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 4bda540..0b5c82a 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -12,6 +12,9 @@
 */
 
 #include linux/of_address.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/pm_runtime.h
 #include linux/syscore_ops.h
 
 #include clk.h
@@ -370,6 +373,92 @@ static void samsung_clk_sleep_init(void __iomem *reg_base,
unsigned long nr_rdump) {}
 #endif
 
+static int samsung_cmu_runtime_suspend(struct device *dev)
+{
+   struct samsung_clock_pd_reg_cache *reg_cache;
+
+   reg_cache = dev_get_drvdata(dev);
+   samsung_clk_save(reg_cache-reg_base, reg_cache-rdump,
+   reg_cache-rd_num);
+   return 0;
+}
+
+static int samsung_cmu_runtime_resume(struct device *dev)
+{
+   struct samsung_clock_pd_reg_cache *reg_cache;
+
+   reg_cache = dev_get_drvdata(dev);
+   samsung_clk_restore(reg_cache-reg_base, reg_cache-rdump,
+   reg_cache-rd_num);
+   return 0;
+}
+
+#define MAX_CMU_DEVICE_MATCH   50
+static int samsung_cmu_count;
+static struct of_device_id samsung_cmu_match[MAX_CMU_DEVICE_MATCH];
+MODULE_DEVICE_TABLE(of, samsung_cmu_match);
+
+static void samsung_clk_pd_init(struct device_node *np, void __iomem *reg_base,
+   struct samsung_cmu_info *cmu)
+{
+   struct samsung_clock_pd_reg_cache *pd_reg_cache;
+   const char *name;
+
+   if (samsung_cmu_count == MAX_CMU_DEVICE_MATCH)
+   panic(Maximum clock device limit reached.\n);
+
+   if (of_property_read_string_index(np, compatible, 0, name))
+   panic(Invalid DT node.\n);
+
+   pd_reg_cache = kzalloc(sizeof(struct samsung_clock_pd_reg_cache),
+   GFP_KERNEL);
+   if (!pd_reg_cache)
+   panic(Could not allocate register reg_cache.\n);
+
+   pd_reg_cache-rdump = samsung_clk_alloc_reg_dump(cmu-pd_clk_regs,
+   cmu-nr_pd_clk_regs);
+   if (!pd_reg_cache-rdump)
+   panic(Could not allocate register dump storage.\n);
+
+   pd_reg_cache-reg_base = reg_base;
+   pd_reg_cache-rd_num = cmu-nr_pd_clk_regs;
+
+   /* Fill up the compatible string and data */
+   samsung_cmu_match[samsung_cmu_count].data = pd_reg_cache;
+   strcpy(samsung_cmu_match[samsung_cmu_count].compatible, name);
+   samsung_cmu_count++;
+}
+
+static int __init samsung_cmu_probe(struct platform_device *pdev)
+{
+   struct device *dev = pdev-dev;
+   struct of_device_id *match;
+
+   /* get the platform data */
+   match = (struct of_device_id *)of_match_node(samsung_cmu_match,
+   pdev-dev.of_node);
+   if (!match)
+   return 0;
+   platform_set_drvdata(pdev, (void *)match-data);
+   pm_runtime_enable(dev);
+   pm_runtime_set_slave(dev);
+   return 0;
+}
+
+static const struct dev_pm_ops samsung_cmu_pm_ops = {
+   SET_RUNTIME_PM_OPS(samsung_cmu_runtime_suspend,
+   samsung_cmu_runtime_resume, NULL)
+};
+
+static struct platform_driver samsung_cmu_driver = {
+   .driver = {
+   .name   = exynos-clk,
+   .of_match_table = samsung_cmu_match,
+   .pm = samsung_cmu_pm_ops,
+   },
+   .probe = samsung_cmu_probe,
+};
+
 /*
  * Common function which registers plls, muxes, dividers and gates
  * for each CMU. It also add CMU register list to register cache.
@@ -409,5 +498,9 @@ void __init samsung_cmu_register_one(struct device_node *np,
samsung_clk_sleep_init(reg_base, cmu-clk_regs,
cmu-nr_clk_regs);
 
+   if (cmu-pd_clk_regs)
+   samsung_clk_pd_init(np, reg_base, cmu);
+
samsung_clk_of_add_provider(np, ctx);
 }
+module_platform_driver(samsung_cmu_driver);
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 8acabe1..7565be8 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -327,6 +327,12 @@ struct samsung_clock_reg_cache {
unsigned int rd_num;
 };
 
+struct samsung_clock_pd_reg_cache {
+   void __iomem *reg_base;
+   struct samsung_clk_reg_dump *rdump;
+   unsigned int rd_num;
+};
+
 struct samsung_cmu_info {
/* list of pll clocks and respective count */
struct samsung_pll_clock *pll_clks

Re: [PATCH RFC v3 1/2] PM / Domains: Extend API pm_genpd_dev_need_restore to use restore types

2014-12-17 Thread amit daniel kachhap
On Wed, Dec 17, 2014 at 3:40 AM, Kevin Hilman khil...@kernel.org wrote:
 Marek Szyprowski m.szyprow...@samsung.com writes:

 Hello,

 On 2014-12-13 17:51, Amit Daniel Kachhap wrote:
 Instead of using bool to restore suspended devices initially, use flags
 like GPD_DEV_SUSPEND_INIT, GPD_DEV_RESTORE_INIT and GPD_DEV_RESTORE_FORCE.
 The first two flags will be similar to the existing true/false 
 functionality.
 The third flag may be used to force restore of suspended devices
 whenever their associated power domain is turned on.

 Currently, PD power off function powers off all the associated unused
 devices. The functionality added in this patch is similar to it.

 This feature may be used for those devices which are always in ON state
 if the PD associated with them is ON but may need local runtime resume
 and suspend during PD On/Off. These devices (like clock) may not implement
 complete pm_runtime calls such as pm_runtime_get/pm_runtime_put due to
 subsystems interaction behaviour or any other reason.

 The model works like,
  DEV1 (Attaches itself with PD but no calls to pm_runtime_get and
  /   pm_runtime_put. Its local runtime_suspend/resume is invoked via
 /GPD_DEV_RESTORE_FORCE option)
/
 PD -- DEV2 (Implements complete PM runtime and calls pm_runtime_get and
\ pm_runtime_put. This in turn invokes PD On/Off)
 \
  DEV3 (Similar to DEV1)

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com

 The idea of adding new gen_pd flag and reusing runtime pm calls intead
 of additional notifiers looks promising, but I have some doubts.

 I agree, this is better than notifiers, but I have some doubts too.

Thanks,


 don't see any guarantee that devices with GPD_DEV_RESTORE_FORCE flag
 will be suspended after all normal devices and restored before
 them. Without such assumption it will be hard to use this approach for
 iommu related activities, because device might need to use (in its
 suspend/resume callbacks) the functionality provided by the other
 device with GPD_DEV_RESTORE_FORCE flag. Maybe some additional flags
 like suspend/resume priority (or more flags) will solve somehow this
 dependency.

 At a deeper level, the problem with this approach is that this is more
 generically a runtime PM dependency problem, not a genpd problem.  For
 example, what happens when the same kind of dependency exists on a
 platform using a custom PM domain instead of genpd (like ACPI.) ?

This patch does not try to solve runtime PM dependencies between
devices. As an example, if there are three devices D1, D2, D3 in a
power domain. Device D3 would update the power domain state
requirement using runtime PM API but devices D1 and D2 do not want to
control the domain but just want to be notified when the power domain
state changes.


 What's needed to solve this problem is a generalized way to have runtime
 PM dependencies between devices.  Runtime PM already automatically
 handles parent devices as one type of dependent device (e.g. a parent
 device needs to be runtime PM resumed before its child.)  So what's
 needed is a generic way to other PM dependencies with the runtime PM
 core (not the genpd core.)

Considering the example above with three devices, device D1 and D2 are
passive components in this power domain. These devices only need to
know the state changes of the power domains but would not control the
power domain themselves nor put forth constraints in the power domain
state changes. So I did not clearly understand as to how this example
could be solved by introducing changes in runtime PM core.

Regards,
Amit Daniel


 If runtime PM handles the dependencies corretcly, then genpd (and any
 other PM domain) will get them for free.

 Kevin
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Re: [PATCH RFC v3 1/2] PM / Domains: Extend API pm_genpd_dev_need_restore to use restore types

2014-12-17 Thread amit daniel kachhap
On Wed, Dec 17, 2014 at 6:38 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
 Hello,


 On 2014-12-17 03:43, amit daniel kachhap wrote:

 On Tue, Dec 16, 2014 at 4:40 PM, Marek Szyprowski
 m.szyprow...@samsung.com wrote:

 Hello,

 On 2014-12-13 17:51, Amit Daniel Kachhap wrote:

 Instead of using bool to restore suspended devices initially, use flags
 like GPD_DEV_SUSPEND_INIT, GPD_DEV_RESTORE_INIT and
 GPD_DEV_RESTORE_FORCE.
 The first two flags will be similar to the existing true/false
 functionality.
 The third flag may be used to force restore of suspended devices
 whenever their associated power domain is turned on.

 Currently, PD power off function powers off all the associated unused
 devices. The functionality added in this patch is similar to it.

 This feature may be used for those devices which are always in ON state
 if the PD associated with them is ON but may need local runtime resume
 and suspend during PD On/Off. These devices (like clock) may not
 implement
 complete pm_runtime calls such as pm_runtime_get/pm_runtime_put due to
 subsystems interaction behaviour or any other reason.

 The model works like,
   DEV1 (Attaches itself with PD but no calls to pm_runtime_get and
   /  pm_runtime_put. Its local runtime_suspend/resume is invoked via
  /   GPD_DEV_RESTORE_FORCE option)
 /
 PD -- DEV2 (Implements complete PM runtime and calls pm_runtime_get and
 \pm_runtime_put. This in turn invokes PD On/Off)
  \
   DEV3 (Similar to DEV1)

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com


 The idea of adding new gen_pd flag and reusing runtime pm calls intead of
 additional
 notifiers looks promising, but I have some doubts. I don't see any
 guarantee
 that
 devices with GPD_DEV_RESTORE_FORCE flag will be suspended after all
 normal
 devices
 and restored before them. Without such assumption it will be hard to use
 this approach
 for iommu related activities, because device might need to use (in its
 suspend/resume
 callbacks) the functionality provided by the other device with
 GPD_DEV_RESTORE_FORCE
 flag. Maybe some additional flags like suspend/resume priority (or more
 flags) will
 solve somehow this dependency.

 Thanks for pointing this issue out. I agree that there is no priority
 in suspending devices with this flag. But this works well in syncing
 with power domain on/off as the devices of these types have only
 dependency with power domain. BTW I tested this implementation with
 your first version of IOMMU save/restore patches. Although i have not
 posted those but they work fine. I can post those after cleaning them
 up.


 Right, they will work, but mainly because right now master devices don't
 do any memory DMA operations in suspend/resume callbacks. However, to
 propose
 it as a generic solution, the priority and the order of operations should be
 somehow determined.
Hi,

I feel this behavior is analogous to system sleep where the devices
suspend/resume are called based on initialization types like early
init, pre core, post core , late init etc.
These types handle the priority and interdependency among devices. So,
In my opinion we can use the same for power domain also. if these
types are not sufficient enough than it may be considered for future
work.

Regards,
Amit Daniel


 Here, the ordering between various devices is taken care as they are
 probed at different point of time(clock then IOMMU). so the suspend
 happens in reverse probe order and resume happens in probe order. I
 will check more on this and get back.


 Right now, it probably used the order of probing. Because iommu controllers
 are probed earlier, so they are handled before the master devices.


 Best regards
 --
 Marek Szyprowski, PhD
 Samsung RD Institute Poland

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Re: [PATCH RFC v3 1/2] PM / Domains: Extend API pm_genpd_dev_need_restore to use restore types

2014-12-16 Thread amit daniel kachhap
On Tue, Dec 16, 2014 at 4:40 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
 Hello,

 On 2014-12-13 17:51, Amit Daniel Kachhap wrote:

 Instead of using bool to restore suspended devices initially, use flags
 like GPD_DEV_SUSPEND_INIT, GPD_DEV_RESTORE_INIT and GPD_DEV_RESTORE_FORCE.
 The first two flags will be similar to the existing true/false
 functionality.
 The third flag may be used to force restore of suspended devices
 whenever their associated power domain is turned on.

 Currently, PD power off function powers off all the associated unused
 devices. The functionality added in this patch is similar to it.

 This feature may be used for those devices which are always in ON state
 if the PD associated with them is ON but may need local runtime resume
 and suspend during PD On/Off. These devices (like clock) may not implement
 complete pm_runtime calls such as pm_runtime_get/pm_runtime_put due to
 subsystems interaction behaviour or any other reason.

 The model works like,
  DEV1 (Attaches itself with PD but no calls to pm_runtime_get and
  /  pm_runtime_put. Its local runtime_suspend/resume is invoked via
 /   GPD_DEV_RESTORE_FORCE option)
/
 PD -- DEV2 (Implements complete PM runtime and calls pm_runtime_get and
\pm_runtime_put. This in turn invokes PD On/Off)
 \
  DEV3 (Similar to DEV1)

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com


 The idea of adding new gen_pd flag and reusing runtime pm calls intead of
 additional
 notifiers looks promising, but I have some doubts. I don't see any guarantee
 that
 devices with GPD_DEV_RESTORE_FORCE flag will be suspended after all normal
 devices
 and restored before them. Without such assumption it will be hard to use
 this approach
 for iommu related activities, because device might need to use (in its
 suspend/resume
 callbacks) the functionality provided by the other device with
 GPD_DEV_RESTORE_FORCE
 flag. Maybe some additional flags like suspend/resume priority (or more
 flags) will
 solve somehow this dependency.

Hi Marek,

Thanks for pointing this issue out. I agree that there is no priority
in suspending devices with this flag. But this works well in syncing
with power domain on/off as the devices of these types have only
dependency with power domain. BTW I tested this implementation with
your first version of IOMMU save/restore patches. Although i have not
posted those but they work fine. I can post those after cleaning them
up.
Here, the ordering between various devices is taken care as they are
probed at different point of time(clock then IOMMU). so the suspend
happens in reverse probe order and resume happens in probe order. I
will check more on this and get back.

Thanks,
Amit Daniel



 ---
 This work is continuation of earlier work,

 In V2: Completely removed notfiers and add support for huge clock list to
 be
 suspended and restored. There was some issue in this as some
 clocks are
 not exposed and are just initialised by bootloaders. This approach
 required all of them to be exposed which is cumbersome. Also some
 clock API's set_parent are disabling the original parent clocks
 which is not required.
 Link (https://lkml.org/lkml/2014/11/24/290)

 In V1: Implemented PM Domain notfier such as PD_ON_PRE, PD_ON_POST
 PD_OFF_PRE and PD_OFF_POST. This was not supported and other
 options suggested. link
 (http://www.spinics.net/lists/linux-samsung-soc/msg38442.html)

 This work may also assist exynos iommu pm runtime posted earlier by Marek
 http://lists.linaro.org/pipermail/linaro-mm-sig/2014-August/004099.html

   drivers/base/power/domain.c | 40
 
   include/linux/pm_domain.h   | 15 +--
   2 files changed, 49 insertions(+), 6 deletions(-)

 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
 index 6a103a3..d955a05 100644
 --- a/drivers/base/power/domain.c
 +++ b/drivers/base/power/domain.c
 @@ -49,6 +49,7 @@
 static LIST_HEAD(gpd_list);
   static DEFINE_MUTEX(gpd_list_lock);
 +static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd);
 static struct generic_pm_domain *pm_genpd_lookup_name(const char
 *domain_name)
   {
 @@ -176,6 +177,8 @@ static int genpd_power_on(struct generic_pm_domain
 *genpd)
 pr_warn(%s: Power-%s latency exceeded, new value %lld ns\n,
 genpd-name, on, elapsed_ns);
   + __pm_genpd_restore_devices(genpd);
 +
 return ret;
   }
   @@ -453,6 +456,24 @@ static void __pm_genpd_restore_device(struct
 pm_domain_data *pdd,
   }
 /**
 + * __pm_genpd_restore_devices- Restore the pre-suspend state of all
 device
 + * according to the restore flag.
 + * @genpd: PM domain the device belongs to.
 + */
 +static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd)
 +{
 +   struct pm_domain_data *pdd;
 +   struct generic_pm_domain_data

[PATCH RFC v3 2/2] clk: samsung: Add PM runtime support for clocks.

2014-12-13 Thread Amit Daniel Kachhap
This patch adds PM runtime support for clocks associated with Power
Domain. The PM runtime suspend/resume handlers will be called when the
power domain associated with it, is turned on/off.

The registration of clocks happen in early initailisation. The probe
is later called to register the clock device with the power domain.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/clk/samsung/clk.c | 95 +++
 drivers/clk/samsung/clk.h | 11 ++
 2 files changed, 106 insertions(+)

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index dd1f7c9..c517aa8 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -11,6 +11,10 @@
  * clock framework for Samsung platforms.
 */
 
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/pm_domain.h
+#include linux/pm_runtime.h
 #include linux/syscore_ops.h
 #include clk.h
 
@@ -370,6 +374,93 @@ static void samsung_clk_sleep_init(void __iomem *reg_base,
unsigned long nr_rdump) {}
 #endif
 
+static int samsung_cmu_runtime_suspend(struct device *dev)
+{
+   struct samsung_clock_pd_reg_cache *reg_cache;
+
+   reg_cache = dev_get_drvdata(dev);
+   samsung_clk_save(reg_cache-reg_base, reg_cache-rdump,
+   reg_cache-rd_num);
+   return 0;
+}
+
+static int samsung_cmu_runtime_resume(struct device *dev)
+{
+   struct samsung_clock_pd_reg_cache *reg_cache;
+
+   reg_cache = dev_get_drvdata(dev);
+   samsung_clk_restore(reg_cache-reg_base, reg_cache-rdump,
+   reg_cache-rd_num);
+   return 0;
+}
+
+#define MAX_CMU_DEVICE_MATCH   50
+static int samsung_cmu_count;
+static struct of_device_id samsung_cmu_match[MAX_CMU_DEVICE_MATCH];
+MODULE_DEVICE_TABLE(of, samsung_cmu_match);
+
+static void samsung_clk_pd_init(struct device_node *np, void __iomem *reg_base,
+   struct samsung_cmu_info *cmu)
+{
+   struct samsung_clock_pd_reg_cache *pd_reg_cache;
+   const char *name;
+
+   if (samsung_cmu_count == MAX_CMU_DEVICE_MATCH)
+   panic(Maximum clock device limit reached.\n);
+
+   if (of_property_read_string_index(np, compatible, 0, name))
+   panic(Invalid DT node.\n);
+
+   pd_reg_cache = kzalloc(sizeof(struct samsung_clock_pd_reg_cache),
+   GFP_KERNEL);
+   if (!pd_reg_cache)
+   panic(Could not allocate register reg_cache.\n);
+
+   pd_reg_cache-rdump = samsung_clk_alloc_reg_dump(cmu-pd_clk_regs,
+   cmu-nr_pd_clk_regs);
+   if (!pd_reg_cache-rdump)
+   panic(Could not allocate register dump storage.\n);
+
+   pd_reg_cache-reg_base = reg_base;
+   pd_reg_cache-rd_num = cmu-nr_pd_clk_regs;
+
+   /* Fill up the compatible string and data */
+   samsung_cmu_match[samsung_cmu_count].data = pd_reg_cache;
+   strcpy(samsung_cmu_match[samsung_cmu_count].compatible, name);
+   samsung_cmu_count++;
+}
+
+static int __init samsung_cmu_probe(struct platform_device *pdev)
+{
+   struct device *dev = pdev-dev;
+   struct of_device_id *match;
+
+   /* get the platform data */
+   match = (struct of_device_id *)of_match_node(samsung_cmu_match,
+   pdev-dev.of_node);
+   if (!match)
+   return 0;
+   platform_set_drvdata(pdev, (void *)match-data);
+   pm_runtime_enable(dev);
+   pm_genpd_dev_need_restore(dev,
+   GPD_DEV_RESTORE_FORCE | GPD_DEV_SUSPEND_INIT);
+   return 0;
+}
+
+static const struct dev_pm_ops samsung_cmu_pm_ops = {
+   SET_RUNTIME_PM_OPS(samsung_cmu_runtime_suspend,
+   samsung_cmu_runtime_resume, NULL)
+};
+
+static struct platform_driver samsung_cmu_driver = {
+   .driver = {
+   .name   = exynos-clk,
+   .of_match_table = samsung_cmu_match,
+   .pm = samsung_cmu_pm_ops,
+   },
+   .probe = samsung_cmu_probe,
+};
+
 /*
  * Common function which registers plls, muxes, dividers and gates
  * for each CMU. It also add CMU register list to register cache.
@@ -409,5 +500,9 @@ void __init samsung_cmu_register_one(struct device_node *np,
samsung_clk_sleep_init(reg_base, cmu-clk_regs,
cmu-nr_clk_regs);
 
+   if (cmu-pd_clk_regs)
+   samsung_clk_pd_init(np, reg_base, cmu);
+
samsung_clk_of_add_provider(np, ctx);
 }
+module_platform_driver(samsung_cmu_driver);
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 3f471e9..c184ec1 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -331,6 +331,12 @@ struct samsung_clock_reg_cache {
unsigned int rd_num;
 };
 
+struct samsung_clock_pd_reg_cache {
+   void __iomem *reg_base;
+   struct samsung_clk_reg_dump *rdump;
+   unsigned int rd_num

[PATCH RFC v3 1/2] PM / Domains: Extend API pm_genpd_dev_need_restore to use restore types

2014-12-13 Thread Amit Daniel Kachhap
Instead of using bool to restore suspended devices initially, use flags
like GPD_DEV_SUSPEND_INIT, GPD_DEV_RESTORE_INIT and GPD_DEV_RESTORE_FORCE.
The first two flags will be similar to the existing true/false functionality.
The third flag may be used to force restore of suspended devices
whenever their associated power domain is turned on.

Currently, PD power off function powers off all the associated unused
devices. The functionality added in this patch is similar to it.

This feature may be used for those devices which are always in ON state
if the PD associated with them is ON but may need local runtime resume
and suspend during PD On/Off. These devices (like clock) may not implement
complete pm_runtime calls such as pm_runtime_get/pm_runtime_put due to
subsystems interaction behaviour or any other reason.

The model works like,
DEV1 (Attaches itself with PD but no calls to pm_runtime_get and
/   pm_runtime_put. Its local runtime_suspend/resume is invoked via
   /GPD_DEV_RESTORE_FORCE option)
  /
PD -- DEV2 (Implements complete PM runtime and calls pm_runtime_get and
  \ pm_runtime_put. This in turn invokes PD On/Off)
   \
DEV3 (Similar to DEV1)

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
This work is continuation of earlier work,

In V2: Completely removed notfiers and add support for huge clock list to be
suspended and restored. There was some issue in this as some clocks are
not exposed and are just initialised by bootloaders. This approach
required all of them to be exposed which is cumbersome. Also some
clock API's set_parent are disabling the original parent clocks
which is not required.
Link (https://lkml.org/lkml/2014/11/24/290)

In V1: Implemented PM Domain notfier such as PD_ON_PRE, PD_ON_POST
PD_OFF_PRE and PD_OFF_POST. This was not supported and other
options suggested. link 
(http://www.spinics.net/lists/linux-samsung-soc/msg38442.html)

This work may also assist exynos iommu pm runtime posted earlier by Marek
http://lists.linaro.org/pipermail/linaro-mm-sig/2014-August/004099.html

 drivers/base/power/domain.c | 40 
 include/linux/pm_domain.h   | 15 +--
 2 files changed, 49 insertions(+), 6 deletions(-)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 6a103a3..d955a05 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -49,6 +49,7 @@
 
 static LIST_HEAD(gpd_list);
 static DEFINE_MUTEX(gpd_list_lock);
+static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd);
 
 static struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
 {
@@ -176,6 +177,8 @@ static int genpd_power_on(struct generic_pm_domain *genpd)
pr_warn(%s: Power-%s latency exceeded, new value %lld ns\n,
genpd-name, on, elapsed_ns);
 
+   __pm_genpd_restore_devices(genpd);
+
return ret;
 }
 
@@ -453,6 +456,24 @@ static void __pm_genpd_restore_device(struct 
pm_domain_data *pdd,
 }
 
 /**
+ * __pm_genpd_restore_devices- Restore the pre-suspend state of all device
+ * according to the restore flag.
+ * @genpd: PM domain the device belongs to.
+ */
+static void __pm_genpd_restore_devices(struct generic_pm_domain *genpd)
+{
+   struct pm_domain_data *pdd;
+   struct generic_pm_domain_data *gpd_data;
+
+   /* Force restore the devices according to the restore flag */
+   list_for_each_entry(pdd, genpd-dev_list, list_node) {
+   gpd_data = to_gpd_data(pdd);
+   if (gpd_data-force_restore == true)
+   __pm_genpd_restore_device(pdd, genpd);
+   }
+}
+
+/**
  * genpd_abort_poweroff - Check if a PM domain power off should be aborted.
  * @genpd: PM domain to check.
  *
@@ -1469,6 +1490,7 @@ int __pm_genpd_add_device(struct generic_pm_domain 
*genpd, struct device *dev,
gpd_data-base.dev = dev;
list_add_tail(gpd_data-base.list_node, genpd-dev_list);
gpd_data-need_restore = -1;
+   gpd_data-force_restore = false;
gpd_data-td.constraint_changed = true;
gpd_data-td.effective_constraint_ns = -1;
mutex_unlock(gpd_data-lock);
@@ -1561,18 +1583,28 @@ int pm_genpd_remove_device(struct generic_pm_domain 
*genpd,
 /**
  * pm_genpd_dev_need_restore - Set/unset the device's need restore flag.
  * @dev: Device to set/unset the flag for.
- * @val: The new value of the device's need restore flag.
+ * @val: This can have values GPD_DEV_SUSPEND_INIT or GPD_DEV_RESTORE_INIT
+ * together with GPD_DEV_RESTORE_FORCE.
  */
-void pm_genpd_dev_need_restore(struct device *dev, bool val)
+void pm_genpd_dev_need_restore(struct device *dev, unsigned int val)
 {
struct pm_subsys_data *psd;
+   struct generic_pm_domain_data *pdd;
unsigned long flags;
 
spin_lock_irqsave(dev-power.lock, flags);
 
psd

Re: [PATCH] PM/ Domains: Export of_genpd_get_from_provider function.

2014-12-05 Thread amit daniel kachhap
On Thu, Dec 4, 2014 at 9:09 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 1 December 2014 at 12:41, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This function looks up a PM domain form the provider. This will be
 useful to add parent/child domain relationship from the SoC specific
 code. The caller of the function must make sure that PM domain provider
 is already registered.

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
 This patch may solve the same purpose which is done by earlier posts
 1) https://lkml.org/lkml/2014/11/24/319 - In this there were comments
 for not using the PM domain name.

 2) Ulf Hansson posted a patch
 http://www.spinics.net/lists/linux-samsung-soc/msg39745.html which also 
 solves
 similar purpose but I feel this is slightly complex and involves changing
 the genpd structure.


  drivers/base/power/domain.c |3 ++-
  include/linux/pm_domain.h   |8 
  2 files changed, 10 insertions(+), 1 deletion(-)

 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
 index d822753..5d7a2c1 100644
 --- a/drivers/base/power/domain.c
 +++ b/drivers/base/power/domain.c
 @@ -2129,7 +2129,7 @@ EXPORT_SYMBOL_GPL(of_genpd_del_provider);
   * Returns a valid pointer to struct generic_pm_domain on success or 
 ERR_PTR()
   * on failure.
   */
 -static struct generic_pm_domain *of_genpd_get_from_provider(
 +struct generic_pm_domain *of_genpd_get_from_provider(
 struct of_phandle_args *genpdspec)
  {
 struct generic_pm_domain *genpd = ERR_PTR(-ENOENT);
 @@ -2149,6 +2149,7 @@ static struct generic_pm_domain 
 *of_genpd_get_from_provider(

 return genpd;
  }
 +EXPORT_SYMBOL_GPL(of_genpd_get_from_provider);

  /**
   * genpd_dev_pm_detach - Detach a device from its PM domain.
 diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
 index 9690827..4954e24 100644
 --- a/include/linux/pm_domain.h
 +++ b/include/linux/pm_domain.h
 @@ -282,6 +282,8 @@ typedef struct generic_pm_domain 
 *(*genpd_xlate_t)(struct of_phandle_args *args,
  int __of_genpd_add_provider(struct device_node *np, genpd_xlate_t xlate,
 void *data);
  void of_genpd_del_provider(struct device_node *np);
 +struct generic_pm_domain *of_genpd_get_from_provider(
 +   struct of_phandle_args *genpdspec);

  struct generic_pm_domain *__of_genpd_xlate_simple(
 struct of_phandle_args *genpdspec,
 @@ -299,6 +301,12 @@ static inline int __of_genpd_add_provider(struct 
 device_node *np,
  }
  static inline void of_genpd_del_provider(struct device_node *np) {}

 +static inline struct generic_pm_domain *of_genpd_get_from_provider(
 +   struct of_phandle_args *genpdspec)
 +{
 +   return NULL;
 +}
 +
  #define __of_genpd_xlate_simpleNULL
  #define __of_genpd_xlate_onecell   NULL

 --
 1.7.9.5


 This seems like a good approach!

 Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
Thanks.

 Do, note that you will have to resend the patch to linux-pm list as
 well. Unless Rafael is happy to pick it up from here.
Sure. My fault.

Regards,
Amit

 Kind regards
 Uffe
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Re: [PATCH v2 2/7] ARM: Exynos: add support for sub-power domains

2014-12-03 Thread amit daniel kachhap
On Wed, Dec 3, 2014 at 6:03 PM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
 This patch adds support for making one power domain a sub-domain of
 other domain. This is useful for modeling power dependences for devices
 like TV Mixer or Camera ISP, which needs to have more than one power
 domain enabled to be operational.

 Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
 ---
  Documentation/devicetree/bindings/arm/exynos/power_domain.txt |  2 ++
  arch/arm/mach-exynos/pm_domains.c | 11 
 ++-
  2 files changed, 12 insertions(+), 1 deletion(-)

 diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
 b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 index abde1ea8a119..b884358ebb1a 100644
 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 @@ -22,6 +22,8 @@ Optional Properties:
 - pclkN, clkN: Pairs of parent of input clock and input clock to the
 devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
 are supported currently.
 +- samsung,power-domain: phandle to a master power domain that the given 
 domain
 +  is a part of

  Node of a device using power domains must have a samsung,power-domain 
 property
  defined with a phandle to respective power domain.
 diff --git a/arch/arm/mach-exynos/pm_domains.c 
 b/arch/arm/mach-exynos/pm_domains.c
 index 20f267121b3e..fa9a47ddad81 100644
 --- a/arch/arm/mach-exynos/pm_domains.c
 +++ b/arch/arm/mach-exynos/pm_domains.c
 @@ -108,7 +108,7 @@ static int exynos_pd_power_off(struct generic_pm_domain 
 *domain)
  static __init int exynos4_pm_init_power_domain(void)
  {
 struct platform_device *pdev;
 -   struct device_node *np;
 +   struct device_node *np, *master_np;

 for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
 struct exynos_pm_domain *pd;
 @@ -159,6 +159,15 @@ no_clk:

 pm_genpd_init(pd-pd, NULL, !on);
 of_genpd_add_provider_simple(np, pd-pd);
 +
 +   /* make master and slave hierarchy */
 +   master_np = of_parse_phandle(np, samsung,power-domain, 0);
 +   if (!master_np)
 +   master_np = of_parse_phandle(np, power-domains, 0);
 +   if (master_np) {
 +   pm_genpd_add_subdomain_names(master_np-name, 
 np-name);
 +   of_node_put(master_np);
 +   }
 }
Hi Marek,

In the my patch series posted earlier i added this feature in a
slightly different way. (https://lkml.org/lkml/2014/11/24/320)
Parent PD's are not added in the same loop but in the second loop.
This will make sure that the parents PD are registered before the
child PD's and we can get away from the assumption of child/parent
PD's position in the Device Tree. This is a still a work in progress.
Also posted a patch earlier regarding this,
http://www.spinics.net/lists/linux-samsung-soc/msg39836.html.

Regards,
Amit




 return 0;
 --
 1.9.2

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[PATCH] PM/ Domains: Export of_genpd_get_from_provider function.

2014-12-01 Thread Amit Daniel Kachhap
This function looks up a PM domain form the provider. This will be
useful to add parent/child domain relationship from the SoC specific
code. The caller of the function must make sure that PM domain provider
is already registered.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
This patch may solve the same purpose which is done by earlier posts
1) https://lkml.org/lkml/2014/11/24/319 - In this there were comments
for not using the PM domain name.

2) Ulf Hansson posted a patch 
http://www.spinics.net/lists/linux-samsung-soc/msg39745.html which also solves
similar purpose but I feel this is slightly complex and involves changing
the genpd structure.


 drivers/base/power/domain.c |3 ++-
 include/linux/pm_domain.h   |8 
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index d822753..5d7a2c1 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -2129,7 +2129,7 @@ EXPORT_SYMBOL_GPL(of_genpd_del_provider);
  * Returns a valid pointer to struct generic_pm_domain on success or ERR_PTR()
  * on failure.
  */
-static struct generic_pm_domain *of_genpd_get_from_provider(
+struct generic_pm_domain *of_genpd_get_from_provider(
struct of_phandle_args *genpdspec)
 {
struct generic_pm_domain *genpd = ERR_PTR(-ENOENT);
@@ -2149,6 +2149,7 @@ static struct generic_pm_domain 
*of_genpd_get_from_provider(
 
return genpd;
 }
+EXPORT_SYMBOL_GPL(of_genpd_get_from_provider);
 
 /**
  * genpd_dev_pm_detach - Detach a device from its PM domain.
diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index 9690827..4954e24 100644
--- a/include/linux/pm_domain.h
+++ b/include/linux/pm_domain.h
@@ -282,6 +282,8 @@ typedef struct generic_pm_domain *(*genpd_xlate_t)(struct 
of_phandle_args *args,
 int __of_genpd_add_provider(struct device_node *np, genpd_xlate_t xlate,
void *data);
 void of_genpd_del_provider(struct device_node *np);
+struct generic_pm_domain *of_genpd_get_from_provider(
+   struct of_phandle_args *genpdspec);
 
 struct generic_pm_domain *__of_genpd_xlate_simple(
struct of_phandle_args *genpdspec,
@@ -299,6 +301,12 @@ static inline int __of_genpd_add_provider(struct 
device_node *np,
 }
 static inline void of_genpd_del_provider(struct device_node *np) {}
 
+static inline struct generic_pm_domain *of_genpd_get_from_provider(
+   struct of_phandle_args *genpdspec)
+{
+   return NULL;
+}
+
 #define __of_genpd_xlate_simpleNULL
 #define __of_genpd_xlate_onecell   NULL
 
-- 
1.7.9.5

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Re: [PATCH V2] PM / Domains: Add pm_genpd_lookup() API to lookup domain by firmware node

2014-12-01 Thread amit daniel kachhap
On Mon, Dec 1, 2014 at 3:56 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 29 November 2014 at 01:30, Rafael J. Wysocki r...@rjwysocki.net wrote:
 On Friday, November 28, 2014 11:38:35 AM Ulf Hansson wrote:
 In a step to move away from using genpd's name based APIs, such as the
 pm_genpd_add_subdomain_names(), provide an API to lookup an already
 initialized generic PM domain by its firmware node.

 This API would typically be a called from SOC specific code, to fetch a
 handle to the domain. Especially convenient to configure subdomains and
 when the hierarchy of the domains are described in DT.

 Do note, before pm_genpd_init() is invoked to initialize a generic PM
 domain, it's the callers responsibility to assign the new -fwnode
 pointer in the struct generic_pm_domain, to enable pm_genpd_lookup() to
 find the domain.

 Signed-off-by: Ulf Hansson ulf.hans...@linaro.org

 I have no problems with that, but do you have a user for it?

 Amit Daniel Kachhap, posted a patchset which is adding subdomains
 configured from DT for Exynos. It's from there the idea to this patch
 comes from. Amit is about to post a new version, based on this patch.

Hi Ulf,

I was trying to use this API but i felt there is a better way of just exporting
of_genpd_get_from_provider as a similar API is used to register the
power domain.

Check if this make sense www.spinics.net/lists/arm-kernel/msg382665.html.

Regards,
Amit



 https://lkml.org/lkml/2014/11/24/290

 Kind regards
 Uffe
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Re: [PATCH v5 2/6] drivers: soc: Add support for Exynos PMU driver

2014-11-30 Thread amit daniel kachhap
On Sun, Nov 30, 2014 at 4:54 AM, Kukjin Kim kg...@kernel.org wrote:
 Amit Daniel Kachhap wrote:

 This patch moves Exynos PMU driver implementation from arm/mach-exynos
 to drivers/soc/samsung. This driver is mainly used for setting misc
 bits of register from PMU IP of Exynos SoC which will be required to
 configure before Suspend/Resume. Currently all these settings are done
 in arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
 support, there is a need of this PMU driver in driver/* folder.

 This driver uses existing DT binding information and there should
 be no functionality change in the supported platforms.

 Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  arch/arm/mach-exynos/Makefile  |2 +-
  drivers/soc/Kconfig|1 +
  drivers/soc/Makefile   |1 +
  drivers/soc/samsung/Kconfig|   20 
 
  drivers/soc/samsung/Makefile   |1 +
  .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
  6 files changed, 24 insertions(+), 1 deletion(-)
  create mode 100644 drivers/soc/samsung/Kconfig
  create mode 100644 drivers/soc/samsung/Makefile
  rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

 diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
 index bcefb54..b91b382 100644
 --- a/arch/arm/mach-exynos/Makefile
 +++ b/arch/arm/mach-exynos/Makefile
 @@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
 -I$(srctree)/$(src)/include -I$(srctree)

  # Core

 -obj-$(CONFIG_ARCH_EXYNOS)+= exynos.o pmu.o exynos-smc.o firmware.o
 +obj-$(CONFIG_ARCH_EXYNOS)+= exynos.o exynos-smc.o firmware.o

  obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
  obj-$(CONFIG_PM_SLEEP)   += suspend.o
 diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
 index 76d6bd4..90f33b9 100644
 --- a/drivers/soc/Kconfig
 +++ b/drivers/soc/Kconfig
 @@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
  source drivers/soc/qcom/Kconfig
  source drivers/soc/ti/Kconfig
  source drivers/soc/versatile/Kconfig
 +source drivers/soc/samsung/Kconfig

 Alphabetical order?
Ok, will add in the next version.

 [...]

 - Kukjin

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Re: [PATCH v5 3/6] driver: soc: exynos-pmu: Add an API to be called after wakeup

2014-11-30 Thread amit daniel kachhap
On Sun, Nov 30, 2014 at 4:56 AM, Kukjin Kim kg...@kernel.org wrote:
 Amit Daniel Kachhap wrote:

 This patch adds an API exynos_sys_powerup_conf to be called after system 
 sleep
 wakeup. This will useful for exynos7 SoC to perform resume related
 initialisations. This is similar to currently existing API
 exynos_sys_powerdown_conf.

 Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com

 In subject,

 driver: soc... - drivers: soc... ?
Ok will change.

 - Kukjin

 ---
  drivers/soc/samsung/exynos-pmu.c   |9 +
  include/linux/soc/samsung/exynos-pmu.h |1 +
  2 files changed, 10 insertions(+)

 diff --git a/drivers/soc/samsung/exynos-pmu.c 
 b/drivers/soc/samsung/exynos-pmu.c
 index 7eb5b0b..c3307eb 100644
 --- a/drivers/soc/samsung/exynos-pmu.c
 +++ b/drivers/soc/samsung/exynos-pmu.c
 @@ -33,6 +33,7 @@ struct exynos_pmu_data {
   void (*pmu_init)(void);
   void (*powerdown_conf)(enum sys_powerdown);
   void (*powerdown_conf_extra)(enum sys_powerdown);
 + void (*powerup_conf)(enum sys_powerdown);
  };

  struct exynos_pmu_context {
 @@ -768,6 +769,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
   }
  }

 +void exynos_sys_powerup_conf(enum sys_powerdown mode)
 +{
 + const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
 +
 + if (pmu_data-powerup_conf)
 + pmu_data-powerup_conf(mode);
 +}
 +
  static void exynos3250_pmu_init(void)
  {
   unsigned int value;
 diff --git a/include/linux/soc/samsung/exynos-pmu.h 
 b/include/linux/soc/samsung/exynos-pmu.h
 index a2ab0d5..b497712 100644
 --- a/include/linux/soc/samsung/exynos-pmu.h
 +++ b/include/linux/soc/samsung/exynos-pmu.h
 @@ -20,5 +20,6 @@ enum sys_powerdown {
  };

  extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
 +extern void exynos_sys_powerup_conf(enum sys_powerdown mode);

  #endif /* __EXYNOS_PMU_H */
 --
 1.7.9.5

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Re: [PATCH v5 5/6] drivers: soc: exynos-pmu: Add support for Exynos7

2014-11-30 Thread amit daniel kachhap
On Sun, Nov 30, 2014 at 5:05 AM, Kukjin Kim kg...@kernel.org wrote:
 Amit Daniel Kachhap wrote:

 Add PMU settings for exynos7. This is required for future suspend-to-ram,
 cpuidle and power domain support.

 Note: In this patch some static declarations lines are over 80
 characters per line for easy redability.

 Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Eunseok Choi es10.c...@samsung.com
 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/soc/samsung/exynos-pmu.c|  427 
 ++-
  include/linux/soc/samsung/exynos-regs-pmu.h |  273 +
  2 files changed, 699 insertions(+), 1 deletion(-)

 I'm not sure all of the definitions in exynos-regs-pmu are required?...too 
 many,
 and I couldn't check the addresses are correct ;)
Actually i added the PMU power down for almost all the IP's of Exynos7
as this is full system power down.
I have taken care to add only used macros.

 And how about splitting to each SoC specific file in drivers/soc/samsung/ ?
 For example, exynos-pmu.c and exynos7-pmu.c like cpufreq...? Just considering.
Pankaj posted a patch which takes care of this.

Regards,
Amit D.

 - Kukjin

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[PATCH v5 1/6] ARM: EXYNOS: Move pmu specific headers under linux/soc/samsung

2014-11-29 Thread Amit Daniel Kachhap
Moving Exynos PMU specific header file into include/linux/soc/samsung
thus updated affected files under mach-exynos to use new location of
these header files.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 ++--
 arch/arm/mach-exynos/pmu.c |6 ++
 arch/arm/mach-exynos/suspend.c |4 ++--
 .../linux/soc/samsung}/exynos-pmu.h|0
 .../linux/soc/samsung/exynos-regs-pmu.h|0
 8 files changed, 9 insertions(+), 11 deletions(-)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (100%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (100%)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index c13d083..18cec1a 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include linux/platform_device.h
 #include linux/pm_domain.h
 #include linux/irqchip.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -29,7 +30,6 @@
 
 #include common.h
 #include mfc.h
-#include regs-pmu.h
 #include regs-sys.h
 
 void __iomem *pmu_base_addr;
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index b0d3c2e..c5e17b0 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -16,12 +16,12 @@
 #include linux/io.h
 #include linux/of_address.h
 #include linux/syscore_ops.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cputype.h
 #include asm/cp15.h
 #include asm/mcpm.h
 
-#include regs-pmu.h
 #include common.h
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 7a1ebfe..d6e7f49 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include linux/smp.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/cp15.h
@@ -30,7 +31,6 @@
 #include mach/map.h
 
 #include common.h
-#include regs-pmu.h
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 86f3ecd..1a981e0 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,8 @@
 #include linux/cpu_pm.h
 #include linux/io.h
 #include linux/err.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #include asm/firmware.h
 #include asm/smp_scu.h
@@ -26,8 +28,6 @@
 #include plat/pm-common.h
 
 #include common.h
-#include exynos-pmu.h
-#include regs-pmu.h
 #include regs-sys.h
 
 static inline void __iomem *exynos_boot_vector_addr(void)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index c15761c..7eb5b0b 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -16,10 +16,8 @@
 #include linux/delay.h
 #include linux/notifier.h
 #include linux/reboot.h
-
-
-#include exynos-pmu.h
-#include regs-pmu.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index f8e7dcd..80cf7ac 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -21,6 +21,8 @@
 #include linux/irqchip/arm-gic.h
 #include linux/err.h
 #include linux/regulator/machine.h
+#include linux/soc/samsung/exynos-pmu.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -33,9 +35,7 @@
 #include plat/regs-srom.h
 
 #include common.h
-#include regs-pmu.h
 #include regs-sys.h
-#include exynos-pmu.h
 
 #define S5P_CHECK_SLEEP 0x0BAD
 
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to include/linux/soc/samsung/exynos-pmu.h
diff --git a/arch/arm/mach-exynos/regs-pmu.h 
b/include/linux/soc/samsung/exynos-regs-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/regs-pmu.h
rename to include/linux/soc/samsung/exynos-regs-pmu.h
-- 
1.7.9.5

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[PATCH v5 2/6] drivers: soc: Add support for Exynos PMU driver

2014-11-29 Thread Amit Daniel Kachhap
This patch moves Exynos PMU driver implementation from arm/mach-exynos
to drivers/soc/samsung. This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.

This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |2 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
 6 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcefb54..b91b382 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..90f33b9 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
 source drivers/soc/qcom/Kconfig
 source drivers/soc/ti/Kconfig
 source drivers/soc/versatile/Kconfig
+source drivers/soc/samsung/Kconfig
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..fcd7e37 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
 obj-$(CONFIG_SOC_TI)   += ti/
 obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
+obj-$(CONFIG_SOC_SAMSUNG)  += samsung/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..6855cc4
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,20 @@
+#
+# SAMSUNG SOC drivers
+#
+menu Samsung SOC drivers support
+
+config SOC_SAMSUNG
+   bool
+
+config EXYNOS_PMU
+   bool Support Exynos Power Management Unit
+   depends on ARCH_EXYNOS
+   default y
+   help
+ Exynos SoC have Power Management Unit (PMU) which controls power and
+ operation state of various components in Exynos SoC. This driver
+ provides implementation of PMU driver and provides various
+ functionality like initialisation and transition to various low power
+ states.
+
+endmenu
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..5a879c6
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/soc/samsung/exynos-pmu.c
-- 
1.7.9.5

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[PATCH v5 4/6] driver: soc: exynos-pmu: Add a new structure to allow u32 conf data

2014-11-29 Thread Amit Daniel Kachhap
Commit b04fa9f ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
modifies the structure to allow only u8 type configuration data. To
support SoC's which need u32 type data a new structure is added.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c |9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index c3307eb..e1a4884 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -26,9 +26,14 @@ struct exynos_pmu_conf {
u8 val[NUM_SYS_POWERDOWN];
 };
 
+struct exynos_pmu_conf_extra {
+   u32 offset;
+   u32 val[NUM_SYS_POWERDOWN];
+};
+
 struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
-   const struct exynos_pmu_conf *pmu_config_extra;
+   const struct exynos_pmu_conf_extra *pmu_config_extra;
 
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
@@ -324,7 +329,7 @@ static const struct exynos_pmu_conf exynos4x12_pmu_config[] 
= {
{ PMU_TABLE_END,},
 };
 
-static const struct exynos_pmu_conf exynos4412_pmu_config[] = {
+static const struct exynos_pmu_conf_extra exynos4412_pmu_config[] = {
{ S5P_ARM_CORE2_LOWPWR, { 0x0, 0x0, 0x2 } },
{ S5P_DIS_IRQ_CORE2,{ 0x0, 0x0, 0x0 } },
{ S5P_DIS_IRQ_CENTRAL2, { 0x0, 0x0, 0x0 } },
-- 
1.7.9.5

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[PATCH v5 5/6] drivers: soc: exynos-pmu: Add support for Exynos7

2014-11-29 Thread Amit Daniel Kachhap
Add PMU settings for exynos7. This is required for future suspend-to-ram,
cpuidle and power domain support.

Note: In this patch some static declarations lines are over 80
characters per line for easy redability.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c|  427 ++-
 include/linux/soc/samsung/exynos-regs-pmu.h |  273 +
 2 files changed, 699 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index e1a4884..3d8b82c 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -48,6 +48,7 @@ struct exynos_pmu_context {
 
 static void __iomem *pmu_base_addr;
 static struct exynos_pmu_context *pmu_context;
+extern u32 exynos_get_eint_wake_mask(void);
 
 static inline void pmu_raw_writel(u32 val, u32 offset)
 {
@@ -627,6 +628,211 @@ static void exynos3250_powerdown_conf_extra(enum 
sys_powerdown mode)
   EXYNOS3_EXT_REGULATOR_COREBLK_DURATION);
 }
 
+static const struct exynos_pmu_conf exynos7_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } } */
+   { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG,   { 0x0, 0x0, 0x8 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1, 0x0 
} },
+   { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_BUS_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_SYS_PWR_REG,  { 0x3, 0x0, 0x3 
} },
+   { EXYNOS7_TOP_BUS_MIF_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_MIF_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_MIF_SYS_PWR_REG,  { 0x3, 0x0, 0x3 
} },
+   { EXYNOS7_RET_OSCCLK_GATE_SYS_PWR_REG,  { 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_LOGIC_RESET_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_OSCCLK_GATE_SYS_PWR_REG,  { 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_SLEEP_RESET_SYS_PWR_REG,  { 0x1, 0x1, 0x0 
} },
+   { EXYNOS7_LOGIC_RESET_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_OSCCLK_GATE_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_SLEEP_RESET_MIF_SYS_PWR_REG,  { 0x1, 0x1, 0x0

[PATCH v5 0/6] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-29 Thread Amit Daniel Kachhap
This patch series [1 - 6] performs,

1) Moves pmu driver to driver/soc/samsung folder. This is needed as exynos7 is
   an arm64 based platform and hence PMU driver should be in driver folder.
   Some discussion happened about this in the v1 version. Finally adding it in
   driver/soc folder as it too SoC specific and not a general driver.
   Entire discussion can be found here (A).
2) Add exynos7 PMU support.
3) Enables the driver for 32bit arm exynos platforms.

TODO: There is some suggestion to split the PMU data for 32 bit and 64 bit
Exynos SOC. This can be implemented as a separate optimization patches.
Submitting this version without much change from previous version as the merge
window is near.

Change from V4:
* Added a new configuration structure for u32 values in patch 4.
* Rebased on Kukjin for-next tree.

Changes from V3:
* Fixed Kconfig as per Russell feedback
* Rebased the series against Pankaj SoC restart consolidation patches (D) as per
  Kukjin request.
* Link to V3 can be found here (C)

Changes from V2:
* Added review comment changes suggested by Pankaj.
* Removed mfd client support in this patch series. This will be added later in
  the power domain patch series.
* Link to V2 can be found here (B)

Changes from V1:
* Move pmu driver in driver/soc/samsung folder
* Removed the power domain features. They will posted as a separate series.
* Added exynos7 PMU support.
* Link to v1 can be found here (A)

This complete patch series is rebased on Kukjin for-next tree.

(A) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
(B) - http://www.spinics.net/lists/arm-kernel/msg375910.html
(C) - http://www.spinics.net/lists/linux-samsung-soc/msg39237.html 
(D) - http://www.spinics.net/lists/linux-samsung-soc/msg39095.html

Amit Daniel Kachhap (6):
  ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
  ARM: EXYNOS: Move pmu specific headers under linux/soc/samsung
  drivers: soc: Add support for Exynos PMU driver
  driver: soc: exynos-pmu: Add an API to be called after wakeup
  driver: soc: exynos-pmu: Add a new structure to allow u32 conf data
  drivers: soc: exynos-pmu: Add support for Exynos7
  arm: exynos: Select SOC_SAMSUNG config option

 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/Makefile  |2 +-
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 +-
 arch/arm/mach-exynos/suspend.c |4 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 +
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  451 +++-
 .../linux/soc/samsung}/exynos-pmu.h|1 +
 .../linux/soc/samsung/exynos-regs-pmu.h|  273 
 14 files changed, 750 insertions(+), 15 deletions(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (68%)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (89%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (68%)

-- 
1.7.9.5

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[PATCH v5 6/6] arm: exynos: Select SOC_SAMSUNG config option

2014-11-29 Thread Amit Daniel Kachhap
The config option SOC_SAMSUNG is needed to enable all soc samsung
drivers inside driver/soc/samsung folder. Currently, this will be useful to
enable exynos pmu driver which is moved to that folder.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b9e3f1c..17880b6 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -25,6 +25,7 @@ menuconfig ARCH_EXYNOS
select S5P_DEV_MFC
select SRAM
select MFD_SYSCON
+   select SOC_SAMSUNG
help
  Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
 
-- 
1.7.9.5

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[PATCH v5 3/6] driver: soc: exynos-pmu: Add an API to be called after wakeup

2014-11-29 Thread Amit Daniel Kachhap
This patch adds an API exynos_sys_powerup_conf to be called after system sleep
wakeup. This will useful for exynos7 SoC to perform resume related
initialisations. This is similar to currently existing API
exynos_sys_powerdown_conf.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c   |9 +
 include/linux/soc/samsung/exynos-pmu.h |1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 7eb5b0b..c3307eb 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -33,6 +33,7 @@ struct exynos_pmu_data {
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
void (*powerdown_conf_extra)(enum sys_powerdown);
+   void (*powerup_conf)(enum sys_powerdown);
 };
 
 struct exynos_pmu_context {
@@ -768,6 +769,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
}
 }
 
+void exynos_sys_powerup_conf(enum sys_powerdown mode)
+{
+   const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
+
+   if (pmu_data-powerup_conf)
+   pmu_data-powerup_conf(mode);
+}
+
 static void exynos3250_pmu_init(void)
 {
unsigned int value;
diff --git a/include/linux/soc/samsung/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
index a2ab0d5..b497712 100644
--- a/include/linux/soc/samsung/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -20,5 +20,6 @@ enum sys_powerdown {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_sys_powerup_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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Re: [PATCH RFC v2 07/12] PM / Domains: export pm_genpd_lookup_name

2014-11-28 Thread amit daniel kachhap
On Thu, Nov 27, 2014 at 7:50 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 25 November 2014 at 09:48, amit daniel kachhap
 amit.dan...@samsung.com wrote:
 On Tue, Nov 25, 2014 at 1:05 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 24 November 2014 at 14:04, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This API may be needed to set the power domain parent/child relationship
 in the power domain platform driver. The parent relationship is
 generally set after the child power domain is registered with the power
 domain subsystem. In this case, pm_genpd_lookup_name API might be
 useful.

 I think this is a step in the wrong direction. Instead we should be
 working on removing the name based APIs from genpd.

 The proper way should be to pass the PM domain as a parameter to the
 APIs instead.
 Yes i understand but i had a special requirement for using this API
 during pd probe.
  I cannot use hierarchy to represent parent/child pd nodes as it will
 break the existing SoC's. In my case all the PD nodes are linear. The
 parent/child relationship are established in the second pass after all
 the PD entries are registered with the help of this API.
 Although there a way that i can always keep parent PD's before the
 child PD's in DT in linear order. Will check this approach.

 I had some thinking around this, could the below approach work?

 I just posted a patch[1] adding a new pm_genpd_lookup() API, which is
 using a DT device node to fetch the genpd. The idea is to use that
 API to get the genpd handle which is needed to configure a subdomain
 through pm_genpd_add_subdomain() API.
I looked at your patch. I seems fine. i will test them and post the
new version of my series.

Regards,
Amit D

 In principle you will have to walk through the DT a couple of times,
 initialize those domains (and subdomains) which either don't have a
 parent domain or which parent domain already has been initialized. I
 guess you need a somewhat clever loop to do that, but I think it's
 doable.

 Obviously we also need to have a generic binding for a parent
 domain. I like Geert's proposal from the other patch, which means
 using power-domains = pd_xyz.

 Kind regards
 Uffe

 [1]
 http://marc.info/?l=linux-pmm=141709766008458w=2
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Re: [PATCH v4 0/5] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-25 Thread amit daniel kachhap
On Mon, Nov 24, 2014 at 6:50 PM, Bartlomiej Zolnierkiewicz
b.zolnier...@samsung.com wrote:

 Hi,

 On Monday, November 24, 2014 07:36:10 AM Amit Daniel Kachhap wrote:
 This patch series [1 - 5] performs,

 1) Moves pmu driver to driver/soc/samsung folder. This is needed as exynos7 
 is
an arm64 based platform and hence PMU driver should be in driver folder.
Some discussion happened about this in the v1 version. Finally adding it 
 in
driver/soc folder as it too SoC specific and not a general driver.
Entire discussion can be found here (A).
 2) Add exynos7 PMU support.

 Some months ago (when the work on moving PMU driver out of mach-exynos
 started) I asked how much code would be shared between arm32 and arm64
 SoCs.  Now it seems that the code in question is minimal so I still
 wonder whether it is really worth to have a common driver (please note
 that in case of arm32 kernel all arm64 PMU code is just a dead code,
 similarly for arm64 kernel and arm32 PMU code).  Would it be possible
 to do the analysis of the additional source code needed vs saved code
 in the resulting binary for the case of having separate drivers?
yes your suggestion is good. It may done by keeping the data pmu_config[]
arrays in .h file under CONFIG_ARM(or CONFIG_ARM64) and NULL for non required
platforms. Keep them in 2 separate files may be confusing.


 Could you also please take a look into fixing patch #4 to be compatible
 with http://lkml.iu.edu/hypermail/linux/kernel/1407.1/00298.html ?
This patch makes sense. Thanks for pointing out.
 (It seems that just adding separate struct exynos_pmu_conf_extra for
 -pmu_config_extra shold be okay.)
Yes right struct exynos_pmu_conf_extra should work for exynos7.

I think both of the above optimizations may go as a separate patch.

Regards,
Amit D

 Best regards,
 --
 Bartlomiej Zolnierkiewicz
 Samsung RD Institute Poland
 Samsung Electronics

 3) Enables the driver for 32bit arm exynos platforms.

 Changes from V3:
 * Fixed Kconfig as per Russell feedback
 * Rebased the series against Pankaj SoC restart consolidation patches (D) as 
 per
   Kukjin request.
 * Link to V3 can be found here (C)

 Changes from V2:
 * Added review comment changes suggested by Pankaj.
 * Removed mfd client support in this patch series. This will be added later 
 in
   the power domain patch series.
 * Link to V2 can be found here (B)

 Changes from V1:
 * Move pmu driver in driver/soc/samsung folder
 * Removed the power domain features. They will posted as a separate series.
 * Added exynos7 PMU support.
 * Link to v1 can be found here (A)

 This complete patch series is rebased on Kukjin for-next tree.

 (A) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
 (B) - http://www.spinics.net/lists/arm-kernel/msg375910.html
 (C) - http://www.spinics.net/lists/linux-samsung-soc/msg39237.html
 (D) - http://www.spinics.net/lists/linux-samsung-soc/msg39095.html

 Amit Daniel Kachhap (5):
   ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
   drivers: soc: Add support for Exynos PMU driver
   driver: soc: exynos-pmu: Add an API to be called after wakeup
   drivers: soc: exynos-pmu: Add support for Exynos7
   arm: exynos: Select SOC_SAMSUNG config option

  .../devicetree/bindings/arm/samsung/pmu.txt|1 +
  arch/arm/mach-exynos/Kconfig   |1 +
  arch/arm/mach-exynos/Makefile  |2 +-
  arch/arm/mach-exynos/exynos.c  |2 +-
  arch/arm/mach-exynos/mcpm-exynos.c |2 +-
  arch/arm/mach-exynos/platsmp.c |2 +-
  arch/arm/mach-exynos/pm.c  |4 +-
  arch/arm/mach-exynos/suspend.c |4 +-
  drivers/soc/Kconfig|1 +
  drivers/soc/Makefile   |1 +
  drivers/soc/samsung/Kconfig|   20 +
  drivers/soc/samsung/Makefile   |1 +
  .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  442 
 +++-
  .../linux/soc/samsung}/exynos-pmu.h|1 +
  .../linux/soc/samsung/exynos-regs-pmu.h|  273 
  15 files changed, 744 insertions(+), 13 deletions(-)
  create mode 100644 drivers/soc/samsung/Kconfig
  create mode 100644 drivers/soc/samsung/Makefile
  rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (64%)
  rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h 
 (89%)
  rename arch/arm/mach-exynos/regs-pmu.h = 
 include/linux/soc/samsung/exynos-regs-pmu.h (63%)

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Re: [PATCH RFC v2 06/12] driver: soc: exynos-pmu: Add exynos7 power domain on/off ops

2014-11-25 Thread amit daniel kachhap
On Tue, Nov 25, 2014 at 1:00 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 24 November 2014 at 14:04, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This patch uses the restructuring done in PD handlers and adds PD
 on/off/status handlers for exynos7. In this SoC, some extra settings
 need to be done prior to turning on/off power domains. Some of those
 settings are also different from different power domains so is uses
 the power domain compatible name feature to distinguish between power
 domains.

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/soc/samsung/exynos-pmu.c|  105 
 +++
  include/linux/soc/samsung/exynos-regs-pmu.h |   17 +
  2 files changed, 122 insertions(+)

 diff --git a/drivers/soc/samsung/exynos-pmu.c 
 b/drivers/soc/samsung/exynos-pmu.c
 index e690f65..b9631d5 100644
 --- a/drivers/soc/samsung/exynos-pmu.c
 +++ b/drivers/soc/samsung/exynos-pmu.c
 @@ -1202,6 +1202,104 @@ static void exynos7_pmu_init(void)
 }
  }

 +static int exynos7_pd_extraconf_base(const char *pd_name)
 +{
 +   if (!pd_name)
 +   return -EINVAL;
 +
 +   if (!strcmp(samsung,exynos7-pd-mfc, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_MFC_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-hevc, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_HEVC_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-mscl, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_MSCL_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-g2d, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_G2D_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-fsys0, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_FSYS0_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-fsys1, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_FSYS1_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-aud, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_AUD_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-disp, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_DISP_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-vpp, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-vpp, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-isp0, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_ISP0_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-isp1, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_ISP1_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-cam0, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_CAM0_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-cam1, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;
 +   else if (!strcmp(samsung,exynos7-pd-g3d, pd_name))
 +   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;

 I think we should move away from using strings to find a matching PM
 domain. Instead we should use a enum/define pointing to the PM domain
 in an array of PM domains, or similar.
Thanks for looking into the series.
Here pd names are compatible string from the pd DT nodes. I think
compatible names are
used in many places like searching for platform data in DT based probe etc.
yes enum can also be used to locate the PM domain. Will check.

 The UX500 SOC initial support for PM domains is queued for 3.19 and is
 currently available in linux-next. You may want to get some
 inspiration from that approach.
ok will check them.

 +
 +   pr_err(%s: Unsupported power domain\n, pd_name);
 +   return 0;
 +}
 +
 +static int exynos7_pd_powerdown(const char *pd_name, void __iomem *pd_addr)
 +{

 Considering the suggestion above and to move away from using strings
 like this; this function could take a pointer to the PM domain instead
 of a string and the __iomem, right!?
Actually in our case there are 2 files, pm-domain.c and exynos-pmu.c.
I thought of abstracting out generic PD related stuffs from
exynos-pmu.c file so this function
takes these type of arguments.

 +   int off_base = exynos7_pd_extraconf_base(pd_name);
 +
 +   if (!off_base)
 +   return -EINVAL;
 +
 +   /* Initialise the pd extraconf registers */
 +   pmu_raw_writel(0, off_base + EXYNOS7_CLKRUN_CMU_PD_SYS_PWR_REG);
 +   pmu_raw_writel(0, off_base + EXYNOS7_CLKSTOP_CMU_PD_SYS_PWR_REG);
 +   pmu_raw_writel(0, off_base + EXYNOS7_DISABLE_PLL_CMU_PD_SYS_PWR_REG);
 +   pmu_raw_writel(0, off_base + EXYNOS7_RESET_LOGIC_PD_SYS_PWR_REG);
 +   pmu_raw_writel(0, off_base + EXYNOS7_MEMORY_PD_SYS_PWR_REG);
 +   pmu_raw_writel(0, off_base + EXYNOS7_RESET_CMU_PD_SYS_PWR_REG);
 +
 +   if (!strcmp(samsung,exynos7-pd-fsys0, pd_name) ||
 +   !strcmp(samsung,exynos7-pd-fsys1, pd_name))
 +   pmu_raw_writel(1,
 +   off_base

Re: [PATCH RFC v2 07/12] PM / Domains: export pm_genpd_lookup_name

2014-11-25 Thread amit daniel kachhap
On Tue, Nov 25, 2014 at 1:05 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 24 November 2014 at 14:04, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This API may be needed to set the power domain parent/child relationship
 in the power domain platform driver. The parent relationship is
 generally set after the child power domain is registered with the power
 domain subsystem. In this case, pm_genpd_lookup_name API might be
 useful.

 I think this is a step in the wrong direction. Instead we should be
 working on removing the name based APIs from genpd.

 The proper way should be to pass the PM domain as a parameter to the
 APIs instead.
Yes i understand but i had a special requirement for using this API
during pd probe.
 I cannot use hierarchy to represent parent/child pd nodes as it will
break the existing SoC's. In my case all the PD nodes are linear. The
parent/child relationship are established in the second pass after all
the PD entries are registered with the help of this API.
Although there a way that i can always keep parent PD's before the
child PD's in DT in linear order. Will check this approach.

Regards,
Amit

 Kind regards
 Uffe


 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/base/power/domain.c |3 ++-
  include/linux/pm_domain.h   |7 +++
  2 files changed, 9 insertions(+), 1 deletion(-)

 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
 index fb83d4a..b0e1c2f 100644
 --- a/drivers/base/power/domain.c
 +++ b/drivers/base/power/domain.c
 @@ -49,7 +49,7 @@
  static LIST_HEAD(gpd_list);
  static DEFINE_MUTEX(gpd_list_lock);

 -static struct generic_pm_domain *pm_genpd_lookup_name(const char 
 *domain_name)
 +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
  {
 struct generic_pm_domain *genpd = NULL, *gpd;

 @@ -66,6 +66,7 @@ static struct generic_pm_domain 
 *pm_genpd_lookup_name(const char *domain_name)
 mutex_unlock(gpd_list_lock);
 return genpd;
  }
 +EXPORT_SYMBOL_GPL(pm_genpd_lookup_name);

  struct generic_pm_domain *dev_to_genpd(struct device *dev)
  {
 diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
 index 2e0e06d..aedcec3 100644
 --- a/include/linux/pm_domain.h
 +++ b/include/linux/pm_domain.h
 @@ -150,6 +150,8 @@ extern int pm_genpd_name_poweron(const char 
 *domain_name);

  extern struct dev_power_governor simple_qos_governor;
  extern struct dev_power_governor pm_domain_always_on_gov;
 +
 +extern struct generic_pm_domain *pm_genpd_lookup_name(const char 
 *domain_name);
  #else

  static inline struct generic_pm_domain_data *dev_gpd_data(struct device 
 *dev)
 @@ -221,6 +223,11 @@ static inline int pm_genpd_name_poweron(const char 
 *domain_name)
  {
 return -ENOSYS;
  }
 +static inline
 +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
 +{
 +   return NULL;
 +}
  #define simple_qos_governor NULL
  #define pm_domain_always_on_gov NULL
  #endif
 --
 1.7.9.5

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Re: [PATCH RFC v2 08/12] soc: samsung: pm_domain: Add support for parent power domain

2014-11-25 Thread amit daniel kachhap
On Tue, Nov 25, 2014 at 1:29 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 24 November 2014 at 14:04, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This patch adds supports for parent power domain. This will ensure
 invoking of parent/child power domain on/off in a correct sequence.
 In exynos7 SOC's, power domain controllers have parent and child
 hierarchy.

 Cc: Kukjin Kim kgene@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  .../bindings/arm/exynos/power_domain.txt   |2 +
  drivers/soc/samsung/pm_domains.c   |   43 
 +++-
  2 files changed, 44 insertions(+), 1 deletion(-)

 diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
 b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 index 00ebda1..0160bdc 100644
 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 @@ -24,6 +24,7 @@ Optional Properties:
 - pclkN, clkN: Pairs of parent of input clock and input clock to the
 devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
 are supported currently.
 +- parents: phandle of parent power domains.

  Node of a device using power domains must have a samsung,power-domain 
 property
  defined with a phandle to respective power domain.
 @@ -48,6 +49,7 @@ Example:
 mfc_pd: power-domain@10044060 {
 compatible = samsung,exynos4210-pd, 
 samsung,exynos7-pd-mfc;
 reg = 0x10044060 0x20;
 +   parents = pd_top;
 #power-domain-cells = 0;
 };

 This seems like a good and generic approach to describe that a PM
 domain could have a parent. I would suggest to rename it, such it
 reflects its a PM domain binding though.
I am not sure if this is generic. I guess PD's represented like below
are more generic.
PD1 {
PD2 {
PD3 {
};
};
};


 So, maybe we can add this as a common DT binding for the generic PM
 domain instead of having it as Exynos specific?
Yes sure.

Regards,
Amit D

 Kind regards
 Uffe

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[PATCH RFC v2 00/12] soc: samsung: Modify and enhance power domain driver

2014-11-24 Thread Amit Daniel Kachhap
Posting this series as RFC to get more clarity as lot of power domain related
discussion is happening in mailing lists.

This patch series[1 - 12] performs several implementations as listed below,

1) Converts power domain driver to platform driver.
2) Registers this driver as MFD client driver.
3) Moves them into driver/soc/samsung folder.
4) Add parent power domain parsing code.
5) Updates the reparenting feature to make it more generic.
6) A feature to turn clocks on during pm domain off/on. There can be
   different set of clocks to be turned on. The patches in Rafael's tree allows
   a single list only.
7) Code added to preserve the clocks rates during power domain on/off
   sequence.
8) Restructured the exynos PD on/off handlers and added exynos7 support.

The power domain DT node may look something like,

mfc_pd: power-domain@10044060 {
compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
reg = 0x10044060 0x20;
pd-parent-clock-names = tclk0, pclk0, clk0;
pd-parent-clocks = clock CLK_FIN_PLL, clock CLK_MOUT_SW_ACLK333,
clock CLK_MOUT_USER_ACLK333;
pd-on-en-clock-names = clk0, clk1;
pd-on-en-clocks = clock CLK_IP1, clock CLK_IP2,
pd-off-en-clock-names = clk0, clk1, clk3;
pd-off-en-clocks = clock CLK_IP1, clock CLK_IP2, clock CLK_IP3;
pd-rate-clock-names = clk0, clk1;
pd-rate-clocks = clock CLK_IP1, clock CLK_IP2,
parents = pd_top;
#power-domain-cells = 0;
};

Changes from v1:
* Removed PM domain notifier features.
* Removed clock save/restore through those notifiers.
* link for v1 is http://www.spinics.net/lists/linux-samsung-soc/msg38442.html.

This patch series depends on exynos pmu patches posted earlier.
http://lkml.org/lkml/2014/11/23/221

Amit Daniel Kachhap (12):
  arm: exynos: Add platform driver support for power domain driver
  soc: exynos: Move exynos power domain file to driver/soc/samsung
folder
  soc: samsung: exynos-pmu: Register exynos pd driver as a mfd client
  soc: samsung: Re-structure PMU driver to create pd on/off handlers
  soc: samsung: pm_domain: Use unique compatible name for power domain
  driver: soc: exynos-pmu: Add exynos7 power domain on/off ops
  PM / Domains: export pm_genpd_lookup_name
  soc: samsung: pm_domain: Add support for parent power domain
  drivers: soc: pm_domain: Modify the parent clocks bindings
  drivers: soc: samsung: Add support for clock enabling in power domain
  drivers: soc: samsung: Add support for clock rate save/restore in
power domain
  arm64: Kconfig: Enable PM_GENERIC_DOMAINS for exynos7

 .../bindings/arm/exynos/power_domain.txt   |   45 +-
 arch/arm/mach-exynos/Makefile  |1 -
 arch/arm/mach-exynos/pm_domains.c  |  166 ---
 arch/arm64/Kconfig |1 +
 drivers/base/power/domain.c|3 +-
 drivers/soc/samsung/Kconfig|9 +
 drivers/soc/samsung/Makefile   |3 +-
 drivers/soc/samsung/exynos-pmu.c   |  185 +++
 drivers/soc/samsung/pm_domains.c   |  510 
 include/linux/pm_domain.h  |7 +
 include/linux/soc/samsung/exynos-pmu.h |   15 +
 include/linux/soc/samsung/exynos-regs-pmu.h|   26 +
 12 files changed, 794 insertions(+), 177 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/pm_domains.c
 create mode 100644 drivers/soc/samsung/pm_domains.c

-- 
1.7.9.5

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[PATCH RFC v2 01/12] arm: exynos: Add platform driver support for power domain driver

2014-11-24 Thread Amit Daniel Kachhap
This patch modifies Exynos Power Domain driver initialization
implementation in following way:

   - Added platform driver support and probe function where Exynos PM
 Domain driver will finally register itself as MFD PMU client driver.
 In this way,all the Exynos power domains are probed once and registered
 with the power domain subsystem.
   - Existing DT bindings are used.

Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/pm_domains.c |   40 +++--
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index 20f2671..5cb5440 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -105,25 +105,17 @@ static int exynos_pd_power_off(struct generic_pm_domain 
*domain)
return exynos_pd_power(domain, false);
 }
 
-static __init int exynos4_pm_init_power_domain(void)
+static int exynos_power_domain_probe(struct platform_device *pdev)
 {
-   struct platform_device *pdev;
struct device_node *np;
 
for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
struct exynos_pm_domain *pd;
int on, i;
-   struct device *dev;
 
-   pdev = of_find_device_by_node(np);
-   dev = pdev-dev;
-
-   pd = kzalloc(sizeof(*pd), GFP_KERNEL);
-   if (!pd) {
-   pr_err(%s: failed to allocate memory for domain\n,
-   __func__);
+   pd = devm_kzalloc(pdev-dev, sizeof(*pd), GFP_KERNEL);
+   if (!pd)
return -ENOMEM;
-   }
 
pd-pd.name = kstrdup(np-name, GFP_KERNEL);
pd-name = pd-pd.name;
@@ -131,7 +123,7 @@ static __init int exynos4_pm_init_power_domain(void)
pd-pd.power_off = exynos_pd_power_off;
pd-pd.power_on = exynos_pd_power_on;
 
-   pd-oscclk = clk_get(dev, oscclk);
+   pd-oscclk = of_clk_get_by_name(np, oscclk);
if (IS_ERR(pd-oscclk))
goto no_clk;
 
@@ -139,11 +131,11 @@ static __init int exynos4_pm_init_power_domain(void)
char clk_name[8];
 
snprintf(clk_name, sizeof(clk_name), clk%d, i);
-   pd-clk[i] = clk_get(dev, clk_name);
+   pd-clk[i] = of_clk_get_by_name(np, clk_name);
if (IS_ERR(pd-clk[i]))
break;
snprintf(clk_name, sizeof(clk_name), pclk%d, i);
-   pd-pclk[i] = clk_get(dev, clk_name);
+   pd-pclk[i] = of_clk_get_by_name(np, clk_name);
if (IS_ERR(pd-pclk[i])) {
clk_put(pd-clk[i]);
pd-clk[i] = ERR_PTR(-EINVAL);
@@ -163,4 +155,22 @@ no_clk:
 
return 0;
 }
-arch_initcall(exynos4_pm_init_power_domain);
+
+static const struct platform_device_id exynos_power_domain_id[] = {
+   { exynos-pmu-pd},
+   { },
+};
+
+static struct platform_driver exynos_power_domain_driver = {
+   .driver  = {
+   .name   = exynos-pd,
+   },
+   .probe = exynos_power_domain_probe,
+   .id_table = exynos_power_domain_id,
+};
+
+static int __init exynos_power_domain_init(void)
+{
+   return platform_driver_register(exynos_power_domain_driver);
+}
+postcore_initcall(exynos_power_domain_init);
-- 
1.7.9.5

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[PATCH RFC v2 02/12] soc: exynos: Move exynos power domain file to driver/soc/samsung folder

2014-11-24 Thread Amit Daniel Kachhap
This patch moves arch/arm/mach-exynos/pm_domains.c to driver/soc/samsung
folder. In this way it can be used for both arm and arm64 platforms.
This file is moved in this directory as this driver is soc specific and
only used by exynos platforms.

Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |1 -
 drivers/soc/samsung/Kconfig|9 +
 drivers/soc/samsung/Makefile   |3 ++-
 .../soc/samsung}/pm_domains.c  |0
 4 files changed, 11 insertions(+), 2 deletions(-)
 rename {arch/arm/mach-exynos = drivers/soc/samsung}/pm_domains.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index b91b382..9ea6c54 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o 
firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
-obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
 
 obj-$(CONFIG_SMP)  += platsmp.o headsmp.o
 
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
index 6855cc4..2bb33e7 100644
--- a/drivers/soc/samsung/Kconfig
+++ b/drivers/soc/samsung/Kconfig
@@ -17,4 +17,13 @@ config EXYNOS_PMU
  functionality like initialisation and transition to various low power
  states.
 
+config EXYNOS_POWER_DOMAIN
+   tristate Support Exynos PM Power Domain
+   depends on ARCH_EXYNOS  PM_GENERIC_DOMAINS
+   default y
+   help
+ Exynos SOC have power domain gating support. This driver implements
+ that functionality and registers all the necessary hooks to the
+ generic power domain core kernel infrastructure.
+
 endmenu
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
index 5a879c6..61ccd51 100644
--- a/drivers/soc/samsung/Makefile
+++ b/drivers/soc/samsung/Makefile
@@ -1 +1,2 @@
-obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o
+obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o
+obj-$(CONFIG_EXYNOS_POWER_DOMAIN)  += pm_domains.o
diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/drivers/soc/samsung/pm_domains.c
similarity index 100%
rename from arch/arm/mach-exynos/pm_domains.c
rename to drivers/soc/samsung/pm_domains.c
-- 
1.7.9.5

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[PATCH RFC v2 03/12] soc: samsung: exynos-pmu: Register exynos pd driver as a mfd client

2014-11-24 Thread Amit Daniel Kachhap
This is used to probe exynos power domain. This method can be also used
for probing other PMU client drivers like pm sleep etc. Currently no
platform data is supplied but can be easily extended when required.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c |   18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index cb9e356..da77c7e 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -10,6 +10,7 @@
  */
 
 #include linux/io.h
+#include linux/mfd/core.h
 #include linux/of.h
 #include linux/of_address.h
 #include linux/platform_device.h
@@ -21,6 +22,10 @@
 
 #define PMU_TABLE_END  (-1U)
 
+enum pmu_mfd_list {
+   MFD_PD,
+   MFD_MAX,
+};
 struct exynos_pmu_conf {
unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
@@ -38,6 +43,7 @@ struct exynos_pmu_data {
 struct exynos_pmu_context {
struct device *dev;
const struct exynos_pmu_data *pmu_data;
+   struct mfd_cell cells[MFD_MAX];
 };
 
 static void __iomem *pmu_base_addr;
@@ -1220,6 +1226,7 @@ static int exynos_pmu_probe(struct platform_device *pdev)
const struct of_device_id *match;
struct device *dev = pdev-dev;
struct resource *res;
+   struct mfd_cell *cell;
int ret;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -1249,6 +1256,17 @@ static int exynos_pmu_probe(struct platform_device *pdev)
if (ret)
dev_warn(dev, can't register restart handler err=%d\n, ret);
 
+   /* Initialize and invoke mfd clients */
+   cell = pmu_context-cells[MFD_PD];
+   cell-name = exynos-pmu-pd;
+
+   ret = mfd_add_devices(pdev-dev, pdev-id, pmu_context-cells, MFD_MAX,
+   NULL, 0, NULL);
+   if (ret) {
+   dev_err(pdev-dev, fail to register client devices\n);
+   return ret;
+   }
+
dev_dbg(dev, Exynos PMU Driver probe done\n);
return 0;
 }
-- 
1.7.9.5

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[PATCH RFC v2 04/12] soc: samsung: Re-structure PMU driver to create pd on/off handlers

2014-11-24 Thread Amit Daniel Kachhap
This patch moves PD domain on/off implementation inside the PMU driver.
The handlers will be supplied via the MFD platform data. Power domains
are basically sparse memories in the Exynos PMU controllers, so with
this restructuring all the register access operations reside inside pmu
file.
This restructuring will be useful for SoC's where certain extra
operation need to implemented along with PD on/off operation or if
some PD registers are different. There is no functionality change for the
existing SoC's.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c|   62 +++
 drivers/soc/samsung/pm_domains.c|   50 -
 include/linux/soc/samsung/exynos-pmu.h  |   15 +++
 include/linux/soc/samsung/exynos-regs-pmu.h |9 
 4 files changed, 115 insertions(+), 21 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index da77c7e..e690f65 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -34,6 +34,7 @@ struct exynos_pmu_conf {
 struct exynos_pmu_data {
const struct exynos_pmu_conf *pmu_config;
const struct exynos_pmu_conf *pmu_config_extra;
+   struct exynos_pmu_pd_ops *pd_ops;
 
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
@@ -44,6 +45,7 @@ struct exynos_pmu_context {
struct device *dev;
const struct exynos_pmu_data *pmu_data;
struct mfd_cell cells[MFD_MAX];
+   struct pmu_dev_client_data mfd_data[MFD_MAX];
 };
 
 static void __iomem *pmu_base_addr;
@@ -880,6 +882,52 @@ void exynos_sys_powerup_conf(enum sys_powerdown mode)
pmu_data-powerup_conf(mode);
 }
 
+static int __exynos_pd_poweron_off(bool power_on, const char *pd_name,
+   void __iomem *pd_addr, int conf_val)
+{
+   unsigned int timeout, pwr;
+   char *op;
+
+   /* Wait max 1ms */
+   timeout = 10;
+   pwr = power_on ? conf_val : 0;
+
+   writel_relaxed(pwr, pd_addr + EXYNOS_PD_CONFIG);
+
+   while ((readl_relaxed(pd_addr + EXYNOS_PD_STATUS)  conf_val) != pwr) {
+   if (!timeout) {
+   op = (power_on) ? enable : disable;
+   pr_err(Power domain %s %s failed\n, pd_name, op);
+   return -ETIMEDOUT;
+   }
+   timeout--;
+   cpu_relax();
+   usleep_range(80, 100);
+   }
+   return 0;
+}
+
+static int exynos_pd_poweron(const char *pd_name, void __iomem *pd_addr)
+{
+   return __exynos_pd_poweron_off(true, pd_name, pd_addr,
+   EXYNOS_INT_LOCAL_PWR_EN);
+}
+
+static int exynos_pd_poweroff(const char *pd_name, void __iomem *pd_addr)
+{
+   return __exynos_pd_poweron_off(false, pd_name, pd_addr,
+   EXYNOS_INT_LOCAL_PWR_EN);
+}
+
+static bool exynos_pd_status(void __iomem *pd_addr)
+{
+   unsigned int val;
+
+   val = readl_relaxed(pd_addr + EXYNOS_PD_STATUS) 
+   EXYNOS_INT_LOCAL_PWR_EN;
+   return  val ? true : false;
+}
+
 static void exynos5250_pmu_init(void)
 {
unsigned int value;
@@ -1154,29 +1202,40 @@ static void exynos7_pmu_init(void)
}
 }
 
+static struct exynos_pmu_pd_ops exynos_pd_ops = {
+   .pd_on  = exynos_pd_poweron,
+   .pd_off = exynos_pd_poweroff,
+   .pd_status  = exynos_pd_status,
+};
+
 static const struct exynos_pmu_data exynos4210_pmu_data = {
.pmu_config = exynos4210_pmu_config,
+   .pd_ops = exynos_pd_ops,
 };
 
 static const struct exynos_pmu_data exynos4212_pmu_data = {
.pmu_config = exynos4x12_pmu_config,
+   .pd_ops = exynos_pd_ops,
 };
 
 static const struct exynos_pmu_data exynos4412_pmu_data = {
.pmu_config = exynos4x12_pmu_config,
.pmu_config_extra   = exynos4412_pmu_config,
+   .pd_ops = exynos_pd_ops,
 };
 
 static const struct exynos_pmu_data exynos5250_pmu_data = {
.pmu_config = exynos5250_pmu_config,
.pmu_init   = exynos5250_pmu_init,
.powerdown_conf = exynos5_powerdown_conf,
+   .pd_ops = exynos_pd_ops,
 };
 
 static struct exynos_pmu_data exynos5420_pmu_data = {
.pmu_config = exynos5420_pmu_config,
.pmu_init   = exynos5420_pmu_init,
.powerdown_conf = exynos5420_powerdown_conf,
+   .pd_ops = exynos_pd_ops,
 };
 
 static const struct exynos_pmu_data exynos7_pmu_data = {
@@ -1259,6 +1318,9 @@ static int exynos_pmu_probe(struct platform_device *pdev)
/* Initialize and invoke mfd clients */
cell = pmu_context-cells[MFD_PD];
cell-name = exynos-pmu-pd;
+   pmu_context-mfd_data[MFD_PD].ops = pmu_context-pmu_data-pd_ops;
+   cell-platform_data = pmu_context-mfd_data[MFD_PD];
+   cell

[PATCH RFC v2 05/12] soc: samsung: pm_domain: Use unique compatible name for power domain

2014-11-24 Thread Amit Daniel Kachhap
This patch adds support for second optional compatible complate name. If
this compatible name is present then this name will be used to create
the Power Domain and not the DT node name. This will be useful to carry
out any power domain specific changes in the PD on/off handlers for new
SoCs.
This change will not affect the existing DT bindings.

Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |8 
 drivers/soc/samsung/pm_domains.c   |   10 +-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index abde1ea..00ebda1 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -12,6 +12,8 @@ Required Properties:
 must be 0.
 
 Optional Properties:
+- compatible: This is a second compatible name and gives the complete Power
+   Domain name like samsung,exynos7-pd-mfc.
 - clocks: List of clock handles. The parent clocks of the input clocks to the
devices in this power domain are set to oscclk before power gating
and restored back after powering on a domain. This is required for
@@ -43,5 +45,11 @@ Example:
#power-domain-cells = 0;
};
 
+   mfc_pd: power-domain@10044060 {
+   compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
+   reg = 0x10044060 0x20;
+   #power-domain-cells = 0;
+   };
+
 See Documentation/devicetree/bindings/power/power_domain.txt for description
 of consumer-side bindings.
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 69bc8b1..f4f2a6c 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -120,12 +120,20 @@ static int exynos_power_domain_probe(struct 
platform_device *pdev)
struct exynos_pm_domain *pd;
int i;
bool on;
+   const char *name;
 
pd = devm_kzalloc(pdev-dev, sizeof(*pd), GFP_KERNEL);
if (!pd)
return -ENOMEM;
 
-   pd-pd.name = kstrdup(np-name, GFP_KERNEL);
+   /*
+* Check if second compatible name found then use as power
+* domain name or else use the DT node name as before.
+*/
+   if (of_property_read_string_index(np, compatible, 1, name))
+   name = np-name;
+
+   pd-pd.name = kstrdup(name, GFP_KERNEL);
pd-name = pd-pd.name;
pd-base = of_iomap(np, 0);
pd-pd.power_off = exynos_pd_power_off;
-- 
1.7.9.5

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[PATCH RFC v2 06/12] driver: soc: exynos-pmu: Add exynos7 power domain on/off ops

2014-11-24 Thread Amit Daniel Kachhap
This patch uses the restructuring done in PD handlers and adds PD
on/off/status handlers for exynos7. In this SoC, some extra settings
need to be done prior to turning on/off power domains. Some of those
settings are also different from different power domains so is uses
the power domain compatible name feature to distinguish between power
domains.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c|  105 +++
 include/linux/soc/samsung/exynos-regs-pmu.h |   17 +
 2 files changed, 122 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index e690f65..b9631d5 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -1202,6 +1202,104 @@ static void exynos7_pmu_init(void)
}
 }
 
+static int exynos7_pd_extraconf_base(const char *pd_name)
+{
+   if (!pd_name)
+   return -EINVAL;
+
+   if (!strcmp(samsung,exynos7-pd-mfc, pd_name))
+   return EXYNOS7_CLKRUN_CMU_MFC_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-hevc, pd_name))
+   return EXYNOS7_CLKRUN_CMU_HEVC_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-mscl, pd_name))
+   return EXYNOS7_CLKRUN_CMU_MSCL_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-g2d, pd_name))
+   return EXYNOS7_CLKRUN_CMU_G2D_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-fsys0, pd_name))
+   return EXYNOS7_CLKRUN_CMU_FSYS0_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-fsys1, pd_name))
+   return EXYNOS7_CLKRUN_CMU_FSYS1_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-aud, pd_name))
+   return EXYNOS7_CLKRUN_CMU_AUD_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-disp, pd_name))
+   return EXYNOS7_CLKRUN_CMU_DISP_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-vpp, pd_name))
+   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-vpp, pd_name))
+   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-isp0, pd_name))
+   return EXYNOS7_CLKRUN_CMU_ISP0_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-isp1, pd_name))
+   return EXYNOS7_CLKRUN_CMU_ISP1_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-cam0, pd_name))
+   return EXYNOS7_CLKRUN_CMU_CAM0_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-cam1, pd_name))
+   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;
+   else if (!strcmp(samsung,exynos7-pd-g3d, pd_name))
+   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;
+
+   pr_err(%s: Unsupported power domain\n, pd_name);
+   return 0;
+}
+
+static int exynos7_pd_powerdown(const char *pd_name, void __iomem *pd_addr)
+{
+   int off_base = exynos7_pd_extraconf_base(pd_name);
+
+   if (!off_base)
+   return -EINVAL;
+
+   /* Initialise the pd extraconf registers */
+   pmu_raw_writel(0, off_base + EXYNOS7_CLKRUN_CMU_PD_SYS_PWR_REG);
+   pmu_raw_writel(0, off_base + EXYNOS7_CLKSTOP_CMU_PD_SYS_PWR_REG);
+   pmu_raw_writel(0, off_base + EXYNOS7_DISABLE_PLL_CMU_PD_SYS_PWR_REG);
+   pmu_raw_writel(0, off_base + EXYNOS7_RESET_LOGIC_PD_SYS_PWR_REG);
+   pmu_raw_writel(0, off_base + EXYNOS7_MEMORY_PD_SYS_PWR_REG);
+   pmu_raw_writel(0, off_base + EXYNOS7_RESET_CMU_PD_SYS_PWR_REG);
+
+   if (!strcmp(samsung,exynos7-pd-fsys0, pd_name) ||
+   !strcmp(samsung,exynos7-pd-fsys1, pd_name))
+   pmu_raw_writel(1,
+   off_base + EXYNOS7_RESET_SLEEP_PD_SYS_PWR_REG);
+
+   if (!strcmp(samsung,exynos7-pd-aud, pd_name)) {
+   pmu_raw_writel(0, EXYNOS7_PAD_RETENTION_AUD_SYS_PWR_REG);
+   pmu_raw_writel(0, EXYNOS7_GPIO_MODE_AUD_SYS_PWR_REG);
+   }
+
+   writel_relaxed((EXYNOS7_USE_PROLONGED_LOGIC_RESET |
+   EXYNOS7_USE_SC_FEEDBACK), pd_addr + EXYNOS_PD_OPTION);
+
+   return 0;
+}
+
+static int exynos7_pd_poweron(const char *pd_name, void __iomem *pd_addr)
+{
+   if (exynos7_pd_powerdown(pd_name, pd_addr))
+   return -EINVAL;
+
+   return __exynos_pd_poweron_off(true, pd_name, pd_addr,
+   EXYNOS7_INT_LOCAL_PWR_EN);
+}
+
+static int exynos7_pd_poweroff(const char *pd_name, void __iomem *pd_addr)
+{
+   if (exynos7_pd_powerdown(pd_name, pd_addr))
+   return -EINVAL;
+
+   return __exynos_pd_poweron_off(false, pd_name, pd_addr,
+   EXYNOS7_INT_LOCAL_PWR_EN);
+}
+
+static bool exynos7_pd_status(void __iomem *pd_addr)
+{
+   unsigned int val;
+
+   val = readl_relaxed(pd_addr + EXYNOS_PD_STATUS) 
+   EXYNOS7_INT_LOCAL_PWR_EN;
+   return  val ? true : false;
+}
+
 static struct exynos_pmu_pd_ops

[PATCH RFC v2 07/12] PM / Domains: export pm_genpd_lookup_name

2014-11-24 Thread Amit Daniel Kachhap
This API may be needed to set the power domain parent/child relationship
in the power domain platform driver. The parent relationship is
generally set after the child power domain is registered with the power
domain subsystem. In this case, pm_genpd_lookup_name API might be
useful.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/base/power/domain.c |3 ++-
 include/linux/pm_domain.h   |7 +++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index fb83d4a..b0e1c2f 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -49,7 +49,7 @@
 static LIST_HEAD(gpd_list);
 static DEFINE_MUTEX(gpd_list_lock);
 
-static struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
+struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
 {
struct generic_pm_domain *genpd = NULL, *gpd;
 
@@ -66,6 +66,7 @@ static struct generic_pm_domain *pm_genpd_lookup_name(const 
char *domain_name)
mutex_unlock(gpd_list_lock);
return genpd;
 }
+EXPORT_SYMBOL_GPL(pm_genpd_lookup_name);
 
 struct generic_pm_domain *dev_to_genpd(struct device *dev)
 {
diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index 2e0e06d..aedcec3 100644
--- a/include/linux/pm_domain.h
+++ b/include/linux/pm_domain.h
@@ -150,6 +150,8 @@ extern int pm_genpd_name_poweron(const char *domain_name);
 
 extern struct dev_power_governor simple_qos_governor;
 extern struct dev_power_governor pm_domain_always_on_gov;
+
+extern struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name);
 #else
 
 static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev)
@@ -221,6 +223,11 @@ static inline int pm_genpd_name_poweron(const char 
*domain_name)
 {
return -ENOSYS;
 }
+static inline
+struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
+{
+   return NULL;
+}
 #define simple_qos_governor NULL
 #define pm_domain_always_on_gov NULL
 #endif
-- 
1.7.9.5

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[PATCH RFC v2 08/12] soc: samsung: pm_domain: Add support for parent power domain

2014-11-24 Thread Amit Daniel Kachhap
This patch adds supports for parent power domain. This will ensure
invoking of parent/child power domain on/off in a correct sequence.
In exynos7 SOC's, power domain controllers have parent and child
hierarchy.

Cc: Kukjin Kim kgene@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |2 +
 drivers/soc/samsung/pm_domains.c   |   43 +++-
 2 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 00ebda1..0160bdc 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -24,6 +24,7 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+- parents: phandle of parent power domains.
 
 Node of a device using power domains must have a samsung,power-domain property
 defined with a phandle to respective power domain.
@@ -48,6 +49,7 @@ Example:
mfc_pd: power-domain@10044060 {
compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
reg = 0x10044060 0x20;
+   parents = pd_top;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index f4f2a6c..89e2fd5 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -25,10 +25,10 @@
 #include linux/soc/samsung/exynos-pmu.h
 
 #define MAX_CLK_PER_DOMAIN 4
+#define MAX_PARENT_POWER_DOMAIN10
 
 static struct exynos_pmu_pd_ops *pd_ops;
 
-
 /*
  * Exynos specific wrapper around the generic power domain
  */
@@ -169,6 +169,47 @@ no_clk:
of_genpd_add_provider_simple(np, pd-pd);
}
 
+   /* Assign the child power domains to their parents */
+   for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
+   struct device_node *parent_np;
+   int i;
+   struct generic_pm_domain *child_domain, *parent_domain;
+   const char *name;
+
+   if (of_property_read_string_index(np, compatible, 1,
+   name)) {
+   /* Second entry not found, use the node name*/
+   name = np-name;
+   }
+
+   child_domain = pm_genpd_lookup_name(name);
+   if (!child_domain)
+   continue;
+   /* search parents in device tree */
+   for (i = 0; i  MAX_PARENT_POWER_DOMAIN; i++) {
+   parent_np = of_parse_phandle(np, parents, i);
+   if (!parent_np)
+   break;
+
+   if (of_property_read_string_index(parent_np,
+   compatible, 1, name)) {
+   /* Second entry not found, use the node name*/
+   name = parent_np-name;
+   }
+
+   parent_domain = pm_genpd_lookup_name(name);
+   if (!parent_domain)
+   break;
+   if (pm_genpd_add_subdomain(parent_domain, child_domain))
+   pr_warn(%s failed to add subdomain: %s\n,
+   parent_domain-name,
+   child_domain-name);
+   else
+   pr_info(%s has as child subdomain: %s.\n,
+   parent_domain-name,
+   child_domain-name);
+   }
+   }
return 0;
 }
 
-- 
1.7.9.5

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[PATCH RFC v2 09/12] drivers: soc: pm_domain: Modify the parent clocks bindings

2014-11-24 Thread Amit Daniel Kachhap
This patch updates the parent clock bindings to make it more generic.
The current bindings limits the transient parent clocks to just one
clock as oscclk. This patch extends it to allow any clock as
intermediate parent clock.
The reparent clock sets are of form tclkX, pclkX, clkX where X:0-9.
Because of this change only exynos5420 SoC DT bindings are affected.
The complete example is shown in the DT documentation section.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |   18 +-
 drivers/soc/samsung/pm_domains.c   |  199 +---
 2 files changed, 145 insertions(+), 72 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 0160bdc..8d913b9 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -13,17 +13,17 @@ Required Properties:
 
 Optional Properties:
 - compatible: This is a second compatible name and gives the complete Power
-   Domain name like samsung,exynos7-pd-mfc.
-- clocks: List of clock handles. The parent clocks of the input clocks to the
-   devices in this power domain are set to oscclk before power gating
+   Domain name like samsung,exynos7-pd-mfc
+- pd-parent-clocks: List of clock handles. The parent clocks of the input 
clocks to
+   the devices in this power domain are set to tclk before power gating
and restored back after powering on a domain. This is required for
all domains which are powered on and off and not required for unused
domains.
-- clock-names: The following clocks can be specified:
-   - oscclk: Oscillator clock.
+- pd-parent-clock-names: The following clocks can be specified:
+   - tclkN: Transient/Temporary parent clock.
- pclkN, clkN: Pairs of parent of input clock and input clock to the
-   devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
-   are supported currently.
+   devices in this power domain.
+   Maximum of 10 sets (N = 0 to 9) are supported.
 - parents: phandle of parent power domains.
 
 Node of a device using power domains must have a samsung,power-domain property
@@ -40,9 +40,9 @@ Example:
mfc_pd: power-domain@10044060 {
compatible = samsung,exynos4210-pd;
reg = 0x10044060 0x20;
-   clocks = clock CLK_FIN_PLL, clock CLK_MOUT_SW_ACLK333,
+   pd-parent-clocks = clock CLK_FIN_PLL, clock 
CLK_MOUT_SW_ACLK333,
clock CLK_MOUT_USER_ACLK333;
-   clock-names = oscclk, pclk0, clk0;
+   pd-parent-clock-names = tclk0, pclk0, clk0;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 89e2fd5..96196f8 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -24,11 +24,18 @@
 #include linux/sched.h
 #include linux/soc/samsung/exynos-pmu.h
 
-#define MAX_CLK_PER_DOMAIN 4
+#define MAX_CLK_PER_DOMAIN 30
 #define MAX_PARENT_POWER_DOMAIN10
 
 static struct exynos_pmu_pd_ops *pd_ops;
 
+struct clk_parent_list {
+   struct clk **clks;
+   struct clk **parent_clks;
+   struct clk **trans_clks;
+   unsigned int count;
+};
+
 /*
  * Exynos specific wrapper around the generic power domain
  */
@@ -37,65 +44,152 @@ struct exynos_pm_domain {
char const *name;
bool is_off;
struct generic_pm_domain pd;
-   struct clk *oscclk;
-   struct clk *clk[MAX_CLK_PER_DOMAIN];
-   struct clk *pclk[MAX_CLK_PER_DOMAIN];
+   struct clk_parent_list *clk_parent;
 };
 
-static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
+static struct clk *exynos_pd_clk_get(struct device_node *np,
+   char *initial_property, char *clk_name)
 {
-   struct exynos_pm_domain *pd;
-   void __iomem *base;
-   int ret = 0;
+   struct of_phandle_args clkspec;
+   struct clk *clk;
+   int rc, index;
+   char name[32];
+
+   sprintf(name, %s-clock-names, initial_property);
+   index = of_property_match_string(np, name, clk_name);
+   if (index  0)
+   return ERR_PTR(-EINVAL);
+
+   sprintf(name, %s-clocks, initial_property);
+
+   rc = of_parse_phandle_with_args(np, name, #clock-cells, index,
+   clkspec);
+   if (rc)
+   return ERR_PTR(rc);
+
+   clk = of_clk_get_from_provider(clkspec);
+   of_node_put(clkspec.np);
+   return clk;
+}
 
-   pd = container_of(domain, struct exynos_pm_domain, pd);
-   base = pd-base;
+static int pd_init_parent_clocks(struct platform_device *pdev,
+   struct device_node *np, struct exynos_pm_domain *pd)
+{
+   struct

[PATCH RFC v2 11/12] drivers: soc: samsung: Add support for clock rate save/restore in power domain

2014-11-24 Thread Amit Daniel Kachhap
While turning power domain to on/off, some clocks rates might change and
need to be saved/restored in the Exynos7 SOC. This patch adds the
framework for saving those clocks before power off and restoring it back
after power on operation.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |7 ++
 drivers/soc/samsung/pm_domains.c   |   74 
 2 files changed, 81 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index c48769e..97fec1b 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -32,6 +32,11 @@ Optional Properties:
before turning off a power domain.
 - pd-off-en-clock-names: clocks can be specified as,
- clkN: N can vary between 0-30.
+- pd-rate-clocks: List of clock handles. The rates of these clocks are required
+   to be saved before turning off a power domain and restoring after 
turning
+   on a power domain.
+- pd-rate-clock-names: clocks can be specified as,
+   - clkN: N can vary between 0-30.
 - parents: phandle of parent power domains.
 
 Node of a device using power domains must have a samsung,power-domain property
@@ -55,6 +60,8 @@ Example:
pd-on-en-clock-names = clk0, clk1;
pd-off-en-clocks = clock CLK_IP1, clock CLK_IP2,
pd-off-en-clock-names = clk0, clk1;
+   pd-rate-clocks = clock CLK_IP3, clock CLK_IP4,
+   pd-rate-clock-names = clk0, clk1;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 5407eb7..a235277 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -36,6 +36,12 @@ struct clk_enable_list {
unsigned int en_status;
 };
 
+struct clk_rate_list {
+   struct clk **clks;
+   unsigned int *rates;
+   unsigned int count;
+};
+
 struct clk_parent_list {
struct clk **clks;
struct clk **parent_clks;
@@ -53,6 +59,7 @@ struct exynos_pm_domain {
struct generic_pm_domain pd;
struct clk_enable_list *clk_pd_on;
struct clk_enable_list *clk_pd_off;
+   struct clk_rate_list *clk_rate;
struct clk_parent_list *clk_parent;
 };
 
@@ -198,6 +205,49 @@ static int pd_init_parent_clocks(struct platform_device 
*pdev,
return 0;
 }
 
+static int pd_init_rate_clocks(struct platform_device *pdev,
+   struct device_node *np, struct exynos_pm_domain *pd)
+{
+   struct clk_rate_list *list;
+   char propname[32], clk_name[8];
+   int count, i;
+   struct clk *clk = ERR_PTR(-ENOENT);
+
+   list = devm_kzalloc(pdev-dev, sizeof(*list), GFP_KERNEL);
+   if (!list)
+   return -ENOMEM;
+
+   pd-clk_rate = list;
+   snprintf(propname, sizeof(propname), pd-rate-clock-names);
+
+   count = of_property_count_strings(np, propname);
+   if (!count || count  MAX_CLK_PER_DOMAIN)
+   return -EINVAL;
+
+   list-count = count;
+   list-clks = devm_kzalloc(pdev-dev, sizeof(*list-clks) * count,
+   GFP_KERNEL);
+   if (!list-clks)
+   return -ENOMEM;
+
+   list-rates = devm_kzalloc(pdev-dev, sizeof(list-rates) * count,
+   GFP_KERNEL);
+   if (!list-rates)
+   return -ENOMEM;
+
+   for (i = 0; i  count; i++) {
+   snprintf(clk_name, sizeof(clk_name), clk%d, i);
+   clk = exynos_pd_clk_get(np, pd-rate, clk_name);
+   if (IS_ERR(clk)) {
+   dev_err(pdev-dev, %s clock not found\n, clk_name);
+   return -EINVAL;
+   }
+   list-clks[i] = clk;
+   }
+   dev_info(pdev-dev, pd rate clocks initialised\n);
+   return 0;
+}
+
 static void exynos_pd_poweron_prepare(struct exynos_pm_domain *pd)
 {
struct clk_enable_list *en_list;
@@ -220,6 +270,7 @@ static void exynos_pd_post_poweron(struct exynos_pm_domain 
*pd)
 {
struct clk_parent_list *p_list;
struct clk_enable_list *en_list;
+   struct clk_rate_list *rt_list;
int i;
 
p_list = pd-clk_parent;
@@ -229,6 +280,17 @@ static void exynos_pd_post_poweron(struct exynos_pm_domain 
*pd)
clk_set_parent(p_list-clks[i], p_list-parent_clks[i]);
}
 
+   rt_list = pd-clk_rate;
+   if (rt_list) {
+   /* restore the rate from the rate clock list */
+   for (i = 0; i  rt_list-count; i++) {
+   if (!rt_list-rates[i])
+   continue;
+   clk_set_rate(rt_list-clks[i], rt_list-rates[i]);
+   rt_list-rates[i] = 0

[PATCH RFC v2 12/12] arm64: Kconfig: Enable PM_GENERIC_DOMAINS for exynos7

2014-11-24 Thread Amit Daniel Kachhap
Use power domain driver for Exynos7 SOC's

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm64/Kconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 30bd4d5..b102d0b 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -154,6 +154,7 @@ config ARCH_EXYNOS7
bool ARMv8 based Samsung Exynos7
select ARCH_EXYNOS
select COMMON_CLK_SAMSUNG
+   select PM_GENERIC_DOMAINS
help
  This enables support for Samsung Exynos7 SoC family
 
-- 
1.7.9.5

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[PATCH RFC v2 10/12] drivers: soc: samsung: Add support for clock enabling in power domain

2014-11-24 Thread Amit Daniel Kachhap
While turning power domain to on/off, some clocks need to be enabled
in the Exynos7 SOC. This patch adds the framework for enabling those
clocks before on/off and restoring it back after the operation. Also
these list of clocks may be different for on/off operation so not using
the generic pm domain suspend/resume interface.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |   12 ++
 drivers/soc/samsung/pm_domains.c   |  138 +++-
 2 files changed, 146 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 8d913b9..c48769e 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -24,6 +24,14 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain.
Maximum of 10 sets (N = 0 to 9) are supported.
+- pd-on-en-clocks: List of clock handles. These clocks are required to enabled
+   before turning on a power domain.
+- pd-on-en-clock-names: clocks can be specified as,
+   - clkN: N can vary between 0-30.
+- pd-off-en-clocks: List of clock handles. These clocks are required to enabled
+   before turning off a power domain.
+- pd-off-en-clock-names: clocks can be specified as,
+   - clkN: N can vary between 0-30.
 - parents: phandle of parent power domains.
 
 Node of a device using power domains must have a samsung,power-domain property
@@ -43,6 +51,10 @@ Example:
pd-parent-clocks = clock CLK_FIN_PLL, clock 
CLK_MOUT_SW_ACLK333,
clock CLK_MOUT_USER_ACLK333;
pd-parent-clock-names = tclk0, pclk0, clk0;
+   pd-on-en-clocks = clock CLK_IP1, clock CLK_IP2,
+   pd-on-en-clock-names = clk0, clk1;
+   pd-off-en-clocks = clock CLK_IP1, clock CLK_IP2,
+   pd-off-en-clock-names = clk0, clk1;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 96196f8..5407eb7 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -18,6 +18,7 @@
 #include linux/slab.h
 #include linux/pm_domain.h
 #include linux/clk.h
+#include linux/clk-provider.h
 #include linux/delay.h
 #include linux/of_address.h
 #include linux/of_platform.h
@@ -29,6 +30,12 @@
 
 static struct exynos_pmu_pd_ops *pd_ops;
 
+struct clk_enable_list {
+   struct clk **clks;
+   unsigned int count;
+   unsigned int en_status;
+};
+
 struct clk_parent_list {
struct clk **clks;
struct clk **parent_clks;
@@ -44,6 +51,8 @@ struct exynos_pm_domain {
char const *name;
bool is_off;
struct generic_pm_domain pd;
+   struct clk_enable_list *clk_pd_on;
+   struct clk_enable_list *clk_pd_off;
struct clk_parent_list *clk_parent;
 };
 
@@ -72,6 +81,55 @@ static struct clk *exynos_pd_clk_get(struct device_node *np,
return clk;
 }
 
+static int pd_init_enable_clocks(struct platform_device *pdev,
+   struct device_node *np, bool on, struct exynos_pm_domain *pd)
+{
+   struct clk_enable_list *list;
+   char propname[32], clk_name[8];
+   int count, i;
+   struct clk *clk = ERR_PTR(-ENOENT);
+
+   list = devm_kzalloc(pdev-dev, sizeof(*list), GFP_KERNEL);
+   if (!list)
+   return -ENOMEM;
+
+   if (on) {
+   pd-clk_pd_on = list;
+   snprintf(propname, sizeof(propname), pd-on-en-clock-names);
+   } else {
+   pd-clk_pd_off = list;
+   snprintf(propname, sizeof(propname), pd-off-en-clock-names);
+   }
+
+   count = of_property_count_strings(np, propname);
+   if (!count || count  MAX_CLK_PER_DOMAIN)
+   return -EINVAL;
+
+   list-count = count;
+   list-clks = devm_kzalloc(pdev-dev, sizeof(*list-clks) * count,
+   GFP_KERNEL);
+   if (!list-clks)
+   return -ENOMEM;
+
+   if (on)
+   snprintf(propname, sizeof(propname), pd-on-en);
+   else
+   snprintf(propname, sizeof(propname), pd-off-en);
+
+   for (i = 0; i  count; i++) {
+   snprintf(clk_name, sizeof(clk_name), clk%d, i);
+   clk = exynos_pd_clk_get(np, propname, clk_name);
+   if (IS_ERR(clk)) {
+   dev_err(pdev-dev, %s clock not found\n, clk_name);
+   return -EINVAL;
+   }
+   list-clks[i] = clk;
+   }
+   dev_info(pdev-dev, pd %s enable clocks initialised\n,
+   on ? on : off);
+   return 0;
+}
+
 static int pd_init_parent_clocks(struct platform_device *pdev,
struct

[PATCH v4 0/5] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-23 Thread Amit Daniel Kachhap
This patch series [1 - 5] performs,

1) Moves pmu driver to driver/soc/samsung folder. This is needed as exynos7 is
   an arm64 based platform and hence PMU driver should be in driver folder.
   Some discussion happened about this in the v1 version. Finally adding it in
   driver/soc folder as it too SoC specific and not a general driver.
   Entire discussion can be found here (A).
2) Add exynos7 PMU support.
3) Enables the driver for 32bit arm exynos platforms.

Changes from V3:
* Fixed Kconfig as per Russell feedback
* Rebased the series against Pankaj SoC restart consolidation patches (D) as per
  Kukjin request.
* Link to V3 can be found here (C)

Changes from V2:
* Added review comment changes suggested by Pankaj.
* Removed mfd client support in this patch series. This will be added later in
  the power domain patch series.
* Link to V2 can be found here (B)

Changes from V1:
* Move pmu driver in driver/soc/samsung folder
* Removed the power domain features. They will posted as a separate series.
* Added exynos7 PMU support.
* Link to v1 can be found here (A)

This complete patch series is rebased on Kukjin for-next tree.

(A) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
(B) - http://www.spinics.net/lists/arm-kernel/msg375910.html
(C) - http://www.spinics.net/lists/linux-samsung-soc/msg39237.html 
(D) - http://www.spinics.net/lists/linux-samsung-soc/msg39095.html

Amit Daniel Kachhap (5):
  ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
  drivers: soc: Add support for Exynos PMU driver
  driver: soc: exynos-pmu: Add an API to be called after wakeup
  drivers: soc: exynos-pmu: Add support for Exynos7
  arm: exynos: Select SOC_SAMSUNG config option

 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/Makefile  |2 +-
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 +-
 arch/arm/mach-exynos/suspend.c |4 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 +
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  442 +++-
 .../linux/soc/samsung}/exynos-pmu.h|1 +
 .../linux/soc/samsung/exynos-regs-pmu.h|  273 
 15 files changed, 744 insertions(+), 13 deletions(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (64%)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (89%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (63%)

-- 
1.7.9.5

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[PATCH v4 3/5] driver: soc: exynos-pmu: Add an API to be called after wakeup

2014-11-23 Thread Amit Daniel Kachhap
This patch adds an API exynos_sys_powerup_conf to be called after system sleep
wakeup. This will useful for exynos7 SoC to perform resume related
initialisations. This is similar to currently existing API
exynos_sys_powerdown_conf.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c   |9 +
 include/linux/soc/samsung/exynos-pmu.h |1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 2965c3b..f7ae8a0 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -32,6 +32,7 @@ struct exynos_pmu_data {
 
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
+   void (*powerup_conf)(enum sys_powerdown);
 };
 
 struct exynos_pmu_context {
@@ -640,6 +641,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
}
 }
 
+void exynos_sys_powerup_conf(enum sys_powerdown mode)
+{
+   const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
+
+   if (pmu_data-powerup_conf)
+   pmu_data-powerup_conf(mode);
+}
+
 static void exynos5250_pmu_init(void)
 {
unsigned int value;
diff --git a/include/linux/soc/samsung/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
index a2ab0d5..b497712 100644
--- a/include/linux/soc/samsung/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -20,5 +20,6 @@ enum sys_powerdown {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_sys_powerup_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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[PATCH v4 4/5] drivers: soc: exynos-pmu: Add support for Exynos7

2014-11-23 Thread Amit Daniel Kachhap
Add PMU settings for exynos7. This is required for future suspend-to-ram,
cpuidle and power domain support.

Note: In this patch some static declarations lines are over 80
characters per line for easy redability.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 drivers/soc/samsung/exynos-pmu.c   |  427 +++-
 include/linux/soc/samsung/exynos-regs-pmu.h|  273 +
 3 files changed, 700 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b..67b2113 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
   - samsung,exynos5260-pmu - for Exynos5260 SoC.
   - samsung,exynos5410-pmu - for Exynos5410 SoC,
   - samsung,exynos5420-pmu - for Exynos5420 SoC.
+  - samsung,exynos7-pmu - for Exynos7 SoC.
second value must be always syscon.
 
  - reg : offset and length of the register set.
diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index f7ae8a0..cb9e356 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -42,6 +42,7 @@ struct exynos_pmu_context {
 
 static void __iomem *pmu_base_addr;
 static struct exynos_pmu_context *pmu_context;
+extern u32 exynos_get_eint_wake_mask(void);
 
 static inline void pmu_raw_writel(u32 val, u32 offset)
 {
@@ -497,6 +498,211 @@ static struct exynos_pmu_conf exynos5420_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static const struct exynos_pmu_conf exynos7_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } } */
+   { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG,   { 0x0, 0x0, 0x8 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1, 0x0 
} },
+   { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_BUS_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_SYS_PWR_REG,  { 0x3, 0x0, 0x3 
} },
+   { EXYNOS7_TOP_BUS_MIF_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_MIF_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_MIF_SYS_PWR_REG

[PATCH v4 2/5] drivers: soc: Add support for Exynos PMU driver

2014-11-23 Thread Amit Daniel Kachhap
This patch moves Exynos PMU driver implementation from arm/mach-exynos
to drivers/soc/samsung. This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.

This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |2 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
 6 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcefb54..b91b382 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..90f33b9 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
 source drivers/soc/qcom/Kconfig
 source drivers/soc/ti/Kconfig
 source drivers/soc/versatile/Kconfig
+source drivers/soc/samsung/Kconfig
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..fcd7e37 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
 obj-$(CONFIG_SOC_TI)   += ti/
 obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
+obj-$(CONFIG_SOC_SAMSUNG)  += samsung/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..6855cc4
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,20 @@
+#
+# SAMSUNG SOC drivers
+#
+menu Samsung SOC drivers support
+
+config SOC_SAMSUNG
+   bool
+
+config EXYNOS_PMU
+   bool Support Exynos Power Management Unit
+   depends on ARCH_EXYNOS
+   default y
+   help
+ Exynos SoC have Power Management Unit (PMU) which controls power and
+ operation state of various components in Exynos SoC. This driver
+ provides implementation of PMU driver and provides various
+ functionality like initialisation and transition to various low power
+ states.
+
+endmenu
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..5a879c6
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/soc/samsung/exynos-pmu.c
-- 
1.7.9.5

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Re: [PATCH v5 1/2] clk: samsung: exynos5440: move restart code into clock driver

2014-11-23 Thread amit daniel kachhap
On Sat, Nov 22, 2014 at 7:38 AM, Kukjin Kim kg...@kernel.org wrote:
 Pankaj Dubey wrote:

 Hi Kukjin,

 Hi,

 On Thursday 20 November 2014 11:18 PM, Sylwester Nawrocki wrote:
  On 19/11/14 04:37, Pankaj Dubey wrote:
 
  +static int exynos5440_clk_restart_notify(struct notifier_block *this,
  +  unsigned long code, void *unused)
  +{
  +  u32 val, status;
  +
  +  status = readl_relaxed(reg_base + 0xbc);
  +  val = readl_relaxed(reg_base + 0xcc);
  +  val = (val  0x) | (status  0x);
  +  writel_relaxed(val, reg_base + 0xcc);
 
  Can we have macro definitions for these 0xcc, 0xbc address offsets ?
  I must say I couldn't find them documented in any Exynos datasheet I've
  got though.
 
 
  I also wished this, but I could not find them documented.
  So I tried to keep logic of original code as it is, just changed location.
  I would also like to mention that I have not tested this on exynos5440 as 
  I
  do not have
  one with me. I believe if it was working at its original place in
  exynos_restart it should work
  here also. Other patch (2/2) I have verified on Exynos3250 board and its
  working well.
 
  I think it's best to merge both patches in that series through
  the arm-soc tree, since applying them not in order may cause some
  breakage. Thus I'd let Kukjin take this patch set into his tree.
 
  For both patches:
  Acked-by: Sylwester Nawrocki s.nawro...@samsung.com
 
 Sylwester, thanks for your ack.


 Will you please take this series into your tree.

 + Amit Daniel

 Yeah, this series looks good to me and I'm looking at this series with Amit's
 moving pmu.c into drivers/. Maybe I need to ask Amit to respin the series on
 top of this? If required, I'll reply.

I was ready to post pmu v4 version with Russell suggested changes so i
rebased and posted v4 series
on top of this 2 patch.

Regards,
Amit D

 Thanks,
 Kukjin

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Re: [PATCH v3 2/5] drivers: soc: Add support for Exynos PMU driver

2014-11-20 Thread amit daniel kachhap
On Thu, Nov 20, 2014 at 3:33 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
 On Thu, Nov 20, 2014 at 11:09:25AM +0530, Amit Daniel Kachhap wrote:
 diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
 index 063113d..44d220d 100644
 --- a/drivers/soc/Makefile
 +++ b/drivers/soc/Makefile
 @@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM)   += qcom/
  obj-$(CONFIG_ARCH_TEGRA) += tegra/
  obj-$(CONFIG_SOC_TI) += ti/
  obj-$(CONFIG_PLAT_VERSATILE) += versatile/
 +obj-$(CONFIG_ARCH_EXYNOS)+= samsung/

 Is ARCH_EXYNOS appropriate here, or is your new SOC_SAMSUNG better?
yes, SOC_SAMSUNG is more appropriate.

 diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
 new file mode 100644
 index 000..a424ebc
 --- /dev/null
 +++ b/drivers/soc/samsung/Kconfig
 @@ -0,0 +1,20 @@
 +#
 +# SAMSUNG SOC drivers
 +#
 +menuconfig SOC_SAMSUNG
 + bool Samsung SOC drivers support

 If you intend to select SOC_SAMSUNG, is there any point in making this
 a user-visible symbol?
Agreed, only menu Samsung SOC drivers support will be fine.

Regards,
Amit

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 according to speedtest.net.

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[PATCH v3 0/5] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-19 Thread Amit Daniel Kachhap
This patch series [1 - 5] performs,

1) Moves pmu driver to driver/soc/samsung folder. This is needed as exynos7 is
   an arm64 based platform and hence PMU driver should be in driver folder.
   Some discussion happened about this in the v1 version. Finally adding it in
   driver/soc folder as it too SoC specific and not a general driver.
   Entire discussion can be found here (A).
2) Add exynos7 PMU support.
3) Enables the driver for 32bit arm exynos platforms.

Changes from V2:
* Added review comment changes suggested by Pankaj.
* Removed mfd client support in this patch series. This will be added later in
  the power domain patch series.
* Link to V2 can be found here (B)

Changes from V1:
* Move pmu driver in driver/soc/samsung folder
* Removed the power domain features. They will posted as a separate series.
* Added exynos7 PMU support.
* Link to v1 can be found here (A)

This complete patch series is rebased on Kukjin for-next tree.

(A) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
(B) - http://www.spinics.net/lists/arm-kernel/msg375910.html

Amit Daniel Kachhap (5):
  ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
  drivers: soc: Add support for Exynos PMU driver
  driver: soc: exynos-pmu: Add an API to be called after wakeup
  drivers: soc: exynos-pmu: Add support for Exynos7
  arm: exynos: Select SOC_SAMSUNG config option

 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/Makefile  |2 +-
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 +-
 arch/arm/mach-exynos/suspend.c |4 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 +
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  445 +++-
 .../linux/soc/samsung}/exynos-pmu.h|1 +
 .../linux/soc/samsung/exynos-regs-pmu.h|  273 
 15 files changed, 745 insertions(+), 15 deletions(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (63%)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (89%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (63%)

-- 
1.7.9.5

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[PATCH v3 2/5] drivers: soc: Add support for Exynos PMU driver

2014-11-19 Thread Amit Daniel Kachhap
This patch moves Exynos PMU driver implementation from arm/mach-exynos
to drivers/soc/samsung. This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.

This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |2 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   20 
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
 6 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcefb54..b91b382 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..90f33b9 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
 source drivers/soc/qcom/Kconfig
 source drivers/soc/ti/Kconfig
 source drivers/soc/versatile/Kconfig
+source drivers/soc/samsung/Kconfig
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..44d220d 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
 obj-$(CONFIG_SOC_TI)   += ti/
 obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
+obj-$(CONFIG_ARCH_EXYNOS)  += samsung/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..a424ebc
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,20 @@
+#
+# SAMSUNG SOC drivers
+#
+menuconfig SOC_SAMSUNG
+   bool Samsung SOC drivers support
+
+if SOC_SAMSUNG
+
+config EXYNOS_PMU
+   bool Support Exynos Power Management Unit
+   depends on ARCH_EXYNOS
+   default y
+   help
+ Exynos SoC have Power Management Unit (PMU) which controls power and
+ operation state of various components in Exynos SoC. This driver
+ provides implementation of PMU driver and provides various
+ functionality like initialisation and transition to various low power
+ states.
+
+endif #SOC_SAMSUNG
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..5a879c6
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_PMU)   += exynos-pmu.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/soc/samsung/exynos-pmu.c
-- 
1.7.9.5

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[PATCH v3 1/5] ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung

2014-11-19 Thread Amit Daniel Kachhap
Moving Exynos PMU specific header file into include/linux/soc/samsung
thus updated affected files under mach-exynos to use new location of
these header files.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 ++--
 arch/arm/mach-exynos/pmu.c |6 ++
 arch/arm/mach-exynos/suspend.c |4 ++--
 .../linux/soc/samsung}/exynos-pmu.h|0
 .../linux/soc/samsung/exynos-regs-pmu.h|0
 8 files changed, 9 insertions(+), 11 deletions(-)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (100%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (100%)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 8f638ad..63d0450 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include linux/platform_device.h
 #include linux/pm_domain.h
 #include linux/irqchip.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -29,7 +30,6 @@
 
 #include common.h
 #include mfc.h
-#include regs-pmu.h
 #include regs-sys.h
 
 void __iomem *pmu_base_addr;
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index b0d3c2e..c5e17b0 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -16,12 +16,12 @@
 #include linux/io.h
 #include linux/of_address.h
 #include linux/syscore_ops.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cputype.h
 #include asm/cp15.h
 #include asm/mcpm.h
 
-#include regs-pmu.h
 #include common.h
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 7a1ebfe..d6e7f49 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include linux/smp.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/cp15.h
@@ -30,7 +31,6 @@
 #include mach/map.h
 
 #include common.h
-#include regs-pmu.h
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 86f3ecd..1a981e0 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,8 @@
 #include linux/cpu_pm.h
 #include linux/io.h
 #include linux/err.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #include asm/firmware.h
 #include asm/smp_scu.h
@@ -26,8 +28,6 @@
 #include plat/pm-common.h
 
 #include common.h
-#include exynos-pmu.h
-#include regs-pmu.h
 #include regs-sys.h
 
 static inline void __iomem *exynos_boot_vector_addr(void)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 6c8a76d..aa43e04 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -13,10 +13,8 @@
 #include linux/of.h
 #include linux/platform_device.h
 #include linux/delay.h
-
-
-#include exynos-pmu.h
-#include regs-pmu.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index f8e7dcd..80cf7ac 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -21,6 +21,8 @@
 #include linux/irqchip/arm-gic.h
 #include linux/err.h
 #include linux/regulator/machine.h
+#include linux/soc/samsung/exynos-pmu.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -33,9 +35,7 @@
 #include plat/regs-srom.h
 
 #include common.h
-#include regs-pmu.h
 #include regs-sys.h
-#include exynos-pmu.h
 
 #define S5P_CHECK_SLEEP 0x0BAD
 
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to include/linux/soc/samsung/exynos-pmu.h
diff --git a/arch/arm/mach-exynos/regs-pmu.h 
b/include/linux/soc/samsung/exynos-regs-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/regs-pmu.h
rename to include/linux/soc/samsung/exynos-regs-pmu.h
-- 
1.7.9.5

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[PATCH v3 3/5] driver: soc: exynos-pmu: Add an API to be called after wakeup

2014-11-19 Thread Amit Daniel Kachhap
This patch adds an API exynos_sys_powerup_conf to be called after system sleep
wakeup. This will useful for exynos7 SoC to perform resume related
initialisations. This is similar to currently existing API
exynos_sys_powerdown_conf.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c   |9 +
 include/linux/soc/samsung/exynos-pmu.h |1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index aa43e04..f8896bc 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -29,6 +29,7 @@ struct exynos_pmu_data {
 
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
+   void (*powerup_conf)(enum sys_powerdown);
 };
 
 struct exynos_pmu_context {
@@ -637,6 +638,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
}
 }
 
+void exynos_sys_powerup_conf(enum sys_powerdown mode)
+{
+   const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
+
+   if (pmu_data-powerup_conf)
+   pmu_data-powerup_conf(mode);
+}
+
 static void exynos5250_pmu_init(void)
 {
unsigned int value;
diff --git a/include/linux/soc/samsung/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
index a2ab0d5..b497712 100644
--- a/include/linux/soc/samsung/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -20,5 +20,6 @@ enum sys_powerdown {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_sys_powerup_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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[PATCH v3 4/5] drivers: soc: exynos-pmu: Add support for Exynos7

2014-11-19 Thread Amit Daniel Kachhap
Add PMU settings for exynos7. This is required for future suspend-to-ram,
cpuidle and power domain support.

Note: In this patch some static declarations lines are over 80
characters per line for easy redability.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 drivers/soc/samsung/exynos-pmu.c   |  430 +++-
 include/linux/soc/samsung/exynos-regs-pmu.h|  273 +
 3 files changed, 701 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b..67b2113 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
   - samsung,exynos5260-pmu - for Exynos5260 SoC.
   - samsung,exynos5410-pmu - for Exynos5410 SoC,
   - samsung,exynos5420-pmu - for Exynos5420 SoC.
+  - samsung,exynos7-pmu - for Exynos7 SoC.
second value must be always syscon.
 
  - reg : offset and length of the register set.
diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index f8896bc..62a320e 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -11,6 +11,7 @@
 
 #include linux/io.h
 #include linux/of.h
+#include linux/of_address.h
 #include linux/platform_device.h
 #include linux/delay.h
 #include linux/soc/samsung/exynos-regs-pmu.h
@@ -39,6 +40,7 @@ struct exynos_pmu_context {
 
 static void __iomem *pmu_base_addr;
 static struct exynos_pmu_context *pmu_context;
+extern u32 exynos_get_eint_wake_mask(void);
 
 static inline void pmu_raw_writel(u32 val, u32 offset)
 {
@@ -494,6 +496,211 @@ static struct exynos_pmu_conf exynos5420_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static const struct exynos_pmu_conf exynos7_pmu_config[] = {
+   /* { .offset = offset, .val = { AFTR, LPA, SLEEP } } */
+   { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG,   { 0x0, 0x0, 0x8 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1, 0x0 
} },
+   { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_BUS_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_SYS_PWR_REG,  { 0x3, 0x0, 0x3

[PATCH v3 5/5] arm: exynos: Select SOC_SAMSUNG config option

2014-11-19 Thread Amit Daniel Kachhap
The config option SOC_SAMSUNG is needed to enable all soc samsung
drivers inside driver/soc/samsung folder. Currently, this will be useful to
enable exynos pmu driver which is moved to that folder.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Kconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b9e3f1c..17880b6 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -25,6 +25,7 @@ menuconfig ARCH_EXYNOS
select S5P_DEV_MFC
select SRAM
select MFD_SYSCON
+   select SOC_SAMSUNG
help
  Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
 
-- 
1.7.9.5

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Re: [PATCH v2 0/6] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-19 Thread amit daniel kachhap
On Wed, Nov 19, 2014 at 1:34 PM, Kukjin Kim kgene@samsung.com wrote:
 On 11/13/14 17:56, amit daniel kachhap wrote:
 On Sat, Nov 8, 2014 at 6:46 PM, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
 This patch series[1 - 6] performs,

 1) Moves pmu driver to driver/soc/samsung folder. Some discussion happened 
 about
this in the v1 version. Finally adding it in driver/soc folder as it too 
 SoC
specific and not a general driver. Entire discussion can be found here 
 (A).
 2) Registers this driver as MFD client driver. This will be used by clients 
 like exynos pm
sleep and pm domain driver.
 3) Add exynos7 PMU support.

 Changes from V1:
 * Move pmu driver in driver/soc/samsung folder
 * Removed the power domain features. They will posted as a separate series.
 * Added exynos7 PMU support.
 * Link to v1 can be found here (B)

 This patch has dependency on following patches posted earlier by Pankaj (C),
 which is accepted by maintainer.

 Patch 6 was earlier posted by Abhilash (D) which has been reposted here 
 with some
 extra changes.

 This complete patch series is rebased on linux-next.

 (A) - http://www.spinics.net/lists/linux-samsung-soc/msg38444.html
 (B) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
 (C) - https://lkml.org/lkml/2014/10/6/581
 (D) - http://www.spinics.net/lists/arm-kernel/msg358230.html

 Amit Daniel Kachhap (6):
   ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
   drivers: soc: Add support for Exynos PMU driver
   drivers: soc: samsung: Fix a spelling mistake
   soc: samsung: exynos-pmu: Register exynos-pmu driver as a mfd driver
   driver: soc: exynos-pmu: Add an API to be called after wakeup
   drivers: soc: samsung: Add support for Exynos7 pmu

  .../devicetree/bindings/arm/samsung/pmu.txt|1 +
  arch/arm/mach-exynos/Makefile  |2 +-
  arch/arm/mach-exynos/exynos.c  |2 +-
  arch/arm/mach-exynos/mcpm-exynos.c |2 +-
  arch/arm/mach-exynos/platsmp.c |2 +-
  arch/arm/mach-exynos/pm.c  |4 +-
  arch/arm/mach-exynos/regs-pmu.h|  335 ---
  arch/arm/mach-exynos/suspend.c |3 +-
  drivers/soc/Kconfig|1 +
  drivers/soc/Makefile   |1 +
  drivers/soc/samsung/Kconfig|   19 +
  drivers/soc/samsung/Makefile   |1 +
  .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  471 ++-

 Hi Olof/Kukjin,

 I am not sure that driver/soc/samsung/* shall go in whose tree.
 I am preparing the next version so if any comment from your side
 please let me know.

 In my opinion, it should be sent out via samsung tree because some PM
 related changes are in samsung tree and I'd like to apply exynos7 stuff
 in samsung tree as well... Please make sure your patches are based on
 top of samsung tree.
Thanks for clarification, Just posted the v3 version on top Samsung
for-next tree.

Regards,
Amit

 - Kukjin

 Regards,
 Amit

  .../linux/soc/samsung}/exynos-pmu.h|6 +
  include/linux/soc/samsung/exynos-regs-pmu.h|  608 
 
  15 files changed, 1109 insertions(+), 349 deletions(-)
  delete mode 100644 arch/arm/mach-exynos/regs-pmu.h
  create mode 100644 drivers/soc/samsung/Kconfig
  create mode 100644 drivers/soc/samsung/Makefile
  rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (50%)
  rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h 
 (78%)
  create mode 100644 include/linux/soc/samsung/exynos-regs-pmu.h
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Re: [PATCH v2 0/6] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-13 Thread amit daniel kachhap
On Sat, Nov 8, 2014 at 6:46 PM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
 This patch series[1 - 6] performs,

 1) Moves pmu driver to driver/soc/samsung folder. Some discussion happened 
 about
this in the v1 version. Finally adding it in driver/soc folder as it too 
 SoC
specific and not a general driver. Entire discussion can be found here (A).
 2) Registers this driver as MFD client driver. This will be used by clients 
 like exynos pm
sleep and pm domain driver.
 3) Add exynos7 PMU support.

 Changes from V1:
 * Move pmu driver in driver/soc/samsung folder
 * Removed the power domain features. They will posted as a separate series.
 * Added exynos7 PMU support.
 * Link to v1 can be found here (B)

 This patch has dependency on following patches posted earlier by Pankaj (C),
 which is accepted by maintainer.

 Patch 6 was earlier posted by Abhilash (D) which has been reposted here with 
 some
 extra changes.

 This complete patch series is rebased on linux-next.

 (A) - http://www.spinics.net/lists/linux-samsung-soc/msg38444.html
 (B) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
 (C) - https://lkml.org/lkml/2014/10/6/581
 (D) - http://www.spinics.net/lists/arm-kernel/msg358230.html

 Amit Daniel Kachhap (6):
   ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
   drivers: soc: Add support for Exynos PMU driver
   drivers: soc: samsung: Fix a spelling mistake
   soc: samsung: exynos-pmu: Register exynos-pmu driver as a mfd driver
   driver: soc: exynos-pmu: Add an API to be called after wakeup
   drivers: soc: samsung: Add support for Exynos7 pmu

  .../devicetree/bindings/arm/samsung/pmu.txt|1 +
  arch/arm/mach-exynos/Makefile  |2 +-
  arch/arm/mach-exynos/exynos.c  |2 +-
  arch/arm/mach-exynos/mcpm-exynos.c |2 +-
  arch/arm/mach-exynos/platsmp.c |2 +-
  arch/arm/mach-exynos/pm.c  |4 +-
  arch/arm/mach-exynos/regs-pmu.h|  335 ---
  arch/arm/mach-exynos/suspend.c |3 +-
  drivers/soc/Kconfig|1 +
  drivers/soc/Makefile   |1 +
  drivers/soc/samsung/Kconfig|   19 +
  drivers/soc/samsung/Makefile   |1 +
  .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  471 ++-

Hi Olof/Kukjin,

I am not sure that driver/soc/samsung/* shall go in whose tree.
I am preparing the next version so if any comment from your side
please let me know.

Regards,
Amit

  .../linux/soc/samsung}/exynos-pmu.h|6 +
  include/linux/soc/samsung/exynos-regs-pmu.h|  608 
 
  15 files changed, 1109 insertions(+), 349 deletions(-)
  delete mode 100644 arch/arm/mach-exynos/regs-pmu.h
  create mode 100644 drivers/soc/samsung/Kconfig
  create mode 100644 drivers/soc/samsung/Makefile
  rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (50%)
  rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (78%)
  create mode 100644 include/linux/soc/samsung/exynos-regs-pmu.h

 --
 1.7.9.5

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Re: [PATCH 03/12] PM / Domains: Add notifier support for power domain transitions

2014-11-10 Thread amit daniel kachhap
On Sat, Nov 8, 2014 at 12:15 AM, Kevin Hilman khil...@kernel.org wrote:
 Sylwester Nawrocki s.nawro...@samsung.com writes:

 On 04/11/14 07:44, amit daniel kachhap wrote:
 On Mon, Nov 3, 2014 at 11:53 PM, Kevin Hilman khil...@kernel.org wrote:
 Rafael J. Wysocki r...@rjwysocki.net writes:
 On Monday, November 03, 2014 09:23:01 AM Amit Daniel Kachhap wrote:
 These power domain transition notifiers will assist in carrying
 out some activity associated with domain power on/off such as
 some registers which may lose its contents and need save/restore
 across domain power off/on.

 The runtime PM framework already provides callbacks that are useful for
 context save/restore for devices.  Could you please describe in more
 detail which registers in which kind of devices need to be
 saved/restored, and why they cannot be saved/restored using existing
 mechanisms.

 Basically the requirement is mandated by exynos7 manual. It tells that
 before turning off the power domain, some clock registers need to saved
 and should be restored just after turning the power domain. These clock
 registers are not necessarily gate clocks but could be mux clocks etc.
 The driver may not have all information of these clocks also. I suppose
 these are Soc specific changes but drivers should work across Socs.
 This behavior is almost similar to suspend/resume case where a whole
 list of clock registers are saved/restored.

 Indeed, the somehow complicated power domain power on/off sequences
 are SoC specific.  They involve not only groups of clocks (usually
 gate, mux clock registers of all devices in a power domain) but also
 SoC-specific PMU (Power Management Unit) registers.
 I assume it would be inappropriate to push such details to device
 drivers.  Moreover, a device driver could not be even loaded.

 Since the clocks' state is already maintained by clk driver we came
 up with an idea of having generic calls from power domain driver back
 to the clock controller driver.

 For the clock tree, it still seems to me that this is better handled in
 the SoC clock driver.  For example, when a power domain is about to be
 gated, all the devices in that domain are runtime suspended, and
 presumably all of their gate clocks are disabled.  Now, doesn't the
 clock driver know the clock tree parent-child hierarchy and shouldn't it
 be capable of saving the state of parent clocks (like mux clocks) etc?

 Stated diffrently, it still seems to me like we're pushing functionality
 in PM core notifiers that should be the responsibility of subsystem
 drivers.

 It might not to be the prettiest solution, nevertheless I couldn't come
 up with a better one which would satisfy all the requirements.  The power
 domain should only be provided for use with all the clk/PMU sequences
 handling in place.

 Clocks need to also be touched before a power domain switch on or off,
 so attaching the clock controller to some power domain wouldn't help,
 unless we modify/add to existing power domain related callbacks for
 devices.  Another issue is the clock controller device would need to
 be attached to multiple power domains, and for each power domain the
 power on/off sequence is usually slightly different.

 There are also hierarchical power domains where each: the master and
 the sub-domain need they own sequence and device usually is attached
 only to a sub-domain.

 Even earlier post by Sylwester (https://lkml.org/lkml/2014/8/5/182)
 also points to the need of this feature.

 Personally, I'm uncomfortable with notifiers like this because it
 suggests that underlying frameworks are not doing the right thing, or
 are not being used.  (I also don't like the implementation here where a
 single global notifier list is maintained by the core, but the notifiers
 are actually triggered by SoC specific code.)

 Yes right the global notifier block can be moved to per genpd structure.
 Also SoC trigger can be moved to core files.

 IIUC, the usage in this series seems to be that certain clock related
 registers need to be saved/restored across a power domain transition.

 Wouldn't an alternative solution be to add a feature to the clock driver
 such that the state of each clock is saved when the clock is disabled,
 and restored when the clock is enabled?   That would allow any clock
 context to survive any power domain transtion also, correct?

 I also thought about same. But the trigger point for this would be
 driver calling clk disable/enable and not the power domain. so this
 will lead to lot of save/restore for each power domain child.

 Even though we would have saved/restored at that points still the power
 domain driver would need to enforce some specific clock/PMU registers
 state before/after a power domain state transition. And this is what I
 found difficult with the existing APIs.

 This is what I'm not understanding.

 Why can't the power domain driver's power_on/power_off callback just
 call the PMU APIs and/or the clk_enable/_disable calls it needs

Re: [PATCH v2 3/6] drivers: soc: samsung: Fix a spelling mistake

2014-11-09 Thread amit daniel kachhap
On Sat, Nov 8, 2014 at 9:26 PM, Pankaj Dubey dubepankaj1...@gmail.com wrote:
 Hi Amit,


 On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
 This patches changes the name of exynos5_list_diable_wfi_wfe to
 exynos5_list_disable_wfi_wfe.


 Same change I have posted earlier [1] and Kukjin has taken same in his 
 for-next.

 1: http://www.spinics.net/lists/arm-kernel/msg372742.html
ok but this patch is still not visible in linux-next. I will rebase my
v3 patch series against Kukjin for-next

 Thanks,
 Pankaj Dubey


 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/soc/samsung/exynos-pmu.c |8 
  1 file changed, 4 insertions(+), 4 deletions(-)

 diff --git a/drivers/soc/samsung/exynos-pmu.c 
 b/drivers/soc/samsung/exynos-pmu.c
 index 35774e8..3832cda 100644
 --- a/drivers/soc/samsung/exynos-pmu.c
 +++ b/drivers/soc/samsung/exynos-pmu.c
 @@ -361,7 +361,7 @@ static unsigned int const exynos5_list_both_cnt_feed[] = 
 {
 EXYNOS5_TOP_PWR_SYSMEM_OPTION,
  };

 -static unsigned int const exynos5_list_diable_wfi_wfe[] = {
 +static unsigned int const exynos5_list_disable_wfi_wfe[] = {
 EXYNOS5_ARM_CORE1_OPTION,
 EXYNOS5_FSYS_ARM_OPTION,
 EXYNOS5_ISP_ARM_OPTION,
 @@ -392,11 +392,11 @@ static void exynos5_powerdown_conf(enum sys_powerdown 
 mode)
 /*
  * Disable WFI/WFE on XXX_OPTION
  */
 -   for (i = 0; i  ARRAY_SIZE(exynos5_list_diable_wfi_wfe); i++) {
 -   tmp = pmu_raw_readl(exynos5_list_diable_wfi_wfe[i]);
 +   for (i = 0; i  ARRAY_SIZE(exynos5_list_disable_wfi_wfe); i++) {
 +   tmp = pmu_raw_readl(exynos5_list_disable_wfi_wfe[i]);
 tmp = ~(EXYNOS5_OPTION_USE_STANDBYWFE |
  EXYNOS5_OPTION_USE_STANDBYWFI);
 -   pmu_raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
 +   pmu_raw_writel(tmp, exynos5_list_disable_wfi_wfe[i]);
 }
  }

 --
 1.7.9.5


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Re: [PATCH v2 2/6] drivers: soc: Add support for Exynos PMU driver

2014-11-09 Thread amit daniel kachhap
On Sat, Nov 8, 2014 at 10:45 PM, Pankaj Dubey pankaj.du...@samsung.com wrote:
 Hi Amit,

 On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
 This patch moves Exynos PMU driver implementation from arm/mach-exynos
 to drivers/soc/samsung. This driver is mainly used for setting misc bits of
 register from PMU IP of Exynos SoC which will be required to configure
 before Suspend/Resume. Currently all these settings are done in
 arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
 support,there is a need of DT based implementation of PMU driver.

 This driver uses already existing DT binding information.

 Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  arch/arm/mach-exynos/Makefile  |2 +-
  drivers/soc/Kconfig|1 +
  drivers/soc/Makefile   |1 +
  drivers/soc/samsung/Kconfig|   19 
 +++
  drivers/soc/samsung/Makefile   |1 +
  .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
  6 files changed, 23 insertions(+), 1 deletion(-)
  create mode 100644 drivers/soc/samsung/Kconfig
  create mode 100644 drivers/soc/samsung/Makefile
  rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

 diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
 index bcefb54..b91b382 100644
 --- a/arch/arm/mach-exynos/Makefile
 +++ b/arch/arm/mach-exynos/Makefile
 @@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
 -I$(srctree)/$(src)/include -I$(srctree)

  # Core

 -obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
 +obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o

  obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
  obj-$(CONFIG_PM_SLEEP) += suspend.o
 diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
 index 76d6bd4..90f33b9 100644
 --- a/drivers/soc/Kconfig
 +++ b/drivers/soc/Kconfig
 @@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
  source drivers/soc/qcom/Kconfig
  source drivers/soc/ti/Kconfig
  source drivers/soc/versatile/Kconfig
 +source drivers/soc/samsung/Kconfig

  endmenu
 diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
 index 063113d..44d220d 100644
 --- a/drivers/soc/Makefile
 +++ b/drivers/soc/Makefile
 @@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
  obj-$(CONFIG_ARCH_TEGRA)   += tegra/
  obj-$(CONFIG_SOC_TI)   += ti/
  obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
 +obj-$(CONFIG_ARCH_EXYNOS)  += samsung/
 diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
 new file mode 100644
 index 000..beb6dfc
 --- /dev/null
 +++ b/drivers/soc/samsung/Kconfig
 @@ -0,0 +1,19 @@
 +#
 +# SAMSUNG SOC drivers
 +#
 +menuconfig SOC_SAMSUNG
 +   bool Samsung SOC drivers support
 +
 +if SOC_SAMSUNG
 +
 +config MFD_EXYNOS_PMU

 MFD_EXYNOS_PMU? I think it should be only EXYNOS_PMU,
 as we are moving here in drivers/soc giving reason as it does not fit
 into MFD.

 +   tristate Support Exynos Power Management Unit

 I think this config should not be user visible config option, as I remember
 same was pointed out by Tomasz some times back.
I agree to some extent so set its property to default yes. But as this
is now a platform driver so I let it visible.

 +   depends on ARM || ARM64

 How about only making depends on ARCH_EXYNOS?
Right makes sense. Will post v3 with this change.

Regards,
Amit

 +   default y
 +   help
 + Exynos SoC have Power Management Unit (PMU) which controls power 
 and
 + operation state of Exynos SoC in two different ways. This driver
 + provides implementation of PMU driver and provides basic 
 functionality
 + required during these operation state.
 +
 +endif #SOC_SAMSUNG
 diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
 new file mode 100644
 index 000..9d30f61
 --- /dev/null
 +++ b/drivers/soc/samsung/Makefile
 @@ -0,0 +1 @@
 +obj-$(CONFIG_MFD_EXYNOS_PMU)   += exynos-pmu.o
 diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
 similarity index 100%
 rename from arch/arm/mach-exynos/pmu.c
 rename to drivers/soc/samsung/exynos-pmu.c
 --
 1.7.9.5


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Re: [PATCH v2 6/6] drivers: soc: samsung: Add support for Exynos7 pmu

2014-11-09 Thread amit daniel kachhap
On Sat, Nov 8, 2014 at 11:05 PM, Pankaj Dubey dubepankaj1...@gmail.com wrote:
 Hi Amit,

 On 8 November 2014 18:46, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
 Add PMU settings for exynos7. This is required for future suspend-to-ram,
 cpuidle and power domain support.

 Note: In this patch some static declarations lines are over 80
 characters per line for easy redability.

 Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Eunseok Choi es10.c...@samsung.com
 Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  .../devicetree/bindings/arm/samsung/pmu.txt|1 +
  drivers/soc/samsung/exynos-pmu.c   |  425 
 
  include/linux/soc/samsung/exynos-regs-pmu.h|  273 +
  3 files changed, 699 insertions(+)

 diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
 b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 index 1e1979b..67b2113 100644
 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 @@ -10,6 +10,7 @@ Properties:
- samsung,exynos5260-pmu - for Exynos5260 SoC.
- samsung,exynos5410-pmu - for Exynos5410 SoC,
- samsung,exynos5420-pmu - for Exynos5420 SoC.
 +  - samsung,exynos7-pmu - for Exynos7 SoC.
 second value must be always syscon.

   - reg : offset and length of the register set.
 diff --git a/drivers/soc/samsung/exynos-pmu.c 
 b/drivers/soc/samsung/exynos-pmu.c
 index a73c1ea..9416cfd 100644
 --- a/drivers/soc/samsung/exynos-pmu.c
 +++ b/drivers/soc/samsung/exynos-pmu.c
 @@ -11,6 +11,7 @@

  #include linux/io.h
  #include linux/of.h
 +#include linux/of_address.h
  #include linux/platform_device.h
  #include linux/mfd/core.h
  #include linux/soc/samsung/exynos-regs-pmu.h
 @@ -46,6 +47,7 @@ struct exynos_pmu_context {

  static void __iomem *pmu_base_addr;
  static struct exynos_pmu_context *pmu_context;
 +extern u32 exynos_get_eint_wake_mask(void);

  static inline void pmu_raw_writel(u32 val, u32 offset)
  {
 @@ -356,6 +358,211 @@ static const struct exynos_pmu_conf 
 exynos5250_pmu_config[] = {
 { PMU_TABLE_END,},
  };

 +static const struct exynos_pmu_conf exynos7_pmu_config[] = {
 +   /* { .offset = address offset, .val = { AFTR, LPA, SLEEP } } */

 Nit: address offset - offset

 +   { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG,   { 0x0, 0x0, 
 0x8 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0, 
 0x0 } },
 +   { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG,   { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG,   { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1, 
 0x0 } },
 +   { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 
 0x1 } },
 +   { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 
 0x0 } },
 +   { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG

[PATCH v2 0/6] exynos: Move pmu driver to driver/soc folder and add exynos7 support

2014-11-08 Thread Amit Daniel Kachhap
This patch series[1 - 6] performs,

1) Moves pmu driver to driver/soc/samsung folder. Some discussion happened about
   this in the v1 version. Finally adding it in driver/soc folder as it too SoC
   specific and not a general driver. Entire discussion can be found here (A).
2) Registers this driver as MFD client driver. This will be used by clients 
like exynos pm
   sleep and pm domain driver.
3) Add exynos7 PMU support.

Changes from V1:
* Move pmu driver in driver/soc/samsung folder
* Removed the power domain features. They will posted as a separate series.
* Added exynos7 PMU support.
* Link to v1 can be found here (B)

This patch has dependency on following patches posted earlier by Pankaj (C),
which is accepted by maintainer.

Patch 6 was earlier posted by Abhilash (D) which has been reposted here with 
some
extra changes.

This complete patch series is rebased on linux-next.

(A) - http://www.spinics.net/lists/linux-samsung-soc/msg38444.html
(B) - http://www.spinics.net/lists/linux-samsung-soc/msg38442.html
(C) - https://lkml.org/lkml/2014/10/6/581
(D) - http://www.spinics.net/lists/arm-kernel/msg358230.html 

Amit Daniel Kachhap (6):
  ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung
  drivers: soc: Add support for Exynos PMU driver
  drivers: soc: samsung: Fix a spelling mistake
  soc: samsung: exynos-pmu: Register exynos-pmu driver as a mfd driver
  driver: soc: exynos-pmu: Add an API to be called after wakeup
  drivers: soc: samsung: Add support for Exynos7 pmu

 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 arch/arm/mach-exynos/Makefile  |2 +-
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 +-
 arch/arm/mach-exynos/regs-pmu.h|  335 ---
 arch/arm/mach-exynos/suspend.c |3 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   19 +
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |  471 ++-
 .../linux/soc/samsung}/exynos-pmu.h|6 +
 include/linux/soc/samsung/exynos-regs-pmu.h|  608 
 15 files changed, 1109 insertions(+), 349 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/regs-pmu.h
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (50%)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (78%)
 create mode 100644 include/linux/soc/samsung/exynos-regs-pmu.h

-- 
1.7.9.5

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[PATCH v2 5/6] driver: soc: exynos-pmu: Add an API to be called after wakeup

2014-11-08 Thread Amit Daniel Kachhap
This patch adds an API exynos_sys_powerup_conf to be called
after system sleep wakeup. This is similar to currently existing API
exynos_sys_powerdown_conf.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c   |9 +
 include/linux/soc/samsung/exynos-pmu.h |1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 4a5eb50..a73c1ea 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -34,6 +34,7 @@ struct exynos_pmu_data {
 
void (*pmu_init)(void);
void (*powerdown_conf)(enum sys_powerdown);
+   void (*powerup_conf)(enum sys_powerdown);
 };
 
 struct exynos_pmu_context {
@@ -430,6 +431,14 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
}
 }
 
+void exynos_sys_powerup_conf(enum sys_powerdown mode)
+{
+   const struct exynos_pmu_data *pmu_data = pmu_context-pmu_data;
+
+   if (pmu_data-powerup_conf)
+   pmu_data-powerup_conf(mode);
+}
+
 static void exynos5250_pmu_init(void)
 {
unsigned int value;
diff --git a/include/linux/soc/samsung/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
index d2f4083..9a4b833 100644
--- a/include/linux/soc/samsung/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -25,5 +25,6 @@ struct pmu_dev_client_data {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_sys_powerup_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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[PATCH v2 6/6] drivers: soc: samsung: Add support for Exynos7 pmu

2014-11-08 Thread Amit Daniel Kachhap
Add PMU settings for exynos7. This is required for future suspend-to-ram,
cpuidle and power domain support.

Note: In this patch some static declarations lines are over 80
characters per line for easy redability.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Eunseok Choi es10.c...@samsung.com
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../devicetree/bindings/arm/samsung/pmu.txt|1 +
 drivers/soc/samsung/exynos-pmu.c   |  425 
 include/linux/soc/samsung/exynos-regs-pmu.h|  273 +
 3 files changed, 699 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
index 1e1979b..67b2113 100644
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -10,6 +10,7 @@ Properties:
   - samsung,exynos5260-pmu - for Exynos5260 SoC.
   - samsung,exynos5410-pmu - for Exynos5410 SoC,
   - samsung,exynos5420-pmu - for Exynos5420 SoC.
+  - samsung,exynos7-pmu - for Exynos7 SoC.
second value must be always syscon.
 
  - reg : offset and length of the register set.
diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index a73c1ea..9416cfd 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -11,6 +11,7 @@
 
 #include linux/io.h
 #include linux/of.h
+#include linux/of_address.h
 #include linux/platform_device.h
 #include linux/mfd/core.h
 #include linux/soc/samsung/exynos-regs-pmu.h
@@ -46,6 +47,7 @@ struct exynos_pmu_context {
 
 static void __iomem *pmu_base_addr;
 static struct exynos_pmu_context *pmu_context;
+extern u32 exynos_get_eint_wake_mask(void);
 
 static inline void pmu_raw_writel(u32 val, u32 offset)
 {
@@ -356,6 +358,211 @@ static const struct exynos_pmu_conf 
exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static const struct exynos_pmu_conf exynos7_pmu_config[] = {
+   /* { .offset = address offset, .val = { AFTR, LPA, SLEEP } } */
+   { EXYNOS7_ATLAS_CPU0_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU0_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU1_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU1_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU2_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU2_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_CPU3_SYS_PWR_REG,   { 0x0, 0x0, 0x8 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CENTRAL_SYS_PWR_REG,   { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_DIS_IRQ_ATLAS_CPU3_CPUSEQUENCER_SYS_PWR_REG,  { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_NONCPU_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_DBG_SYS_PWR_REG,{ 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_ATLAS_L2_SYS_PWR_REG, { 0x0, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_TOP_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_TOP_SYS_PWR_REG,{ 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CPUCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKSTOP_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_CLKRUN_CMU_MIF_SYS_PWR_REG,   { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_RESET_CMU_MIF_SYS_PWR_REG,{ 0x1, 0x1, 0x0 
} },
+   { EXYNOS7_DDRPHY_DLLLOCK_SYS_PWR_REG,   { 0x1, 0x1, 0x1 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_TOP_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_DISABLE_PLL_CMU_MIF_SYS_PWR_REG,  { 0x1, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_BUS_SYS_PWR_REG,  { 0x7, 0x0, 0x0 
} },
+   { EXYNOS7_TOP_RETENTION_SYS_PWR_REG,{ 0x1, 0x0, 0x1 
} },
+   { EXYNOS7_TOP_PWR_SYS_PWR_REG,  { 0x3, 0x0, 0x3

[PATCH v2 1/6] ARM: EXYNOS: Move pmu specific header files under linux/soc/samsung

2014-11-08 Thread Amit Daniel Kachhap
Moving Exynos PMU specific header file into include/linux/soc/samsung
thus updated affected files under mach-exynos to use new location of
these header files.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |4 ++--
 arch/arm/mach-exynos/pmu.c |5 ++---
 arch/arm/mach-exynos/suspend.c |3 ++-
 .../linux/soc/samsung}/exynos-pmu.h|0
 .../linux/soc/samsung/exynos-regs-pmu.h|0
 8 files changed, 9 insertions(+), 9 deletions(-)
 rename {arch/arm/mach-exynos = include/linux/soc/samsung}/exynos-pmu.h (100%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/soc/samsung/exynos-regs-pmu.h (100%)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a487e59..1be9e82 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include linux/platform_device.h
 #include linux/pm_domain.h
 #include linux/irqchip.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -29,7 +30,6 @@
 
 #include common.h
 #include mfc.h
-#include regs-pmu.h
 #include regs-sys.h
 
 void __iomem *pmu_base_addr;
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index dc9a764..f283bfd 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,12 +15,12 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cputype.h
 #include asm/cp15.h
 #include asm/mcpm.h
 
-#include regs-pmu.h
 #include common.h
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index adb36a8..a4c9d39 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include linux/smp.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/soc/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/cp15.h
@@ -30,7 +31,6 @@
 #include mach/map.h
 
 #include common.h
-#include regs-pmu.h
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 86f3ecd..1a981e0 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,8 @@
 #include linux/cpu_pm.h
 #include linux/io.h
 #include linux/err.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #include asm/firmware.h
 #include asm/smp_scu.h
@@ -26,8 +28,6 @@
 #include plat/pm-common.h
 
 #include common.h
-#include exynos-pmu.h
-#include regs-pmu.h
 #include regs-sys.h
 
 static inline void __iomem *exynos_boot_vector_addr(void)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1993e08..35774e8 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -12,9 +12,8 @@
 #include linux/io.h
 #include linux/of.h
 #include linux/platform_device.h
-
-#include exynos-pmu.h
-#include regs-pmu.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index f5d9773..6dba9bf 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -20,6 +20,8 @@
 #include linux/io.h
 #include linux/irqchip/arm-gic.h
 #include linux/err.h
+#include linux/soc/samsung/exynos-regs-pmu.h
+#include linux/soc/samsung/exynos-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -31,7 +33,6 @@
 #include plat/regs-srom.h
 
 #include common.h
-#include regs-pmu.h
 #include regs-sys.h
 
 #define S5P_CHECK_SLEEP 0x0BAD
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to include/linux/soc/samsung/exynos-pmu.h
diff --git a/arch/arm/mach-exynos/regs-pmu.h 
b/include/linux/soc/samsung/exynos-regs-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/regs-pmu.h
rename to include/linux/soc/samsung/exynos-regs-pmu.h
-- 
1.7.9.5

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[PATCH v2 2/6] drivers: soc: Add support for Exynos PMU driver

2014-11-08 Thread Amit Daniel Kachhap
This patch moves Exynos PMU driver implementation from arm/mach-exynos
to drivers/soc/samsung. This driver is mainly used for setting misc bits of
register from PMU IP of Exynos SoC which will be required to configure
before Suspend/Resume. Currently all these settings are done in
arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC
support,there is a need of DT based implementation of PMU driver.

This driver uses already existing DT binding information.

Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |2 +-
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   19 +++
 drivers/soc/samsung/Makefile   |1 +
 .../pmu.c = drivers/soc/samsung/exynos-pmu.c  |0
 6 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename arch/arm/mach-exynos/pmu.c = drivers/soc/samsung/exynos-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcefb54..b91b382 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..90f33b9 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
 source drivers/soc/qcom/Kconfig
 source drivers/soc/ti/Kconfig
 source drivers/soc/versatile/Kconfig
+source drivers/soc/samsung/Kconfig
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..44d220d 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
 obj-$(CONFIG_SOC_TI)   += ti/
 obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
+obj-$(CONFIG_ARCH_EXYNOS)  += samsung/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..beb6dfc
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,19 @@
+#
+# SAMSUNG SOC drivers
+#
+menuconfig SOC_SAMSUNG
+   bool Samsung SOC drivers support
+
+if SOC_SAMSUNG
+
+config MFD_EXYNOS_PMU
+   tristate Support Exynos Power Management Unit
+   depends on ARM || ARM64
+   default y
+   help
+ Exynos SoC have Power Management Unit (PMU) which controls power and
+ operation state of Exynos SoC in two different ways. This driver
+ provides implementation of PMU driver and provides basic functionality
+ required during these operation state.
+
+endif #SOC_SAMSUNG
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..9d30f61
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_MFD_EXYNOS_PMU)   += exynos-pmu.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/soc/samsung/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/soc/samsung/exynos-pmu.c
-- 
1.7.9.5

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[PATCH v2 4/6] soc: samsung: exynos-pmu: Register exynos-pmu driver as a mfd driver

2014-11-08 Thread Amit Daniel Kachhap
This can be used later to probe and configure PMU client drivers
like pm domain, pm sleep etc. A global structure pmu_dev_client_data is
created to pass exynos-pmu platform data to all the clients. Currently
the data passed is register base addresses.
Although the exynos-pmu driver also provides the sysreg interfaces to
provide register base addresses but this is costlier than readl/writel,
so both the interfaces are provided to mfd based exynos-pmu client
drivers.

Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c   |   24 
 include/linux/soc/samsung/exynos-pmu.h |5 +
 2 files changed, 29 insertions(+)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 3832cda..4a5eb50 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -12,11 +12,17 @@
 #include linux/io.h
 #include linux/of.h
 #include linux/platform_device.h
+#include linux/mfd/core.h
 #include linux/soc/samsung/exynos-regs-pmu.h
 #include linux/soc/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
+enum pmu_mfd_list {
+   MFD_POWER_DOMAIN,
+   MFD_MAX,
+};
+
 struct exynos_pmu_conf {
unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
@@ -33,6 +39,8 @@ struct exynos_pmu_data {
 struct exynos_pmu_context {
struct device *dev;
const struct exynos_pmu_data *pmu_data;
+   struct mfd_cell cells[MFD_MAX];
+   struct pmu_dev_client_data mfd_data;
 };
 
 static void __iomem *pmu_base_addr;
@@ -482,6 +490,8 @@ static int exynos_pmu_probe(struct platform_device *pdev)
const struct of_device_id *match;
struct device *dev = pdev-dev;
struct resource *res;
+   struct mfd_cell *cell;
+   int ret;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pmu_base_addr = devm_ioremap_resource(dev, res);
@@ -506,6 +516,20 @@ static int exynos_pmu_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, pmu_context);
 
+   /* Initialize and invoke mfd clients */
+   cell = pmu_context-cells[MFD_POWER_DOMAIN];
+   cell-name = exynos-pmu-sleep;
+   pmu_context-mfd_data.mem_base_addr = pmu_base_addr;
+   pmu_context-mfd_data.mem_size = resource_size(res);
+   cell-platform_data = pmu_context-mfd_data;
+   cell-pdata_size = sizeof(pmu_context-mfd_data);
+   ret = mfd_add_devices(pdev-dev, pdev-id, pmu_context-cells, MFD_MAX,
+   NULL, 0, NULL);
+   if (ret) {
+   dev_err(pdev-dev, fail to register client devices\n);
+   return ret;
+   }
+
dev_dbg(dev, Exynos PMU Driver probe done\n);
return 0;
 }
diff --git a/include/linux/soc/samsung/exynos-pmu.h 
b/include/linux/soc/samsung/exynos-pmu.h
index a2ab0d5..d2f4083 100644
--- a/include/linux/soc/samsung/exynos-pmu.h
+++ b/include/linux/soc/samsung/exynos-pmu.h
@@ -19,6 +19,11 @@ enum sys_powerdown {
NUM_SYS_POWERDOWN,
 };
 
+struct pmu_dev_client_data {
+   void __iomem *mem_base_addr;
+   unsigned int mem_size;
+};
+
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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[PATCH v2 3/6] drivers: soc: samsung: Fix a spelling mistake

2014-11-08 Thread Amit Daniel Kachhap
This patches changes the name of exynos5_list_diable_wfi_wfe to
exynos5_list_disable_wfi_wfe.

Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/exynos-pmu.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c
index 35774e8..3832cda 100644
--- a/drivers/soc/samsung/exynos-pmu.c
+++ b/drivers/soc/samsung/exynos-pmu.c
@@ -361,7 +361,7 @@ static unsigned int const exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
 };
 
-static unsigned int const exynos5_list_diable_wfi_wfe[] = {
+static unsigned int const exynos5_list_disable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,
@@ -392,11 +392,11 @@ static void exynos5_powerdown_conf(enum sys_powerdown 
mode)
/*
 * Disable WFI/WFE on XXX_OPTION
 */
-   for (i = 0; i  ARRAY_SIZE(exynos5_list_diable_wfi_wfe); i++) {
-   tmp = pmu_raw_readl(exynos5_list_diable_wfi_wfe[i]);
+   for (i = 0; i  ARRAY_SIZE(exynos5_list_disable_wfi_wfe); i++) {
+   tmp = pmu_raw_readl(exynos5_list_disable_wfi_wfe[i]);
tmp = ~(EXYNOS5_OPTION_USE_STANDBYWFE |
 EXYNOS5_OPTION_USE_STANDBYWFI);
-   pmu_raw_writel(tmp, exynos5_list_diable_wfi_wfe[i]);
+   pmu_raw_writel(tmp, exynos5_list_disable_wfi_wfe[i]);
}
 }
 
-- 
1.7.9.5

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Re: [PATCH 02/12] drivers: mfd: Add support for Exynos PMU driver

2014-11-05 Thread amit daniel kachhap
On Thu, Nov 6, 2014 at 11:18 AM, Pankaj Dubey pankaj.du...@samsung.com wrote:
 On Wednesday, November 05, 2014 7:18 PM, Sylwester Nawrocki wrote:
 On 04/11/14 04:18, Pankaj Dubey wrote:
  2: Since PM domain relies on PMU registers and does not have its own
  DT binding, MFD client and MFD device is most suitable for making
  this kind of platform drivers.

 We have DT binding for the Exynos power domains:
 Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 In fact the IO memory regions used in the power domain bindings fall
 within the
 (sparse) PMU registers region.


 Correct. But currently there is no platform driver for those DT bindings so 
 we have two options:
 1) Register a new platform driver for each of those DT nodes, which are using 
 a very small subset of PMU register region. And we end up getting platform 
 driver's probe for each pd nodes.
 2) Register an Exynos power domain driver which will be a client driver of 
 main Exynos PMU driver, and will get platform data from it. And in this probe 
 parse all pd device nodes and populate all related information from those 
 nodes into Exynos_pm_domain struct instances and keep list of these 
 instances. Same has been proposed in Amit's patch.

 I would prefer second method, as next, we can move pm sleep functionality 
 (which also uses PMU register sets) also into such small mfd client driver. 
 And as far as I know for pm sleep currently there is no DT nodes.

 There is also DT binding for the PMU subsystem:
 Documentation/devicetree/bindings/arm/samsung/pmu.txt

 Yes, and currently I have used same binding to convert PMU implementation 
 into a platform driver [1]. Now what we trying to address is same PMU 
 implementation can be reused for ARM64 based SoC if we have to move it into 
 drivers/mfd/ or drivers/power/ or may be drivers/soc.

 [1]: http://www.spinics.net/lists/linux-samsung-soc/msg37572.html

 Currently we moved into drivers/mfd and patches from Amit shows an use case 
 where power domain implementation has been converted into platform driver, 
 but its probe will be called by MFD subsystem and will not be bind to DT 
 nodes of pd  as it will be a client device to main PMU device. Please check 
 this [2], [3].

 [2]: http://www.spinics.net/lists/linux-samsung-soc/msg38446.html
 [3]: http://www.spinics.net/lists/linux-samsung-soc/msg38447.html


 I guess a platform device driver in drivers/power would be a better
 fit than drivers/mfd. I doubt introducing an mfd driver now makes much
 sense, we have already DT bindings for PHYs, the power domains, etc.


 The reason behind making it a mfd driver is, to make following design for pm 
 domain and pm sleep functionality.
  --
 | Exynos - PMU  |
 | MFD device  |
 | drivers/mfd/ |
 
 |
   ---
 |   |
   ---   
 
 |  Exynos -pd | |   Exynos - pm-sleep 
 |
 |  PMU's client device| |   PMU's client device  |
 | (drivers/soc/samsung/) |  | (drivers/soc/samsung/) |
 
 -
I will post this sleep driver shortly. I also suggest to keep
everything in drivers/soc/samsung as all these drivers very much SoC
specific.

 As Lee mentioned MFD can be used to register the device ( I am assuming he is 
 referring to use of  mfd_add_devices from Exynos -PMU driver, to make it a 
 mfd device) but it should be kept outside of drivers/mfd. I just looked for 
 current users of mfd_add_devices but only drivers from drivers/mfd only 
 are calling this API, also once we call this API it will become an MFD device 
 then why not keep into drivers/mfd or maybe I have little understanding of 
 purpose of drivers/mfd.

 But still if it's OK to register Exynos -PMU as MFD device even if it's not 
 in drivers/mfd folder, then I would suggest better to keep it in 
 drivers/soc/samsung/ as it's very much SoC specific. As drivers/power 
 looks like place to keep external power supply drivers such as batteries, AC, 
 USB etc.

 Thanks,
 Pankaj Dubey

 --
 Thanks,
 Sylwester

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Re: [PATCH 03/12] PM / Domains: Add notifier support for power domain transitions

2014-11-03 Thread amit daniel kachhap
On Mon, Nov 3, 2014 at 11:51 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
 Hi,

 Cc: Ulf, Kevin, Geert.

 On 03/11/14 04:53, Amit Daniel Kachhap wrote:
 These power domain transition notifiers will assist in carrying
 out some activity associated with domain power on/off such as
 some registers which may lose its contents and need save/restore
 across domain power off/on.

 Other specific use cases I could add here is gating selected clocks
 to ensure proper signal propagation for devices attached to a power
 domain, e.g. ungating selected clocks before the power domain on and
 restoring them to previous state after the power domain was switched
 on.
yes correct.

 4 type of notifications are added,
 GPD_OFF_PRE - GPD state before power off
 GPD_OFF_POST- GPD state after power off
 GPD_ON_PRE  - GPD state before power off
 GPD_ON_POST - GPD state after power off

 3 notfication API's are exported.
 1) int genpd_register_notifier(struct notifier_block *nb, char *pd_name);
 2) int genpd_unregister_notifier(struct notifier_block *nb, char *pd_name);
 3) void genpd_invoke_transition_notifier(struct generic_pm_domain *genpd,
   enum gpd_on_off_state state);

 In this approach the notifiers are registered/unregistered with pd name.
 The actual invoking of the notfiers will be done by the platform implementing
 power domain enable/disable low level handlers according to the above
 defined notification types. This approach will considerably reduce the
 number of call to notifiers as compared to calling always from core
 powerdomain subsystem.

 Also the registered domain's will be managed inside a cache list and not
 part of the genpd structure. This will help in registration of notifiers from
 subsystems (such as clock) even when the PD subsystem is still not 
 initialised.
 This list also filters out the unregistered pd's requesting notification.

 This patch is somewhat similar my patch adding power domain state change
 notifications [1].  I have already a reworked version of that patch, with the
 notifier list moved to struct generic_pm_domain and using genpd-lock instead

Yes this will be correct as others also suggested to make per genpd
notifier block.

 of dev-power.lock.  Anyway, while I'd leave the decision about the location
 from where the notifier chains are supposed to be called to the subsystem's
 maintainers preference, I'm rather reluctant to having one global notifiers
 list for all possible power domains and all the notification clients.
 The possibly long list needs to be traversed at each notifier call and it
 seems in your implementation any registered user of the notification gets
 notifications for all possible power domains.

 [1] https://lkml.org/lkml/2014/8/5/182
My fault, I somehow missed this link earlier. After going through
this, I found it registers genpd from the platform driver, so the
function signature is
int pm_genpd_register_notifier(struct device *dev, struct notifier_block *nb);
I suggest to make the function signature to be like,
int pm_genpd_register_notifier(struct device_node *np, struct
notifier_block *nb)

In this way this function should should be able to support both
platform devices and non platform devices like clk.

The function may work like,

pdev = of_find_device_by_node(np);
if (pdev) {
 //  get genpd from device and go ahead with notfier registration.
 // blocking_notifier_chain_register(genpd-pd_notifier, nb)
} else
{
// get pd_handle from np
// get the pd_name from phandle and try registering this gen pd
// if the genpd subsystem is not initialised then add this in
a temporary list and register the notifier later
}

Can you post your implementation with 1st part ? Later I can post the
else part with my changes.


 Cc: Rafael J. Wysocki rafael.j.wyso...@intel.com
 Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/base/power/domain.c |  112 
 ++-
  include/linux/pm_domain.h   |   31 
  2 files changed, 142 insertions(+), 1 deletion(-)

 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
 index 40bc2f4..e05045e 100644
 --- a/drivers/base/power/domain.c
 +++ b/drivers/base/power/domain.c
 @@ -46,10 +46,19 @@
   __retval;  
  \
  })

 +struct cache_notify_domains {
 + char *name;
 + /* Node in the cache pm domain name list */
 + struct list_head cache_list_node;
 +};
 +
  static LIST_HEAD(gpd_list);
  static DEFINE_MUTEX(gpd_list_lock);
 +static LIST_HEAD(domain_notify_list);
 +static DEFINE_MUTEX(domain_notify_list_lock);
 +static BLOCKING_NOTIFIER_HEAD(genpd_transition_notifier_list);

 -static struct generic_pm_domain *pm_genpd_lookup_name(const char 
 *domain_name)
 +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
  {
   struct

Re: [PATCH 03/12] PM / Domains: Add notifier support for power domain transitions

2014-11-03 Thread amit daniel kachhap
On Mon, Nov 3, 2014 at 8:22 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
 On 3 November 2014 15:54, Rafael J. Wysocki r...@rjwysocki.net wrote:
 CC: Kevin, Ulf, Geert.

 On Monday, November 03, 2014 09:23:01 AM Amit Daniel Kachhap wrote:
 These power domain transition notifiers will assist in carrying
 out some activity associated with domain power on/off such as
 some registers which may lose its contents and need save/restore
 across domain power off/on.

 Hi Amit,

 This mechanism seems to be needed - somehow.
 A similar approach has been posted earlier, I am not sure that
 discussion was fully settled though.

 http://marc.info/?l=linux-pmm=136448756308203w=2
Missed looking into it. Thanks for the pointer.

 Anyway, I plan to review this shortly.
Sure.

 Kind regards
 Uffe


 4 type of notifications are added,
 GPD_OFF_PRE - GPD state before power off
 GPD_OFF_POST- GPD state after power off
 GPD_ON_PRE  - GPD state before power off
 GPD_ON_POST - GPD state after power off

 3 notfication API's are exported.
 1) int genpd_register_notifier(struct notifier_block *nb, char *pd_name);
 2) int genpd_unregister_notifier(struct notifier_block *nb, char *pd_name);
 3) void genpd_invoke_transition_notifier(struct generic_pm_domain *genpd,
   enum gpd_on_off_state state);

 In this approach the notifiers are registered/unregistered with pd name.
 The actual invoking of the notfiers will be done by the platform 
 implementing
 power domain enable/disable low level handlers according to the above
 defined notification types. This approach will considerably reduce the
 number of call to notifiers as compared to calling always from core
 powerdomain subsystem.

 Also the registered domain's will be managed inside a cache list and not
 part of the genpd structure. This will help in registration of notifiers 
 from
 subsystems (such as clock) even when the PD subsystem is still not 
 initialised.
 This list also filters out the unregistered pd's requesting notification.

 Cc: Rafael J. Wysocki rafael.j.wyso...@intel.com
 Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/base/power/domain.c |  112 
 ++-
  include/linux/pm_domain.h   |   31 
  2 files changed, 142 insertions(+), 1 deletion(-)

 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
 index 40bc2f4..e05045e 100644
 --- a/drivers/base/power/domain.c
 +++ b/drivers/base/power/domain.c
 @@ -46,10 +46,19 @@
   __retval; 
   \
  })

 +struct cache_notify_domains {
 + char *name;
 + /* Node in the cache pm domain name list */
 + struct list_head cache_list_node;
 +};
 +
  static LIST_HEAD(gpd_list);
  static DEFINE_MUTEX(gpd_list_lock);
 +static LIST_HEAD(domain_notify_list);
 +static DEFINE_MUTEX(domain_notify_list_lock);
 +static BLOCKING_NOTIFIER_HEAD(genpd_transition_notifier_list);

 -static struct generic_pm_domain *pm_genpd_lookup_name(const char 
 *domain_name)
 +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
  {
   struct generic_pm_domain *genpd = NULL, *gpd;

 @@ -66,6 +75,7 @@ static struct generic_pm_domain 
 *pm_genpd_lookup_name(const char *domain_name)
   mutex_unlock(gpd_list_lock);
   return genpd;
  }
 +EXPORT_SYMBOL_GPL(pm_genpd_lookup_name);

  struct generic_pm_domain *dev_to_genpd(struct device *dev)
  {
 @@ -1908,6 +1918,106 @@ void pm_genpd_init(struct generic_pm_domain *genpd,
   mutex_unlock(gpd_list_lock);
  }

 +/**
 + * genpd_register_notifier - Register a PM domain for future notification.
 + * @nb: notification block containing notification handle.
 + * @pd_name: PM domain name.
 + */
 +int genpd_register_notifier(struct notifier_block *nb, char *pd_name)
 +{
 + int ret;
 + struct cache_notify_domains *entry;
 +
 + if (!pd_name)
 + return -EINVAL;
 +
 + /* Search if the pd is already registered */
 + mutex_lock(domain_notify_list_lock);
 + list_for_each_entry(entry, domain_notify_list, cache_list_node) {
 + if (!strcmp(entry-name, pd_name))
 + break;
 + }
 + mutex_unlock(domain_notify_list_lock);
 +
 + if (entry) {
 + pr_err(%s: pd already exists\n, __func__);
 + return -EINVAL;
 + }
 +
 + entry = kzalloc(sizeof(*entry), GFP_KERNEL);
 + if (!entry)
 + return -ENOMEM;
 +
 + entry-name = pd_name;
 +
 + mutex_lock(domain_notify_list_lock);
 + list_add(entry-cache_list_node, domain_notify_list);
 + mutex_unlock(domain_notify_list_lock);
 + ret = blocking_notifier_chain_register(
 + genpd_transition_notifier_list, nb);
 + return ret;
 +}
 +
 +/**
 + * genpd_unregister_notifier - Un-register a PM domain for future 
 notification.
 + * @nb: notification block

Re: [PATCH 03/12] PM / Domains: Add notifier support for power domain transitions

2014-11-03 Thread amit daniel kachhap
On Mon, Nov 3, 2014 at 11:53 PM, Kevin Hilman khil...@kernel.org wrote:
 +Mike Turquette

 Hi Amit,

 Rafael J. Wysocki r...@rjwysocki.net writes:

 CC: Kevin, Ulf, Geert.

 On Monday, November 03, 2014 09:23:01 AM Amit Daniel Kachhap wrote:
 These power domain transition notifiers will assist in carrying
 out some activity associated with domain power on/off such as
 some registers which may lose its contents and need save/restore
 across domain power off/on.

 The runtime PM framework already provides callbacks that are useful for
 context save/restore for devices.  Could you please describe in more
 detail which registers in which kind of devices need to be
 saved/restored, and why they cannot be saved/restored using existing
 mechanisms.
Basically the requirement is mandated by exynos7 manual. It tells that
before turning off the power domain, some clock registers need to saved
and should be restored just after turning the power domain. These clock
registers are not necessarily gate clocks but could be mux clocks etc.
The driver may not have all information of these clocks also. I suppose
these are Soc specific changes but drivers should work across Socs.
This behavior is almost similar to suspend/resume case where a whole
list of clock registers are saved/restored.

Even earlier post by Sylwester (https://lkml.org/lkml/2014/8/5/182) also points
to the need of this feature.

 Personally, I'm uncomfortable with notifiers like this because it
 suggests that underlying frameworks are not doing the right thing, or
 are not being used.  (I also don't like the implementation here where a
 single global notifier list is maintained by the core, but the notifiers
 are actually triggered by SoC specific code.)
Yes right the global notifier block can be moved to per genpd structure.
Also SoC trigger can be moved to core files.

 IIUC, the usage in this series seems to be that certain clock related
 registers need to be saved/restored across a power domain transition.

 Wouldn't an alternative solution be to add a feature to the clock driver
 such that the state of each clock is saved when the clock is disabled,
 and restored when the clock is enabled?   That would allow any clock
 context to survive any power domain transtion also, correct?
I also thought about same. But the trigger point for this would be
driver calling
clk disable/enable and not the power domain. so this will lead to lot of
save/restore for each power domain child.

 I have some issues with the implementaion as well, but I think we need
 to first sort out the real need for this before going into those
 details.
right :( may be I should have posted this as RFC
Thanks for the review.

Regards,
Amit D

 Kevin

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[PATCH 00/12] soc: samsung: Modify and enhance power domain driver

2014-11-02 Thread Amit Daniel Kachhap
This patch series[3 - 12] performs several implementations as described below,

1) Converts power domain driver to platform driver.
2) Registers this driver as MFD client driver.
3) Moves them into driver/soc/samsung folder.
4) Add new power domain notifier feature.
5) Uses those notfier from exynos clk.
6) Adds parent power domain and some other features mostly for exynos7 
platforms.

This patch will change the DT representation of all the exynos power domain
DT nodes which will be posted as a new patch series.

This patch has dependency on following patches posted earlier and most of them 
are
already accepted or in final stages of review.
1) http://www.spinics.net/lists/linux-samsung-soc/msg37050.html
2) https://lkml.org/lkml/2014/10/6/581

Patches 1-2 are from Pankaj and have been posted earlier.
(http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/271555.html
They are kept in this patch series for completeness after rebase fixes.

This complete patch series is rebased on linux-next as it involves many
subsystems.

Amit Daniel Kachhap (10):
  PM / Domains: Add notifier support for power domain transitions
  mfd: exynos-pmu: Register exynos-pmu driver as a mfd driver
  arm: exynos: Add platform driver support for power domain driver
  soc: exynos: Move exynos power domain file to driver/soc/samsung
folder
  soc: samsung: pm_domain: Use compatible name for power domain name
  soc: samsung: pm_domain: Add a new parameter for power configuration
  soc: samsung: pm_domain: Add support for parent power domain
  soc: samsung: pm_domain: Use the recently added PM Domain notifiers
  clk: samsung: save and restore clock registers for power domain
  arm64: Kconfig: Enable PM_GENERIC_DOMAINS for exynos7

Pankaj Dubey (2):
  ARM: EXYNOS: Move pmu specific header files under linux/mfd/samsung
  drivers: mfd: Add support for Exynos PMU driver

 .../bindings/arm/exynos/power_domain.txt   |   21 +++-
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/Makefile  |3 +-
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |5 +-
 arch/arm/mach-exynos/suspend.c |3 +-
 arch/arm64/Kconfig |1 +
 drivers/base/power/domain.c|  112 +-
 drivers/clk/samsung/clk.c  |   66 +++
 drivers/clk/samsung/clk.h  |   14 +++
 drivers/mfd/Kconfig|9 ++
 drivers/mfd/Makefile   |1 +
 .../mach-exynos/pmu.c = drivers/mfd/exynos-pmu.c  |   30 -
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   11 ++
 drivers/soc/samsung/Makefile   |1 +
 .../soc/samsung}/pm_domains.c  |  124 
 .../linux/mfd/samsung}/exynos-pmu.h|5 +
 .../linux/mfd/samsung/exynos-regs-pmu.h|0
 include/linux/pm_domain.h  |   31 +
 23 files changed, 409 insertions(+), 37 deletions(-)
 rename arch/arm/mach-exynos/pmu.c = drivers/mfd/exynos-pmu.c (96%)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename {arch/arm/mach-exynos = drivers/soc/samsung}/pm_domains.c (51%)
 rename {arch/arm/mach-exynos = include/linux/mfd/samsung}/exynos-pmu.h (86%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/mfd/samsung/exynos-regs-pmu.h (100%)

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1.7.9.5

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[PATCH 01/12] ARM: EXYNOS: Move pmu specific header files under linux/mfd/samsung

2014-11-02 Thread Amit Daniel Kachhap
From: Pankaj Dubey pankaj.du...@samsung.com

Moving Exynos PMU specific header file into include/linux/mfd/samsung
thus updated affected files under mach-exynos to use new location of
these header files.

CC: Sangbeom Kim sbki...@samsung.com
CC: Samuel Ortiz sa...@linux.intel.com
CC: Lee Jones lee.jo...@linaro.org
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/exynos.c  |2 +-
 arch/arm/mach-exynos/mcpm-exynos.c |2 +-
 arch/arm/mach-exynos/platsmp.c |2 +-
 arch/arm/mach-exynos/pm.c  |5 +++--
 arch/arm/mach-exynos/pmu.c |5 ++---
 arch/arm/mach-exynos/suspend.c |3 ++-
 .../linux/mfd/samsung}/exynos-pmu.h|0
 .../linux/mfd/samsung/exynos-regs-pmu.h|0
 8 files changed, 10 insertions(+), 9 deletions(-)
 rename {arch/arm/mach-exynos = include/linux/mfd/samsung}/exynos-pmu.h (100%)
 rename arch/arm/mach-exynos/regs-pmu.h = 
include/linux/mfd/samsung/exynos-regs-pmu.h (100%)

diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index a487e59..f6b8cb1 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -20,6 +20,7 @@
 #include linux/platform_device.h
 #include linux/pm_domain.h
 #include linux/irqchip.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -29,7 +30,6 @@
 
 #include common.h
 #include mfc.h
-#include regs-pmu.h
 #include regs-sys.h
 
 void __iomem *pmu_base_addr;
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c 
b/arch/arm/mach-exynos/mcpm-exynos.c
index dc9a764..5326b67 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,12 +15,12 @@
 #include linux/delay.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
 
 #include asm/cputype.h
 #include asm/cp15.h
 #include asm/mcpm.h
 
-#include regs-pmu.h
 #include common.h
 
 #define EXYNOS5420_CPUS_PER_CLUSTER4
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index adb36a8..16d6acd 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -20,6 +20,7 @@
 #include linux/smp.h
 #include linux/io.h
 #include linux/of_address.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/cp15.h
@@ -30,7 +31,6 @@
 #include mach/map.h
 
 #include common.h
-#include regs-pmu.h
 
 extern void exynos4_secondary_startup(void);
 
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 86f3ecd..8e0ffc3 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -18,6 +18,9 @@
 #include linux/cpu_pm.h
 #include linux/io.h
 #include linux/err.h
+#include linux/clk.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
+#include linux/mfd/samsung/exynos-pmu.h
 
 #include asm/firmware.h
 #include asm/smp_scu.h
@@ -26,8 +29,6 @@
 #include plat/pm-common.h
 
 #include common.h
-#include exynos-pmu.h
-#include regs-pmu.h
 #include regs-sys.h
 
 static inline void __iomem *exynos_boot_vector_addr(void)
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 1993e08..07019f0 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -12,9 +12,8 @@
 #include linux/io.h
 #include linux/of.h
 #include linux/platform_device.h
-
-#include exynos-pmu.h
-#include regs-pmu.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
+#include linux/mfd/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index f5d9773..df979f6 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -20,6 +20,8 @@
 #include linux/io.h
 #include linux/irqchip/arm-gic.h
 #include linux/err.h
+#include linux/mfd/samsung/exynos-pmu.h
+#include linux/mfd/samsung/exynos-regs-pmu.h
 
 #include asm/cacheflush.h
 #include asm/hardware/cache-l2x0.h
@@ -31,7 +33,6 @@
 #include plat/regs-srom.h
 
 #include common.h
-#include regs-pmu.h
 #include regs-sys.h
 
 #define S5P_CHECK_SLEEP 0x0BAD
diff --git a/arch/arm/mach-exynos/exynos-pmu.h 
b/include/linux/mfd/samsung/exynos-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/exynos-pmu.h
rename to include/linux/mfd/samsung/exynos-pmu.h
diff --git a/arch/arm/mach-exynos/regs-pmu.h 
b/include/linux/mfd/samsung/exynos-regs-pmu.h
similarity index 100%
rename from arch/arm/mach-exynos/regs-pmu.h
rename to include/linux/mfd/samsung/exynos-regs-pmu.h
-- 
1.7.9.5

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[PATCH 02/12] drivers: mfd: Add support for Exynos PMU driver

2014-11-02 Thread Amit Daniel Kachhap
From: Pankaj Dubey pankaj.du...@samsung.com

This patch moves Exynos PMU driver implementation from arm/mach-exynos
to drivers/mfd. This driver is mainly used for setting misc bits of
register from PMU IP of Exynos SoC which will be required to configure
before Suspend/Resume. Currently all these settings are done in
arch/arm/mach-exynos/pmu.c but moving ahead for ARM64 based SoC support,
there is a need of DT based implementation of PMU driver.

This driver uses already existing DT binding information.

CC: Sangbeom Kim sbki...@samsung.com
CC: Samuel Ortiz sa...@linux.intel.com
CC: Lee Jones lee.jo...@linaro.org
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/Makefile  |2 +-
 drivers/mfd/Kconfig|9 +
 drivers/mfd/Makefile   |1 +
 .../mach-exynos/pmu.c = drivers/mfd/exynos-pmu.c  |0
 5 files changed, 12 insertions(+), 1 deletion(-)
 rename arch/arm/mach-exynos/pmu.c = drivers/mfd/exynos-pmu.c (100%)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 96d56ab..c2aef3f 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -25,6 +25,7 @@ menuconfig ARCH_EXYNOS
select S5P_DEV_MFC
select SRAM
select MFD_SYSCON
+   select MFD_EXYNOS_PMU
help
  Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5)
 
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index bcefb54..b91b382 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -9,7 +9,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += 
-I$(srctree)/$(src)/include -I$(srctree)
 
 # Core
 
-obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o pmu.o exynos-smc.o firmware.o
+obj-$(CONFIG_ARCH_EXYNOS)  += exynos.o exynos-smc.o firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index cbdb109..619a9ba 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -1323,6 +1323,15 @@ config MFD_STW481X
  in various ST Microelectronics and ST-Ericsson embedded
  Nomadik series.
 
+config MFD_EXYNOS_PMU
+   tristate Support Exynos Power Management Unit
+   depends on ARM || ARM64
+   help
+ Exynos SoC have Power Management Unit (PMU) which controls power and
+ operation state of Exynos SoC in two different ways. This driver
+ provides implementation of PMU driver and provides basic functionality
+ required during these operation state.
+
 menu Multimedia Capabilities Port drivers
depends on ARCH_SA1100
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 8e679d6..33489b4 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -175,6 +175,7 @@ obj-$(CONFIG_MFD_STW481X)   += stw481x.o
 obj-$(CONFIG_MFD_IPAQ_MICRO)   += ipaq-micro.o
 obj-$(CONFIG_MFD_MENF21BMC)+= menf21bmc.o
 obj-$(CONFIG_MFD_HI6421_PMIC)  += hi6421-pmic-core.o
+obj-$(CONFIG_MFD_EXYNOS_PMU)   += exynos-pmu.o
 
 intel-soc-pmic-objs:= intel_soc_pmic_core.o intel_soc_pmic_crc.o
 obj-$(CONFIG_INTEL_SOC_PMIC)   += intel-soc-pmic.o
diff --git a/arch/arm/mach-exynos/pmu.c b/drivers/mfd/exynos-pmu.c
similarity index 100%
rename from arch/arm/mach-exynos/pmu.c
rename to drivers/mfd/exynos-pmu.c
-- 
1.7.9.5

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[PATCH 03/12] PM / Domains: Add notifier support for power domain transitions

2014-11-02 Thread Amit Daniel Kachhap
These power domain transition notifiers will assist in carrying
out some activity associated with domain power on/off such as
some registers which may lose its contents and need save/restore
across domain power off/on.

4 type of notifications are added,
GPD_OFF_PRE - GPD state before power off
GPD_OFF_POST- GPD state after power off
GPD_ON_PRE  - GPD state before power off
GPD_ON_POST - GPD state after power off

3 notfication API's are exported.
1) int genpd_register_notifier(struct notifier_block *nb, char *pd_name);
2) int genpd_unregister_notifier(struct notifier_block *nb, char *pd_name);
3) void genpd_invoke_transition_notifier(struct generic_pm_domain *genpd,
enum gpd_on_off_state state);

In this approach the notifiers are registered/unregistered with pd name.
The actual invoking of the notfiers will be done by the platform implementing
power domain enable/disable low level handlers according to the above
defined notification types. This approach will considerably reduce the
number of call to notifiers as compared to calling always from core
powerdomain subsystem.

Also the registered domain's will be managed inside a cache list and not
part of the genpd structure. This will help in registration of notifiers from
subsystems (such as clock) even when the PD subsystem is still not initialised.
This list also filters out the unregistered pd's requesting notification.

Cc: Rafael J. Wysocki rafael.j.wyso...@intel.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/base/power/domain.c |  112 ++-
 include/linux/pm_domain.h   |   31 
 2 files changed, 142 insertions(+), 1 deletion(-)

diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 40bc2f4..e05045e 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -46,10 +46,19 @@
__retval;   
\
 })
 
+struct cache_notify_domains {
+   char *name;
+   /* Node in the cache pm domain name list */
+   struct list_head cache_list_node;
+};
+
 static LIST_HEAD(gpd_list);
 static DEFINE_MUTEX(gpd_list_lock);
+static LIST_HEAD(domain_notify_list);
+static DEFINE_MUTEX(domain_notify_list_lock);
+static BLOCKING_NOTIFIER_HEAD(genpd_transition_notifier_list);
 
-static struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
+struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
 {
struct generic_pm_domain *genpd = NULL, *gpd;
 
@@ -66,6 +75,7 @@ static struct generic_pm_domain *pm_genpd_lookup_name(const 
char *domain_name)
mutex_unlock(gpd_list_lock);
return genpd;
 }
+EXPORT_SYMBOL_GPL(pm_genpd_lookup_name);
 
 struct generic_pm_domain *dev_to_genpd(struct device *dev)
 {
@@ -1908,6 +1918,106 @@ void pm_genpd_init(struct generic_pm_domain *genpd,
mutex_unlock(gpd_list_lock);
 }
 
+/**
+ * genpd_register_notifier - Register a PM domain for future notification.
+ * @nb: notification block containing notification handle.
+ * @pd_name: PM domain name.
+ */
+int genpd_register_notifier(struct notifier_block *nb, char *pd_name)
+{
+   int ret;
+   struct cache_notify_domains *entry;
+
+   if (!pd_name)
+   return -EINVAL;
+
+   /* Search if the pd is already registered */
+   mutex_lock(domain_notify_list_lock);
+   list_for_each_entry(entry, domain_notify_list, cache_list_node) {
+   if (!strcmp(entry-name, pd_name))
+   break;
+   }
+   mutex_unlock(domain_notify_list_lock);
+
+   if (entry) {
+   pr_err(%s: pd already exists\n, __func__);
+   return -EINVAL;
+   }
+
+   entry = kzalloc(sizeof(*entry), GFP_KERNEL);
+   if (!entry)
+   return -ENOMEM;
+
+   entry-name = pd_name;
+
+   mutex_lock(domain_notify_list_lock);
+   list_add(entry-cache_list_node, domain_notify_list);
+   mutex_unlock(domain_notify_list_lock);
+   ret = blocking_notifier_chain_register(
+   genpd_transition_notifier_list, nb);
+   return ret;
+}
+
+/**
+ * genpd_unregister_notifier - Un-register a PM domain for future notification.
+ * @nb: notification block containing notification handle.
+ * @pd_name: PM domain name.
+ */
+int genpd_unregister_notifier(struct notifier_block *nb, char *pd_name)
+{
+   int ret;
+   struct cache_notify_domains *entry;
+
+   mutex_lock(domain_notify_list_lock);
+   list_for_each_entry(entry, domain_notify_list, cache_list_node) {
+   if (!strcmp(entry-name, pd_name))
+   break;
+   }
+   if (!entry) {
+   mutex_unlock(domain_notify_list_lock);
+   pr_err(%s: Invalid pd name\n, __func__);
+   return -EINVAL;
+   }
+   list_del(entry

[PATCH 04/12] mfd: exynos-pmu: Register exynos-pmu driver as a mfd driver

2014-11-02 Thread Amit Daniel Kachhap
This can be used later to probe and configure PMU client drivers
like pm_domain etc.
A global structure pmu_dev_client_data is created to pass exynos-pmu
platform data to all the clients. Currently the data passed is register
base addresses.
Although the exynos-pmu driver also provides the sysreg interfaces to
provide register base addresses but this is costlier than readl/writel,
so both the interfaces are provided to mfd based exynos-pmu client
drivers.

Cc: Lee Jones lee.jo...@linaro.org
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/mfd/exynos-pmu.c   |   25 +
 include/linux/mfd/samsung/exynos-pmu.h |5 +
 2 files changed, 30 insertions(+)

diff --git a/drivers/mfd/exynos-pmu.c b/drivers/mfd/exynos-pmu.c
index 07019f0..c46f3f5 100644
--- a/drivers/mfd/exynos-pmu.c
+++ b/drivers/mfd/exynos-pmu.c
@@ -11,12 +11,19 @@
 
 #include linux/io.h
 #include linux/of.h
+#include linux/of_address.h
 #include linux/platform_device.h
+#include linux/mfd/core.h
 #include linux/mfd/samsung/exynos-regs-pmu.h
 #include linux/mfd/samsung/exynos-pmu.h
 
 #define PMU_TABLE_END  (-1U)
 
+enum pmu_mfd_list {
+   MFD_POWER_DOMAIN,
+   MFD_MAX,
+};
+
 struct exynos_pmu_conf {
unsigned int offset;
unsigned int val[NUM_SYS_POWERDOWN];
@@ -33,6 +40,8 @@ struct exynos_pmu_data {
 struct exynos_pmu_context {
struct device *dev;
const struct exynos_pmu_data *pmu_data;
+   struct mfd_cell cells[MFD_MAX];
+   struct pmu_dev_client_data mfd_data;
 };
 
 static void __iomem *pmu_base_addr;
@@ -482,6 +491,8 @@ static int exynos_pmu_probe(struct platform_device *pdev)
const struct of_device_id *match;
struct device *dev = pdev-dev;
struct resource *res;
+   struct mfd_cell *cell;
+   int ret;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pmu_base_addr = devm_ioremap_resource(dev, res);
@@ -506,6 +517,20 @@ static int exynos_pmu_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, pmu_context);
 
+   /* Initialize and invoke mfd clients */
+   cell = pmu_context-cells[MFD_POWER_DOMAIN];
+   cell-name = exynos-pmu-domain;
+   pmu_context-mfd_data.mem_base_addr = pmu_base_addr;
+   pmu_context-mfd_data.mem_size = resource_size(res);
+   cell-platform_data = pmu_context-mfd_data;
+   cell-pdata_size = sizeof(pmu_context-mfd_data);
+   ret = mfd_add_devices(pdev-dev, pdev-id, pmu_context-cells, MFD_MAX,
+   NULL, 0, NULL);
+   if (ret) {
+   dev_err(pdev-dev, fail to register client devices\n);
+   return ret;
+   }
+
dev_dbg(dev, Exynos PMU Driver probe done\n);
return 0;
 }
diff --git a/include/linux/mfd/samsung/exynos-pmu.h 
b/include/linux/mfd/samsung/exynos-pmu.h
index a2ab0d5..d2f4083 100644
--- a/include/linux/mfd/samsung/exynos-pmu.h
+++ b/include/linux/mfd/samsung/exynos-pmu.h
@@ -19,6 +19,11 @@ enum sys_powerdown {
NUM_SYS_POWERDOWN,
 };
 
+struct pmu_dev_client_data {
+   void __iomem *mem_base_addr;
+   unsigned int mem_size;
+};
+
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
 
 #endif /* __EXYNOS_PMU_H */
-- 
1.7.9.5

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[PATCH 05/12] arm: exynos: Add platform driver support for power domain driver

2014-11-02 Thread Amit Daniel Kachhap
This patch modifies Exynos Power Domain driver initialization
implementation in following way:

   - Added platform driver support and probe function where Exynos
 PM Domain driver will register itself as MFD PMU client
 driver.
   - This driver will now use the PMU base address with certain offset
 for power domain register address so reg property is not required.
 This change will avoid unnecessary ioremap of the power register.
   - PMU base address is directly accessed and syscon interface is
 not used as PM Domain driver is quite critical and syscon based
 lock protected register access(regmap) is not used.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |8 +--
 arch/arm/mach-exynos/pm_domains.c  |   59 ++--
 2 files changed, 47 insertions(+), 20 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index abde1ea..5599017 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -6,8 +6,8 @@ to gate power to one or more peripherals on the processor.
 Required Properties:
 - compatible: should be one of the following.
 * samsung,exynos4210-pd - for exynos4210 type power domain.
-- reg: physical base address of the controller and length of memory mapped
-region.
+- pd-offset: this gives the offset of PM power domain register from
+the PMU base address.
 - #power-domain-cells: number of cells in power domain specifier;
 must be 0.
 
@@ -30,13 +30,13 @@ Example:
 
lcd0: power-domain-lcd0 {
compatible = samsung,exynos4210-pd;
-   reg = 0x10023C00 0x10;
+   pd-offset = 0x3C00;
#power-domain-cells = 0;
};
 
mfc_pd: power-domain@10044060 {
compatible = samsung,exynos4210-pd;
-   reg = 0x10044060 0x20;
+   pd-offset = 0x4060;
clocks = clock CLK_FIN_PLL, clock CLK_MOUT_SW_ACLK333,
clock CLK_MOUT_USER_ACLK333;
clock-names = oscclk, pclk0, clk0;
diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index 20f2671..923eb57 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,6 +22,7 @@
 #include linux/of_address.h
 #include linux/of_platform.h
 #include linux/sched.h
+#include linux/mfd/samsung/exynos-pmu.h
 
 #define INT_LOCAL_PWR_EN   0x7
 #define MAX_CLK_PER_DOMAIN 4
@@ -105,33 +106,41 @@ static int exynos_pd_power_off(struct generic_pm_domain 
*domain)
return exynos_pd_power(domain, false);
 }
 
-static __init int exynos4_pm_init_power_domain(void)
+static int exynos_power_domain_probe(struct platform_device *pdev)
 {
-   struct platform_device *pdev;
struct device_node *np;
+   struct pmu_dev_client_data *pdata = NULL;
+   void __iomem *pmu_base_addr;
+   unsigned int offset;
+
+   pdata = pdev-dev.platform_data;
+   if (!pdata) {
+   dev_err(pdev-dev, No platform data passed\n);
+   return -EINVAL;
+   }
+
+   pmu_base_addr = pdata-mem_base_addr;
 
for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
struct exynos_pm_domain *pd;
int on, i;
-   struct device *dev;
 
-   pdev = of_find_device_by_node(np);
-   dev = pdev-dev;
-
-   pd = kzalloc(sizeof(*pd), GFP_KERNEL);
-   if (!pd) {
-   pr_err(%s: failed to allocate memory for domain\n,
-   __func__);
+   pd = devm_kzalloc(pdev-dev, sizeof(*pd), GFP_KERNEL);
+   if (!pd)
return -ENOMEM;
-   }
 
pd-pd.name = kstrdup(np-name, GFP_KERNEL);
pd-name = pd-pd.name;
-   pd-base = of_iomap(np, 0);
+   if (of_property_read_u32(np, pd-offset, offset)) {
+   pr_err(%s: failed to find offset for power domain\n,
+   __func__);
+   return -EINVAL;
+   }
+   pd-base = pmu_base_addr + offset;
pd-pd.power_off = exynos_pd_power_off;
pd-pd.power_on = exynos_pd_power_on;
 
-   pd-oscclk = clk_get(dev, oscclk);
+   pd-oscclk = of_clk_get_by_name(np, oscclk);
if (IS_ERR(pd-oscclk))
goto no_clk;
 
@@ -139,11 +148,11 @@ static __init int exynos4_pm_init_power_domain(void)
char clk_name[8];
 
snprintf(clk_name, sizeof(clk_name

[PATCH 06/12] soc: exynos: Move exynos power domain file to driver/soc/samsung folder

2014-11-02 Thread Amit Daniel Kachhap
This patch moves arch/arm/mach-exynos/pm_domains.c to driver/soc/samsung
folder. This will be useful to use it for both arm and arm64 platforms.
This file is moved in this directory as this driver is soc specific and
only used by exynos platforms.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm/mach-exynos/Makefile  |1 -
 drivers/soc/Kconfig|1 +
 drivers/soc/Makefile   |1 +
 drivers/soc/samsung/Kconfig|   11 +++
 drivers/soc/samsung/Makefile   |1 +
 .../soc/samsung}/pm_domains.c  |0
 6 files changed, 14 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/samsung/Kconfig
 create mode 100644 drivers/soc/samsung/Makefile
 rename {arch/arm/mach-exynos = drivers/soc/samsung}/pm_domains.c (100%)

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index b91b382..9ea6c54 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o 
firmware.o
 
 obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_PM_SLEEP) += suspend.o
-obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
 
 obj-$(CONFIG_SMP)  += platsmp.o headsmp.o
 
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..90f33b9 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -3,5 +3,6 @@ menu SOC (System On Chip) specific Drivers
 source drivers/soc/qcom/Kconfig
 source drivers/soc/ti/Kconfig
 source drivers/soc/versatile/Kconfig
+source drivers/soc/samsung/Kconfig
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..44d220d 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_ARCH_QCOM) += qcom/
 obj-$(CONFIG_ARCH_TEGRA)   += tegra/
 obj-$(CONFIG_SOC_TI)   += ti/
 obj-$(CONFIG_PLAT_VERSATILE)   += versatile/
+obj-$(CONFIG_ARCH_EXYNOS)  += samsung/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..1dc6a35
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,11 @@
+#
+# Samsung Soc drivers
+#
+config EXYNOS_POWER_DOMAIN
+   tristate Support Exynos PM Power Domain
+   depends on ARCH_EXYNOS  PM_GENERIC_DOMAINS
+   default y
+   help
+ Exynos SOC have power domain gating support. This driver implements 
that
+ functionality and registers all the necessary hooks to the generic 
power domain
+ core kernel infrastructure.
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..f4efce7
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_POWER_DOMAIN)  +=  pm_domains.o
diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/drivers/soc/samsung/pm_domains.c
similarity index 100%
rename from arch/arm/mach-exynos/pm_domains.c
rename to drivers/soc/samsung/pm_domains.c
-- 
1.7.9.5

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[PATCH 08/12] soc: samsung: pm_domain: Add a new parameter for power configuration

2014-11-02 Thread Amit Daniel Kachhap
This patch adds a new optional parameter pd-power-conf to fetch the
correct power configuration value. In exynos7 soc, this field is
different from previous exynos soc's.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |3 +++
 drivers/soc/samsung/pm_domains.c   |   13 +
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 7250a5c..07e4ffe 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -24,6 +24,8 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+- pd-power-conf: This optional parameter provides the local power configuration
+   value for the power domain.
 
 Node of a device using power domains must have a samsung,power-domain property
 defined with a phandle to respective power domain.
@@ -48,6 +50,7 @@ Example:
mfc_pd: power-domain@10044060 {
compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
pd-offset = 0x4060;
+   pd-power-conf = 0xf;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index e63d129..84a3f1f 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -34,6 +34,7 @@ struct exynos_pm_domain {
void __iomem *base;
char const *name;
bool is_off;
+   unsigned int pwr_conf_val;
struct generic_pm_domain pd;
struct clk *oscclk;
struct clk *clk[MAX_CLK_PER_DOMAIN];
@@ -63,13 +64,13 @@ static int exynos_pd_power(struct generic_pm_domain 
*domain, bool power_on)
}
}
 
-   pwr = power_on ? INT_LOCAL_PWR_EN : 0;
+   pwr = power_on ? pd-pwr_conf_val : 0;
__raw_writel(pwr, base);
 
/* Wait max 1ms */
timeout = 10;
 
-   while ((__raw_readl(base + 0x4)  INT_LOCAL_PWR_EN) != pwr) {
+   while ((__raw_readl(base + 0x4)  pd-pwr_conf_val) != pwr) {
if (!timeout) {
op = (power_on) ? enable : disable;
pr_err(Power domain %s %s failed\n, domain-name, op);
@@ -111,7 +112,7 @@ static int exynos_power_domain_probe(struct platform_device 
*pdev)
struct device_node *np;
struct pmu_dev_client_data *pdata = NULL;
void __iomem *pmu_base_addr;
-   unsigned int offset;
+   unsigned int offset, pwr_conf;
 
pdata = pdev-dev.platform_data;
if (!pdata) {
@@ -141,9 +142,13 @@ static int exynos_power_domain_probe(struct 
platform_device *pdev)
__func__);
return -EINVAL;
}
+   if (of_property_read_u32(np, pd-power-conf, pwr_conf))
+   pwr_conf = INT_LOCAL_PWR_EN;
+
pd-base = pmu_base_addr + offset;
pd-pd.power_off = exynos_pd_power_off;
pd-pd.power_on = exynos_pd_power_on;
+   pd-pwr_conf_val = pwr_conf;
 
pd-oscclk = of_clk_get_by_name(np, oscclk);
if (IS_ERR(pd-oscclk))
@@ -169,7 +174,7 @@ static int exynos_power_domain_probe(struct platform_device 
*pdev)
clk_put(pd-oscclk);
 
 no_clk:
-   on = __raw_readl(pd-base + 0x4)  INT_LOCAL_PWR_EN;
+   on = __raw_readl(pd-base + 0x4)  pwr_conf;
 
pm_genpd_init(pd-pd, NULL, !on);
of_genpd_add_provider_simple(np, pd-pd);
-- 
1.7.9.5

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[PATCH 07/12] soc: samsung: pm_domain: Use compatible name for power domain name

2014-11-02 Thread Amit Daniel Kachhap
This patch adds support for second optional compatible complate name. If
this compatible name is present then this name will be used to create
the Power Domain and not the DT node name.
The benefit of this approach is to hook the notifier to the correct
Power Domain.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |8 
 drivers/soc/samsung/pm_domains.c   |7 ++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 5599017..7250a5c 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -12,6 +12,8 @@ Required Properties:
 must be 0.
 
 Optional Properties:
+- compatible: This is a second compatible name and gives the complete Power 
Domain
+   name like samsung,exynos7-pd-mfc
 - clocks: List of clock handles. The parent clocks of the input clocks to the
devices in this power domain are set to oscclk before power gating
and restored back after powering on a domain. This is required for
@@ -43,5 +45,11 @@ Example:
#power-domain-cells = 0;
};
 
+   mfc_pd: power-domain@10044060 {
+   compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
+   pd-offset = 0x4060;
+   #power-domain-cells = 0;
+   };
+
 See Documentation/devicetree/bindings/power/power_domain.txt for description
 of consumer-side bindings.
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 923eb57..e63d129 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -124,12 +124,17 @@ static int exynos_power_domain_probe(struct 
platform_device *pdev)
for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
struct exynos_pm_domain *pd;
int on, i;
+   const char *name;
 
pd = devm_kzalloc(pdev-dev, sizeof(*pd), GFP_KERNEL);
if (!pd)
return -ENOMEM;
 
-   pd-pd.name = kstrdup(np-name, GFP_KERNEL);
+   if (of_property_read_string_index(np, compatible, 1, name)) {
+   /* Second entry not found, use the node name*/
+   name = np-name;
+   }
+   pd-pd.name = kstrdup(name, GFP_KERNEL);
pd-name = pd-pd.name;
if (of_property_read_u32(np, pd-offset, offset)) {
pr_err(%s: failed to find offset for power domain\n,
-- 
1.7.9.5

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[PATCH 09/12] soc: samsung: pm_domain: Add support for parent power domain

2014-11-02 Thread Amit Daniel Kachhap
This patch adds supports for parent power domain. This will ensure
invoking of parent/child power domain on/off in a correct sequence.
In exynos7 SOC's, power domain controllers have parent and child
hierarchy.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 .../bindings/arm/exynos/power_domain.txt   |2 +
 drivers/soc/samsung/pm_domains.c   |   42 +++-
 2 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 07e4ffe..07752a4 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -26,6 +26,7 @@ Optional Properties:
are supported currently.
 - pd-power-conf: This optional parameter provides the local power configuration
value for the power domain.
+- parent: phandle of parent power domain.
 
 Node of a device using power domains must have a samsung,power-domain property
 defined with a phandle to respective power domain.
@@ -51,6 +52,7 @@ Example:
compatible = samsung,exynos4210-pd, samsung,exynos7-pd-mfc;
pd-offset = 0x4060;
pd-power-conf = 0xf;
+   parent = pd_top;
#power-domain-cells = 0;
};
 
diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index 84a3f1f..f14f182 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -26,7 +26,7 @@
 
 #define INT_LOCAL_PWR_EN   0x7
 #define MAX_CLK_PER_DOMAIN 4
-
+#define MAX_PARENT_POWER_DOMAIN10
 /*
  * Exynos specific wrapper around the generic power domain
  */
@@ -179,7 +179,47 @@ no_clk:
pm_genpd_init(pd-pd, NULL, !on);
of_genpd_add_provider_simple(np, pd-pd);
}
+   /* Assign the child power domains to their parents */
+   for_each_compatible_node(np, NULL, samsung,exynos4210-pd) {
+   struct device_node *parent_np;
+   int i;
+   struct generic_pm_domain *child_domain, *parent_domain;
+   const char *name;
+
+   if (of_property_read_string_index(np, compatible, 1,
+   name)) {
+   /* Second entry not found, use the node name*/
+   name = np-name;
+   }
 
+   child_domain = pm_genpd_lookup_name(name);
+   if (!child_domain)
+   continue;
+   /* search parents in device tree */
+   for (i = 0; i  MAX_PARENT_POWER_DOMAIN; i++) {
+   parent_np = of_parse_phandle(np, parent, i);
+   if (!parent_np)
+   break;
+
+   if (of_property_read_string_index(parent_np,
+   compatible, 1, name)) {
+   /* Second entry not found, use the node name*/
+   name = parent_np-name;
+   }
+
+   parent_domain = pm_genpd_lookup_name(name);
+   if (!parent_domain)
+   break;
+   if (pm_genpd_add_subdomain(parent_domain, child_domain))
+   pr_err(%s failed to add subdomain: %s\n,
+   parent_domain-name,
+   child_domain-name);
+   else
+   pr_info(%s has as child subdomain: %s.\n,
+   parent_domain-name,
+   child_domain-name);
+   }
+   }
return 0;
 }
 
-- 
1.7.9.5

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[PATCH 11/12] clk: samsung: save and restore clock registers for power domain

2014-11-02 Thread Amit Daniel Kachhap
This patch adds support for save and restore for clock registers
which loses register contents across power domain off/on sequence.

Cc: Sylwester Nawrocki s.nawro...@samsung.com
Cc: Mike Turquette mturque...@linaro.org
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/clk/samsung/clk.c |   66 +
 drivers/clk/samsung/clk.h |   14 ++
 2 files changed, 80 insertions(+)

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index dd1f7c9..9fd1369 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -11,10 +11,12 @@
  * clock framework for Samsung platforms.
 */
 
+#include linux/pm_domain.h
 #include linux/syscore_ops.h
 #include clk.h
 
 static LIST_HEAD(clock_reg_cache_list);
+static LIST_HEAD(clock_pd_reg_cache_list);
 
 void samsung_clk_save(void __iomem *base,
struct samsung_clk_reg_dump *rd,
@@ -370,6 +372,67 @@ static void samsung_clk_sleep_init(void __iomem *reg_base,
unsigned long nr_rdump) {}
 #endif
 
+static int samsung_power_domain_notifier(struct notifier_block *nb,
+   unsigned long event, void *data)
+{
+   struct generic_pm_domain *genpd = data;
+   struct samsung_clock_pd_reg_cache *reg_cache;
+
+   switch (event) {
+   case GPD_OFF_PRE:
+   /* save all the pd domain clock registers */
+   list_for_each_entry(reg_cache, clock_pd_reg_cache_list, node)
+   if (!strcmp(reg_cache-pd_name, genpd-name))
+   samsung_clk_save(reg_cache-reg_base,
+   reg_cache-rdump,
+   reg_cache-rd_num);
+   break;
+   case GPD_ON_POST:
+   /* restore all the pd domain clock registers */
+   list_for_each_entry(reg_cache, clock_pd_reg_cache_list, node)
+   if (!strcmp(reg_cache-pd_name, genpd-name))
+   samsung_clk_restore(reg_cache-reg_base,
+   reg_cache-rdump,
+   reg_cache-rd_num);
+   break;
+   case GPD_OFF_POST:
+   case GPD_ON_PRE:
+   break;
+   default:
+   pr_err(%s: Invalid pm domain event\n, __func__);
+   }
+   return 0;
+}
+
+/* Notifier for power domain on/off changes */
+static struct notifier_block power_domain_notifier_block = {
+   .notifier_call = samsung_power_domain_notifier,
+};
+
+static void samsung_clk_pd_init(void __iomem *reg_base,
+   const unsigned long *rdump, unsigned long nr_rdump,
+   char *pd_name)
+{
+   struct samsung_clock_pd_reg_cache *pd_reg_cache;
+
+   pd_reg_cache = kzalloc(sizeof(struct samsung_clock_pd_reg_cache),
+   GFP_KERNEL);
+   if (!pd_reg_cache)
+   panic(could not allocate register reg_cache.\n);
+
+   pd_reg_cache-rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
+
+   if (!pd_reg_cache-rdump)
+   panic(could not allocate register dump storage.\n);
+
+   pd_reg_cache-reg_base = reg_base;
+   pd_reg_cache-rd_num = nr_rdump;
+   pd_reg_cache-pd_name = pd_name;
+   list_add_tail(pd_reg_cache-node, clock_pd_reg_cache_list);
+
+   genpd_register_notifier(power_domain_notifier_block, pd_name);
+}
+
 /*
  * Common function which registers plls, muxes, dividers and gates
  * for each CMU. It also add CMU register list to register cache.
@@ -408,6 +471,9 @@ void __init samsung_cmu_register_one(struct device_node *np,
if (cmu-clk_regs)
samsung_clk_sleep_init(reg_base, cmu-clk_regs,
cmu-nr_clk_regs);
+   if (cmu-pd_clk_regs)
+   samsung_clk_pd_init(reg_base, cmu-pd_clk_regs,
+   cmu-nr_clk_regs, cmu-pd_name);
 
samsung_clk_of_add_provider(np, ctx);
 }
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 3f471e9..f67f5e5 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -331,6 +331,14 @@ struct samsung_clock_reg_cache {
unsigned int rd_num;
 };
 
+struct samsung_clock_pd_reg_cache {
+   struct list_head node;
+   void __iomem *reg_base;
+   struct samsung_clk_reg_dump *rdump;
+   unsigned int rd_num;
+   char *pd_name;
+};
+
 struct samsung_cmu_info {
/* list of pll clocks and respective count */
struct samsung_pll_clock *pll_clks;
@@ -356,6 +364,12 @@ struct samsung_cmu_info {
/* list and number of clocks registers */
unsigned long *clk_regs;
unsigned int nr_clk_regs;
+
+   /* list and number of clocks to be saved/restored during
+* power domain shutdown */
+   char *pd_name;
+   unsigned long

[PATCH 10/12] soc: samsung: pm_domain: Use the recently added PM Domain notifiers

2014-11-02 Thread Amit Daniel Kachhap
Invoke the GPD_OFF_PRE/GPD_ON_POST power Domain notifiers. This will
allow some clocks to be saved and restored. These notifiers can also
be invoked from the core power domain files but is not done as exynos is
the only user of these notifiers as of now.
In exynos7 SOC's only GPD_OFF_PRE/GPD_ON_POST are required.

Cc: Kukjin Kim kgene@samsung.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 drivers/soc/samsung/pm_domains.c |7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/samsung/pm_domains.c b/drivers/soc/samsung/pm_domains.c
index f14f182..11633c2 100644
--- a/drivers/soc/samsung/pm_domains.c
+++ b/drivers/soc/samsung/pm_domains.c
@@ -99,11 +99,16 @@ static int exynos_pd_power(struct generic_pm_domain 
*domain, bool power_on)
 
 static int exynos_pd_power_on(struct generic_pm_domain *domain)
 {
-   return exynos_pd_power(domain, true);
+   int ret;
+
+   ret = exynos_pd_power(domain, true);
+   genpd_invoke_transition_notifier(domain, GPD_ON_POST);
+   return ret;
 }
 
 static int exynos_pd_power_off(struct generic_pm_domain *domain)
 {
+   genpd_invoke_transition_notifier(domain, GPD_OFF_PRE);
return exynos_pd_power(domain, false);
 }
 
-- 
1.7.9.5

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[PATCH 12/12] arm64: Kconfig: Enable PM_GENERIC_DOMAINS for exynos7

2014-11-02 Thread Amit Daniel Kachhap
Use power domain driver for Exynos7 SOC's

Cc: Catalin Marinas catalin.mari...@arm.com
Reviewed-by: Pankaj Dubey pankaj.du...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
 arch/arm64/Kconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 693db3e..f537558 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -152,6 +152,7 @@ config ARCH_EXYNOS7
bool ARMv8 based Samsung Exynos7
select ARCH_EXYNOS
select COMMON_CLK_SAMSUNG
+   select PM_GENERIC_DOMAINS
help
  This enables support for Samsung Exynos7 SoC family
 
-- 
1.7.9.5

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Re: [PATCH v3 0/8] thermal: exynos: various cleanups

2014-09-01 Thread amit daniel kachhap
On Thu, Aug 28, 2014 at 8:19 PM, Eduardo Valentin edubez...@gmail.com wrote:
 Amit,

 On Thu, Jul 31, 2014 at 07:10:58PM +0200, Bartlomiej Zolnierkiewicz wrote:
 Hi,

 This patch series contains various cleanups for EXYNOS thermal
 driver.  Overall it decreases driver's LOC by 9%.  It is based
 on next-20140731 kernel.  It should not cause any functionality
 changes.


 Did you have the time to test this series?

Hi Eduardo/Bartlomiej,

For the whole series tested on exynos5250 based arndale board.
Tested-by: Amit Daniel Kachhap amit.dan...@samsung.com

Sorry for the delay as I was busy in some internal work.

Thanks,
Amit D

 Changes since v2 (https://lkml.org/lkml/2014/6/17/436):
 - synced patches against next-20140731
 - dropped patch thermal: exynos: remove dead code for
   TYPE_TWO_POINT_TRIMMING calibration (newly added Exynos3250
   SoC support uses TYPE_TWO_POINT_TRIMMING calibration)
 - updated patch description for patch #2
 - dropped Reviewed-by from Amit from patch #8 (due to changed
   scope of the patch)

 Changes since v1 (https://lkml.org/lkml/2014/5/5/194):
 - synced patches against next-20140617
 - merged patch thermal: exynos: remove unused defines into
   thermal: exynos: remove unused struct exynos_tmu_registers
   entries one (per request from Eduardo)
 - improved patch descriptions for patches #1-5
 - fixed documentation for pdata-gain and pdata-reference_voltage
 - added Reviewed-by from Amit to patches #6, #7 and #10
 - added missing Acked-by from Kyungmin Park

 Best regards,
 --
 Bartlomiej Zolnierkiewicz
 Samsung RD Institute Poland
 Samsung Electronics


 Bartlomiej Zolnierkiewicz (8):
   thermal: exynos: remove unused struct exynos_tmu_registers entries
   thermal: exynos: remove dead code for HW_MODE calibration
   thermal: exynos: remove redundant pdata checks from
 exynos_tmu_initialize()
   thermal: exynos: remove redundant threshold_code checks from
 exynos_tmu_initialize()
   thermal: exynos: simplify temp_to_code() and code_to_temp()
   thermal: exynos: cache non_hw_trigger_levels in pdata
   thermal: exynos: remove redundant pdata checks from
 exynos_tmu_control()
   thermal: exynos: remove identical values from exynos*_tmu_registers
 structures

  drivers/thermal/samsung/exynos_thermal_common.h |   1 -
  drivers/thermal/samsung/exynos_tmu.c| 126 
 +---
  drivers/thermal/samsung/exynos_tmu.h|  74 +-
  drivers/thermal/samsung/exynos_tmu_data.c   |  56 ++-
  drivers/thermal/samsung/exynos_tmu_data.h   |  31 +-
  5 files changed, 35 insertions(+), 253 deletions(-)

 --
 1.8.2.3

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Re: [PATCHv3] thermal: exynos: Add support for TRIM_RELOAD feature at Exynos3250

2014-08-19 Thread amit daniel kachhap
On Wed, Aug 20, 2014 at 5:22 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
 This patch add support for TRIM_RELOAD feature at Exynos3250. The TMU of
 Exynos3250 has two TRIMINFO_CON register.

 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Zhang Rui rui.zh...@intel.com
 Cc: Eduardo Valentin edubez...@gmail.com
 Cc: Amit Daniel Kachhap amit.dan...@samsung.com
The changes looks fine,
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com

Thanks,
Amit
 ---
 Changes from v2:
 - Fix build break because of missing 'or' operation.
 Changes from v1:
 - Add missing 'TMU_SUPPORT_TRIM_RELOAD' feature

  drivers/thermal/samsung/exynos_tmu.c  |  7 +--
  drivers/thermal/samsung/exynos_tmu.h  |  5 +++--
  drivers/thermal/samsung/exynos_tmu_data.c | 11 +--
  drivers/thermal/samsung/exynos_tmu_data.h |  7 +--
  4 files changed, 22 insertions(+), 8 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index acbff14..ed01606 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -164,8 +164,11 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
 }
 }

 -   if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
 -   __raw_writel(1, data-base + reg-triminfo_ctrl);
 +   if (TMU_SUPPORTS(pdata, TRIM_RELOAD)) {
 +   for (i = 0; i  pdata-triminfo_reload_count; i++)
 +   __raw_writel(pdata-triminfo_reload[i],
 +   data-base + reg-triminfo_ctrl[i]);
 +   }

 if (pdata-cal_mode == HW_MODE)
 goto skip_calib_data;
 diff --git a/drivers/thermal/samsung/exynos_tmu.h 
 b/drivers/thermal/samsung/exynos_tmu.h
 index 1b4a644..72cb54e 100644
 --- a/drivers/thermal/samsung/exynos_tmu.h
 +++ b/drivers/thermal/samsung/exynos_tmu.h
 @@ -151,8 +151,7 @@ struct exynos_tmu_registers {
 u32 triminfo_25_shift;
 u32 triminfo_85_shift;

 -   u32 triminfo_ctrl;
 -   u32 triminfo_ctrl1;
 +   u32 triminfo_ctrl[2];
 u32 triminfo_reload_shift;

 u32 tmu_ctrl;
 @@ -295,6 +294,8 @@ struct exynos_tmu_platform_data {
 u8 second_point_trim;
 u8 default_temp_offset;
 u8 test_mux;
 +   u8 triminfo_reload[2];
 +   u8 triminfo_reload_count;

 enum calibration_type cal_type;
 enum calibration_mode cal_mode;
 diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
 b/drivers/thermal/samsung/exynos_tmu_data.c
 index aa8e0de..8cd609c 100644
 --- a/drivers/thermal/samsung/exynos_tmu_data.c
 +++ b/drivers/thermal/samsung/exynos_tmu_data.c
 @@ -95,6 +95,8 @@ static const struct exynos_tmu_registers 
 exynos3250_tmu_registers = {
 .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
 .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
 .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
 +   .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
 +   .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
 .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
 .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
 @@ -160,8 +162,11 @@ static const struct exynos_tmu_registers 
 exynos3250_tmu_registers = {
 .temp_level = 95, \
 }, \
 .freq_tab_count = 2, \
 +   .triminfo_reload[0] = 0x1, \
 +   .triminfo_reload[1] = 0x11, \
 +   .triminfo_reload_count = 2, \
 .registers = exynos3250_tmu_registers, \
 -   .features = (TMU_SUPPORT_EMULATION | \
 +   .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
 TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | 
 \
 TMU_SUPPORT_EMUL_TIME)
  #endif
 @@ -184,7 +189,7 @@ static const struct exynos_tmu_registers 
 exynos4412_tmu_registers = {
 .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
 .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
 .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
 -   .triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
 +   .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
 .triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
 .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
 @@ -252,6 +257,8 @@ static const struct exynos_tmu_registers 
 exynos4412_tmu_registers = {
 .temp_level = 95, \
 }, \
 .freq_tab_count = 2, \
 +   .triminfo_reload[0] = 0x1, \
 +   .triminfo_reload_count = 1, \
 .registers = exynos4412_tmu_registers, \
 .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
 TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | 
 \
 diff --git a/drivers/thermal/samsung/exynos_tmu_data.h 
 b/drivers/thermal/samsung/exynos_tmu_data.h
 index f0979e5

Re: [PATCH] thermal: exynos: Remove duplicate code when reading triminfo register of Exynos5440

2014-08-19 Thread amit daniel kachhap
On Wed, Aug 20, 2014 at 9:54 AM, Chanwoo Choi cw00.c...@samsung.com wrote:
 This patch remove simply duplicate code when reading triminfo register of 
 Exynos5440.

 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 Cc: Zhang Rui rui.zh...@intel.com
 Cc: Eduardo Valentin edubez...@gmail.com
 Cc: Amit Daniel Kachhap amit.dan...@samsung.com
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com

Thanks,
Amit
 ---
  drivers/thermal/samsung/exynos_tmu.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index ed01606..13c2e01 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -181,15 +181,13 @@ static int exynos_tmu_initialize(struct platform_device 
 *pdev)
  */
 switch (data-id) {
 case 0:
 +   case 2:
 trim_info = readl(data-base +
 EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
 break;
 case 1:
 trim_info = readl(data-base + reg-triminfo_data);
 break;
 -   case 2:
 -   trim_info = readl(data-base -
 -   EXYNOS5440_EFUSE_SWAP_OFFSET + reg-triminfo_data);
 }
 } else {
 /* On exynos5420 the triminfo register is in the shared space 
 */
 --
 1.8.0

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Re: [PATCH v2 0/9] thermal: exynos: various cleanups

2014-07-28 Thread amit daniel kachhap
Hi Eduardo,

Please reject this entire series as this is not re-based recently.
Actually two point trimming which this series seeks to remove is used
by exynos3250 and is in Rui's tree
(https://git.kernel.org/cgit/linux/kernel/git/rzhang/linux.git/commit/?h=nextid=1fe56dc16a3dab400206443f70ae158c8f595c42).

Thanks,
Amit D


On Mon, Jul 28, 2014 at 8:07 PM, Eduardo Valentin edubez...@gmail.com wrote:
 On Tue, Jun 17, 2014 at 07:27:16PM +0200, Bartlomiej Zolnierkiewicz wrote:
 Hi,

 This patch series contains various cleanups for EXYNOS thermal
 driver.  Overall it decreases driver's LOC by 12%.  It is based
 on next-20140617 kernel.  It should not cause any functionality
 changes.

 Changes since v1:
 - synced patches against next-20140617
 - merged patch thermal: exynos: remove unused defines into
   thermal: exynos: remove unused struct exynos_tmu_registers
   entries one (per request from Eduardo)
 - improved patch descriptions for patches #1-5
 - fixed documentation for pdata-gain and pdata-reference_voltage
 - added Reviewed-by from Amit to patches #6, #7 and #10
 - added missing Acked-by from Kyungmin Park

 Pulled the series.

 Thanks.


 Best regards,
 --
 Bartlomiej Zolnierkiewicz
 Samsung RD Institute Poland
 Samsung Electronics


 Bartlomiej Zolnierkiewicz (9):
   thermal: exynos: remove unused struct exynos_tmu_registers entries
   thermal: exynos: remove dead code for HW_MODE calibration
   thermal: exynos: remove dead code for TYPE_TWO_POINT_TRIMMING
 calibration
   thermal: exynos: remove redundant pdata checks from
 exynos_tmu_initialize()
   thermal: exynos: remove redundant threshold_code checks from
 exynos_tmu_initialize()
   thermal: exynos: simplify temp_to_code() and code_to_temp()
   thermal: exynos: cache non_hw_trigger_levels in pdata
   thermal: exynos: remove redundant pdata checks from
 exynos_tmu_control()
   thermal: exynos: remove identical values from exynos*_tmu_registers
 structures

  drivers/thermal/samsung/exynos_thermal_common.h |   1 -
  drivers/thermal/samsung/exynos_tmu.c| 181 
 
  drivers/thermal/samsung/exynos_tmu.h|  90 +---
  drivers/thermal/samsung/exynos_tmu_data.c   |  64 +
  drivers/thermal/samsung/exynos_tmu_data.h   |  33 +
  5 files changed, 41 insertions(+), 328 deletions(-)

 --
 1.8.2.3

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Re: [RESEND PATCH] thermal: samsung: Add TMU support for Exynos3250 SoC

2014-07-22 Thread amit daniel kachhap
On Mon, Jul 21, 2014 at 11:34 AM, Zhang Rui rui.zh...@intel.com wrote:
 On Fri, 2014-07-18 at 09:00 +0900, Chanwoo Choi wrote:
 This patch adds the registers, bit fields and compatible strings
 required to support for the 1 TMU channels on Exynos3250.

 Signed-off-by: Chanwoo Choi cw00.c...@samsung.com
 [Add MUX address setting bits by Jonghwa Lee]
 Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
 Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 Reviewed-by: Amit Daniel Kachhapamit.dan...@samsung.com

 Eduardo and Amit,

 do you have any comments on this?
The changes looks fine to me. I already reviewed these patches earlier.

thanks,
Amit

 thanks,
 rui

 ---
  .../devicetree/bindings/thermal/exynos-thermal.txt |  1 +
  drivers/thermal/samsung/exynos_tmu.c   |  7 +-
  drivers/thermal/samsung/exynos_tmu.h   |  3 +-
  drivers/thermal/samsung/exynos_tmu_data.c  | 89 
 ++
  drivers/thermal/samsung/exynos_tmu_data.h  |  7 ++
  5 files changed, 105 insertions(+), 2 deletions(-)

 diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt 
 b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
 index c949092..ae738f5 100644
 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
 +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
 @@ -3,6 +3,7 @@
  ** Required properties:

  - compatible : One of the following:
 +samsung,exynos3250-tmu
  samsung,exynos4412-tmu
  samsung,exynos4210-tmu
  samsung,exynos5250-tmu
 diff --git a/drivers/thermal/samsung/exynos_tmu.c 
 b/drivers/thermal/samsung/exynos_tmu.c
 index d7ca9f4..a2a08ea 100644
 --- a/drivers/thermal/samsung/exynos_tmu.c
 +++ b/drivers/thermal/samsung/exynos_tmu.c
 @@ -505,6 +505,10 @@ static irqreturn_t exynos_tmu_irq(int irq, void *id)

  static const struct of_device_id exynos_tmu_match[] = {
   {
 + .compatible = samsung,exynos3250-tmu,
 + .data = (void *)EXYNOS3250_TMU_DRV_DATA,
 + },
 + {
   .compatible = samsung,exynos4210-tmu,
   .data = (void *)EXYNOS4210_TMU_DRV_DATA,
   },
 @@ -677,7 +681,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
   goto err_clk_sec;
   }

 - if (pdata-type == SOC_ARCH_EXYNOS4210 ||
 + if (pdata-type == SOC_ARCH_EXYNOS3250 ||
 + pdata-type == SOC_ARCH_EXYNOS4210 ||
   pdata-type == SOC_ARCH_EXYNOS4412 ||
   pdata-type == SOC_ARCH_EXYNOS5250 ||
   pdata-type == SOC_ARCH_EXYNOS5260 ||
 diff --git a/drivers/thermal/samsung/exynos_tmu.h 
 b/drivers/thermal/samsung/exynos_tmu.h
 index edd08cf..1b4a644 100644
 --- a/drivers/thermal/samsung/exynos_tmu.h
 +++ b/drivers/thermal/samsung/exynos_tmu.h
 @@ -40,7 +40,8 @@ enum calibration_mode {
  };

  enum soc_type {
 - SOC_ARCH_EXYNOS4210 = 1,
 + SOC_ARCH_EXYNOS3250 = 1,
 + SOC_ARCH_EXYNOS4210,
   SOC_ARCH_EXYNOS4412,
   SOC_ARCH_EXYNOS5250,
   SOC_ARCH_EXYNOS5260,
 diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
 b/drivers/thermal/samsung/exynos_tmu_data.c
 index c1d81dc..aa8e0de 100644
 --- a/drivers/thermal/samsung/exynos_tmu_data.c
 +++ b/drivers/thermal/samsung/exynos_tmu_data.c
 @@ -90,6 +90,95 @@ struct exynos_tmu_init_data const 
 exynos4210_default_tmu_data = {
  };
  #endif

 +#if defined(CONFIG_SOC_EXYNOS3250)
 +static const struct exynos_tmu_registers exynos3250_tmu_registers = {
 + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
 + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
 + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
 + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
 + .test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
 + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
 + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
 + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
 + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
 + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
 + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
 + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
 + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
 + .tmu_status = EXYNOS_TMU_REG_STATUS,
 + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
 + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
 + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
 + .tmu_inten = EXYNOS_TMU_REG_INTEN,
 + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
 + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
 + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
 + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
 + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
 + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
 + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
 + .intclr_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
 + .intclr_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
 + .intclr_fall_mask = 

Re: [PATCH 2/3] regulator: s2mpa01: Optimize the regulator description macro

2014-07-15 Thread amit daniel kachhap
On Mon, Jul 14, 2014 at 2:19 PM, Krzysztof Kozlowski
k.kozlow...@samsung.com wrote:
 On 08.07.2014 14:27, Amit Daniel Kachhap wrote:

 This patch makes the regulator description macro take minimum and
 steps voltage as parameter. In this way many repeated macros can be
 removed. Now these macros are repeated only if the the LDO/BUCK ctrl
 registers have non-linear positions. The good thing is these ctrl
 registers
 are mostly linear so they are not passed as parameters.

 This patch reduces the code size and also allow easy addition of more
 s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
   drivers/regulator/s2mpa01.c | 136
 
   1 file changed, 37 insertions(+), 99 deletions(-)

 diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
 index 962c5f1..8073466 100644
 --- a/drivers/regulator/s2mpa01.c
 +++ b/drivers/regulator/s2mpa01.c
 @@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .set_ramp_delay = s2mpa01_set_ramp_delay,
   };

 -#define regulator_desc_ldo1(num)   {   \
 +#define regulator_desc_ldo(num, min, step) {   \


 Why adding parameter for the 'min' value? It is always the same for LDOs -
 800 mV.

 The same applies for the s2mps11 regulator driver.
Correct. min parameter can be removed.
Thanks for the review.

 Best regards,
 Krzysztof


 .name   = LDO#num,\
 .id = S2MPA01_LDO##num, \
 .ops= s2mpa01_ldo_ops, \
 .type   = REGULATOR_VOLTAGE,\
 .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_50_MV,   \
 -   .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
 -   .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
 -   .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
 -   .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
 -   .enable_mask= S2MPA01_ENABLE_MASK   \
 -}
 -#define regulator_desc_ldo2(num)   {   \
 -   .name   = LDO#num,\
 -   .id = S2MPA01_LDO##num, \
 -   .ops= s2mpa01_ldo_ops, \
 -   .type   = REGULATOR_VOLTAGE,\
 -   .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_25_MV,   \
 +   .min_uV = min,  \
 +   .uV_step= step, \
 .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
 .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
 .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
 @@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .enable_mask= S2MPA01_ENABLE_MASK   \
   }

 -#define regulator_desc_buck6_7(num){   \
 +#define regulator_desc_buck6_10(num, min, step){   \
 .name   = BUCK#num,   \
 .id = S2MPA01_BUCK##num,\
 .ops= s2mpa01_buck_ops,\
 .type   = REGULATOR_VOLTAGE,\
 .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_600_MV,   \
 -   .uV_step= STEP_6_25_MV, \
 +   .min_uV = min,  \
 +   .uV_step= step, \
 .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
 .ramp_delay = S2MPA01_RAMP_DELAY,   \
 .vsel_reg   = S2MPA01_REG_B6CTRL2 + (num - 6) * 2,  \
 @@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .enable_mask= S2MPA01_ENABLE_MASK   \
   }

 -#define regulator_desc_buck8   {   \
 -   .name   = BUCK8,  \
 -   .id = S2MPA01_BUCK8,\
 -   .ops= s2mpa01_buck_ops,\
 -   .type   = REGULATOR_VOLTAGE,\
 -   .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_12_5_MV, \
 -   .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
 -   .ramp_delay = S2MPA01_RAMP_DELAY,   \
 -   .vsel_reg   = S2MPA01_REG_B8CTRL2,  \
 -   .vsel_mask  = S2MPA01_BUCK_VSEL_MASK

[PATCH v2 2/3] regulator: s2mpa01: Optimize the regulator description macro

2014-07-15 Thread Amit Daniel Kachhap
This patch makes the regulator description macro take minimum and
steps voltage as parameter. In this way many repeated macros can be
removed. Now these macros are repeated only if the the LDO/BUCK ctrl
registers have non-linear positions. The good thing is these ctrl registers
are mostly linear so they are not passed as parameters.

This patch reduces the code size and also allow easy addition of more
s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.

Cc: Sangbeom Kim sbki...@samsung.com
Cc: Liam Girdwood lgirdw...@gmail.com
Cc: Mark Brown broo...@kernel.org
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Changes since v1:
* Removed min parameter from regulator_desc_ldo1 as pointed by Krzysztof
* Added Cc to maintainers.
* Added Krzysztof reviewed-by.

 drivers/regulator/s2mpa01.c | 134 
 1 file changed, 36 insertions(+), 98 deletions(-)

diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
index 962c5f1..89fe32c 100644
--- a/drivers/regulator/s2mpa01.c
+++ b/drivers/regulator/s2mpa01.c
@@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.set_ramp_delay = s2mpa01_set_ramp_delay,
 };
 
-#define regulator_desc_ldo1(num)   {   \
+#define regulator_desc_ldo(num, step) {\
.name   = LDO#num,\
.id = S2MPA01_LDO##num, \
.ops= s2mpa01_ldo_ops, \
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
.min_uV = MIN_800_MV,   \
-   .uV_step= STEP_50_MV,   \
-   .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
-   .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
-   .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
-   .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
-   .enable_mask= S2MPA01_ENABLE_MASK   \
-}
-#define regulator_desc_ldo2(num)   {   \
-   .name   = LDO#num,\
-   .id = S2MPA01_LDO##num, \
-   .ops= s2mpa01_ldo_ops, \
-   .type   = REGULATOR_VOLTAGE,\
-   .owner  = THIS_MODULE,  \
-   .min_uV = MIN_800_MV,   \
-   .uV_step= STEP_25_MV,   \
+   .uV_step= step, \
.n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
.vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
.vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
@@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK   \
 }
 
-#define regulator_desc_buck6_7(num){   \
+#define regulator_desc_buck6_10(num, min, step) {  \
.name   = BUCK#num,   \
.id = S2MPA01_BUCK##num,\
.ops= s2mpa01_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = MIN_600_MV,   \
-   .uV_step= STEP_6_25_MV, \
+   .min_uV = min,  \
+   .uV_step= step, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
.ramp_delay = S2MPA01_RAMP_DELAY,   \
.vsel_reg   = S2MPA01_REG_B6CTRL2 + (num - 6) * 2,  \
@@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
.enable_mask= S2MPA01_ENABLE_MASK   \
 }
 
-#define regulator_desc_buck8   {   \
-   .name   = BUCK8,  \
-   .id = S2MPA01_BUCK8,\
-   .ops= s2mpa01_buck_ops,\
-   .type   = REGULATOR_VOLTAGE,\
-   .owner  = THIS_MODULE,  \
-   .min_uV = MIN_800_MV,   \
-   .uV_step= STEP_12_5_MV, \
-   .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
-   .ramp_delay = S2MPA01_RAMP_DELAY,   \
-   .vsel_reg   = S2MPA01_REG_B8CTRL2,  \
-   .vsel_mask  = S2MPA01_BUCK_VSEL_MASK,   \
-   .enable_reg = S2MPA01_REG_B8CTRL1,  \
-   .enable_mask= S2MPA01_ENABLE_MASK   \
-}
-
-#define regulator_desc_buck9

[PATCH v2 1/3] regulator: s2mpxxx: Move regulator min/step voltages in common place

2014-07-15 Thread Amit Daniel Kachhap
This is a cleanup patch and moves min/step voltages in a common samsung
header file so that they can be used by other s2mpxxx PMIC drivers. Only
few required macros are added currently and others can be added if needed.

Cc: Sangbeom Kim sbki...@samsung.com
Cc: Liam Girdwood lgirdw...@gmail.com
Cc: Mark Brown broo...@kernel.org
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Lee Jones lee.jo...@linaro.org
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Changes since v1:
* Added Cc to maintainers.
* Added Krzysztof reviewed-by.

 drivers/regulator/s2mpa01.c | 32 
 drivers/regulator/s2mps11.c | 50 ++---
 include/linux/mfd/samsung/core.h| 21 
 include/linux/mfd/samsung/s2mpa01.h | 12 -
 include/linux/mfd/samsung/s2mps11.h |  9 ---
 include/linux/mfd/samsung/s2mps14.h | 10 
 6 files changed, 62 insertions(+), 72 deletions(-)

diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
index ee83b48..962c5f1 100644
--- a/drivers/regulator/s2mpa01.c
+++ b/drivers/regulator/s2mpa01.c
@@ -241,8 +241,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_ldo_ops, \
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_LDO_MIN,  \
-   .uV_step= S2MPA01_LDO_STEP1,\
+   .min_uV = MIN_800_MV,   \
+   .uV_step= STEP_50_MV,   \
.n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
.vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
.vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
@@ -255,8 +255,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_ldo_ops, \
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_LDO_MIN,  \
-   .uV_step= S2MPA01_LDO_STEP2,\
+   .min_uV = MIN_800_MV,   \
+   .uV_step= STEP_25_MV,   \
.n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
.vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
.vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
@@ -270,8 +270,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_BUCK_MIN1,\
-   .uV_step= S2MPA01_BUCK_STEP1,   \
+   .min_uV = MIN_600_MV,   \
+   .uV_step= STEP_6_25_MV, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
.ramp_delay = S2MPA01_RAMP_DELAY,   \
.vsel_reg   = S2MPA01_REG_B1CTRL2 + (num - 1) * 2,  \
@@ -286,8 +286,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_BUCK_MIN2,\
-   .uV_step= S2MPA01_BUCK_STEP1,   \
+   .min_uV = MIN_800_MV,   \
+   .uV_step= STEP_6_25_MV, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
.ramp_delay = S2MPA01_RAMP_DELAY,   \
.vsel_reg   = S2MPA01_REG_B5CTRL2,  \
@@ -302,8 +302,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_BUCK_MIN1,\
-   .uV_step= S2MPA01_BUCK_STEP1,   \
+   .min_uV = MIN_600_MV,   \
+   .uV_step= STEP_6_25_MV, \
.n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
.ramp_delay = S2MPA01_RAMP_DELAY,   \
.vsel_reg   = S2MPA01_REG_B6CTRL2 + (num - 6) * 2,  \
@@ -318,8 +318,8 @@ static struct regulator_ops s2mpa01_buck_ops = {
.ops= s2mpa01_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = S2MPA01_BUCK_MIN2

[PATCH v2 3/3] regulator: s2mps11: Optimize the regulator description macro

2014-07-15 Thread Amit Daniel Kachhap
This patch makes the regulator description macro take minimum and
steps voltage as parameter. In this way many repeated macros can be
removed. Now these macros are repeated only if the the LDO/BUCK ctrl
registers have non-linear positions. The good thing is these ctrl registers
are mostly linear so they are not passed as parameters.

This patch reduces the code size and also allow easy addition of more
s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.

Cc: Sangbeom Kim sbki...@samsung.com
Cc: Liam Girdwood lgirdw...@gmail.com
Cc: Mark Brown broo...@kernel.org
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
Changes since v1:
* Removed min parameter from regulator_desc_s2mps11_ldo1 as pointed by Krzysztof
* Added Cc to maintainers.
* Added Krzysztof reviewed-by.

 drivers/regulator/s2mps11.c | 259 +++-
 1 file changed, 85 insertions(+), 174 deletions(-)

diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c
index 2098c3e..049e6f3 100644
--- a/drivers/regulator/s2mps11.c
+++ b/drivers/regulator/s2mps11.c
@@ -250,28 +250,14 @@ static struct regulator_ops s2mps11_buck_ops = {
.set_ramp_delay = s2mps11_set_ramp_delay,
 };
 
-#define regulator_desc_s2mps11_ldo1(num)   {   \
+#define regulator_desc_s2mps11_ldo(num, step) {\
.name   = LDO#num,\
.id = S2MPS11_LDO##num, \
.ops= s2mps11_ldo_ops, \
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
.min_uV = MIN_800_MV,   \
-   .uV_step= STEP_50_MV,   \
-   .n_voltages = S2MPS11_LDO_N_VOLTAGES,   \
-   .vsel_reg   = S2MPS11_REG_L1CTRL + num - 1, \
-   .vsel_mask  = S2MPS11_LDO_VSEL_MASK,\
-   .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \
-   .enable_mask= S2MPS11_ENABLE_MASK   \
-}
-#define regulator_desc_s2mps11_ldo2(num) { \
-   .name   = LDO#num,\
-   .id = S2MPS11_LDO##num, \
-   .ops= s2mps11_ldo_ops, \
-   .type   = REGULATOR_VOLTAGE,\
-   .owner  = THIS_MODULE,  \
-   .min_uV = MIN_800_MV,   \
-   .uV_step= STEP_25_MV,   \
+   .uV_step= step, \
.n_voltages = S2MPS11_LDO_N_VOLTAGES,   \
.vsel_reg   = S2MPS11_REG_L1CTRL + num - 1, \
.vsel_mask  = S2MPS11_LDO_VSEL_MASK,\
@@ -311,14 +297,14 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
 
-#define regulator_desc_s2mps11_buck6_8(num) {  \
+#define regulator_desc_s2mps11_buck6_10(num, min, step) {  \
.name   = BUCK#num,   \
.id = S2MPS11_BUCK##num,\
.ops= s2mps11_buck_ops,\
.type   = REGULATOR_VOLTAGE,\
.owner  = THIS_MODULE,  \
-   .min_uV = MIN_600_MV,   \
-   .uV_step= STEP_6_25_MV, \
+   .min_uV = min,  \
+   .uV_step= step, \
.n_voltages = S2MPS11_BUCK_N_VOLTAGES,  \
.ramp_delay = S2MPS11_RAMP_DELAY,   \
.vsel_reg   = S2MPS11_REG_B6CTRL2 + (num - 6) * 2,  \
@@ -327,87 +313,55 @@ static struct regulator_ops s2mps11_buck_ops = {
.enable_mask= S2MPS11_ENABLE_MASK   \
 }
 
-#define regulator_desc_s2mps11_buck9 { \
-   .name   = BUCK9,  \
-   .id = S2MPS11_BUCK9,\
-   .ops= s2mps11_buck_ops,\
-   .type   = REGULATOR_VOLTAGE,\
-   .owner  = THIS_MODULE,  \
-   .min_uV = MIN_3000_MV,  \
-   .uV_step= STEP_25_MV,   \
-   .n_voltages = S2MPS11_BUCK_N_VOLTAGES,  \
-   .ramp_delay = S2MPS11_RAMP_DELAY,   \
-   .vsel_reg   = S2MPS11_REG_B9CTRL2,  \
-   .vsel_mask  = S2MPS11_BUCK_VSEL_MASK,   \
-   .enable_reg = S2MPS11_REG_B9CTRL1,  \
-   .enable_mask= S2MPS11_ENABLE_MASK   \
-}
-
-#define regulator_desc_s2mps11_buck10

Re: [PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe

2014-07-11 Thread amit daniel kachhap
On Fri, Jul 11, 2014 at 7:33 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 Hello Amit,

 On 07/10/2014 12:08 PM, amit daniel kachhap wrote:
 On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas
 javier.marti...@collabora.co.uk wrote:
 MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set
 of Buck regulators. A number of GPIO are connected to these
 lines and are requested by the mfd driver. Setup the GPIO
 pins from the regulator driver.
 If possible merge this patch with patch 8. Both are adding DVS
 support. Put regmap_copy dependency patch in very beginning.

 As Lee already said, I split the changes to minimize the cross-subsystem 
 churn.
Yes agreed. This comment doesn't hold.


 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 ---
  drivers/regulator/max77686.c | 34 ++
  1 file changed, 34 insertions(+)

 diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
 index ef1af2d..ecce77a 100644
 --- a/drivers/regulator/max77686.c
 +++ b/drivers/regulator/max77686.c
 @@ -435,6 +435,12 @@ static int max77686_pmic_dt_parse_pdata(struct 
 platform_device *pdev,
  }
  #endif /* CONFIG_OF */

 +static inline bool max77686_is_dvs_buck(int id)
 +{
 +   /* BUCK 2,3 and 4 support DVS */
 +   return (id = MAX77686_BUCK2  id = MAX77686_BUCK4);
 I am just wondering if along with above check, SELB gpios (if present)
 can be used to confirm if BUCK's are DVS based or not.

 I don't know if SELB gpios being present or not should be used to determine
 whether a BUCK includes the DVS feature. AFAIK boards could have some of these
 lines hardwired and pulled high or low instead of using a GPIO.
As per the max77686 data sheet, selb2.3.4 uses logic high for no DVS
and logic low for DVS enabled.
So may be if DT is supplying selb gpios then the above checks can be
put otherwise not required.
Anyway from your other comments, since this patch series is not
handling complete DVS scenario.
So putting this check is not useful in this stage.

 +}
 +
  static int max77686_pmic_probe(struct platform_device *pdev)
  {
 struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
 @@ -442,6 +448,9 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 struct max77686_data *max77686;
 int i, ret = 0;
 struct regulator_config config = { };
 +   unsigned int reg;
 +   int buck_default_idx;
 +   int buck_old_idx;

 dev_dbg(pdev-dev, %s\n, __func__);

 @@ -472,13 +481,34 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 config.driver_data = max77686;
 platform_set_drvdata(pdev, max77686);

 +   buck_default_idx = pdata-buck_default_idx;
 +   buck_old_idx = max77686_read_gpios(pdata);
 +
 for (i = 0; i  MAX77686_REGULATORS; i++) {
 struct regulator_dev *rdev;
 +   int id = pdata-regulators[i].id;

 config.init_data = pdata-regulators[i].initdata;
 config.of_node = pdata-regulators[i].of_node;

 max77686-opmode[i] = regulators[i].enable_mask;
 +
 +   if (max77686_is_dvs_buck(id)) {
 +   /* Try to copy over data so we keep firmware 
 settings */
 +   reg = regulators[i].vsel_reg;
 +
 +   ret = regmap_reg_copy(iodev-regmap,
 + reg + buck_default_idx,
 + reg + buck_old_idx);
 +
 +   if (ret)
 +   dev_warn(pdev-dev, Copy err %d = %d 
 (%d)\n,
 +reg + buck_old_idx,
 +reg + buck_default_idx, ret);
 +
 +   regulators[i].vsel_reg += buck_default_idx;
 +   }
 +
 rdev = devm_regulator_register(pdev-dev,
 regulators[i], config);
 if (IS_ERR(rdev)) {
 @@ -488,6 +518,10 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 }
 }

 +   ret = max77686_setup_gpios(iodev-dev);
 +   if (ret)
 +   return ret;
 +
 return 0;
  }

 --
 2.0.0.rc2

 --
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 linux-samsung-soc in
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 Best regards,
 Javier
 --
 To unsubscribe from this list: send the line unsubscribe linux-samsung-soc 
 in
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Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support

2014-07-11 Thread amit daniel kachhap
On Fri, Jul 11, 2014 at 7:15 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 Hello Amit,

 On 07/10/2014 11:59 AM, amit daniel kachhap wrote:
 On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
 javier.marti...@collabora.co.uk wrote:
 Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
 (DVS) support that allows output voltage to change dynamically.

 For MAX77686, these regulators are Buck regulators 2, 3 and 4.

 Each Buck output voltage is selected using a set of external
 inputs: DVS1-3 and SELB2-4.

 DVS registers can be used to configure the output voltages for each
 Buck regulator and which one is active is controled by DVSx lines.

 SELBx lines are used to control if individual Buck lines are ON or OFF.

 This patch adds support to configure the DVSx and SELBx lines
 from DT and to setup and read the GPIO lines connected to them.

 The entire series looks nice. Few minor comments from my side. I guess
 still one more version in needed as per other ppls comment.
 You may add,
 Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com


 Thanks.


 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
 ---

 Changes since v6:
  - Add a comment that max77686_read_gpios() function can sleep.
Sugggested by Krzysztof Kozlowski
 ---
  drivers/mfd/max77686.c   | 119 
 +++
  include/linux/mfd/max77686.h |  18 ---
  2 files changed, 129 insertions(+), 8 deletions(-)

 diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
 index 8650832..d193873 100644
 --- a/drivers/mfd/max77686.c
 +++ b/drivers/mfd/max77686.c
 @@ -32,8 +32,10 @@
  #include linux/mfd/core.h
  #include linux/mfd/max77686.h
  #include linux/mfd/max77686-private.h
 +#include linux/gpio/consumer.h
  #include linux/err.h
  #include linux/of.h
 +#include linux/export.h

  #define I2C_ADDR_RTC   (0x0C  1)

 @@ -101,9 +103,119 @@ static const struct of_device_id 
 max77686_pmic_dt_match[] = {
 {},
  };

 +static void max77686_dt_parse_dvs_gpio(struct device *dev)
 +{
 +   struct max77686_platform_data *pd = dev_get_platdata(dev);
 +   int i;
 +
 +   /*
 +* NOTE: we don't consider GPIO errors fatal; board may have some 
 lines
 +* directly pulled high or low and thus doesn't specify them.
 +*/
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_dvs); i++)
 +   pd-buck_gpio_dvs[i] =
 +   devm_gpiod_get_index(dev, max77686,pmic-buck-dvs, 
 i);
 +
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++)
 +   pd-buck_gpio_selb[i] =
 +   devm_gpiod_get_index(dev, 
 max77686,pmic-buck-selb, i);
 +}
 +
 +/**
 + * max77686_setup_gpios() - init DVS-related GPIOs
 + * @dev: device whose platform data contains the dvs GPIOs information
 + *
 + * This function claims / initalizations GPIOs related to DVS if they are
 + * defined. This may have the effect of switching voltages if the
 + * pdata-buck_default_idx does not match the boot time state of pins.
 + */
 +int max77686_setup_gpios(struct device *dev)
 +{
 +   struct max77686_platform_data *pd = dev_get_platdata(dev);
 +   int buck_default_idx = pd-buck_default_idx;
 +   int ret;
 +   int i;
 +
 +   /* Set all SELB high to avoid glitching while DVS is changing */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_selb[i];
 +
 +   /* OK if some GPIOs aren't defined */
 +   if (IS_ERR(gpio))
 +   continue;
 +
 +   ret = gpiod_direction_output_raw(gpio, 1);
 +   if (ret) {
 +   dev_err(dev, can't set gpio[%d] dir: %d\n, i, 
 ret);
 +   return ret;
 +   }
 +   }
 +
 +   /* Set our initial setting */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
 +
 +   /* OK if some GPIOs aren't defined */
 +   if (IS_ERR(gpio))
 +   continue;
 +
 +   /* If a GPIO is valid, set it */
 +   gpiod_direction_output(gpio, (buck_default_idx  i)  1);
 +   if (ret) {
 +   dev_err(dev, can't set gpio[%d]: dir %d\n, i, 
 ret);
 +   return ret;
 +   }
 +   }
 +
 +   /* Now set SELB low to take effect */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_selb[i];
 +
 +   if (!IS_ERR(gpio))
 +   gpiod_set_value(gpio, 0);
 +   }
 +
 +   return 0;
 +}
 +EXPORT_SYMBOL_GPL(max77686_setup_gpios);
 +
 +/**
 + * max77686_read_gpios() - read the current state of the dvs GPIOs
 + * @pdata: platform data that contains the dvs GPIOs information

Re: [PATCH v7 08/24] mfd: max77686: Add Dynamic Voltage Scaling (DVS) support

2014-07-10 Thread amit daniel kachhap
On Sat, Jul 5, 2014 at 1:54 AM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 Some regulators on the MAX77686 PMIC have Dynamic Voltage Scaling
 (DVS) support that allows output voltage to change dynamically.

 For MAX77686, these regulators are Buck regulators 2, 3 and 4.

 Each Buck output voltage is selected using a set of external
 inputs: DVS1-3 and SELB2-4.

 DVS registers can be used to configure the output voltages for each
 Buck regulator and which one is active is controled by DVSx lines.

 SELBx lines are used to control if individual Buck lines are ON or OFF.

 This patch adds support to configure the DVSx and SELBx lines
 from DT and to setup and read the GPIO lines connected to them.

The entire series looks nice. Few minor comments from my side. I guess
still one more version in needed as per other ppls comment.
You may add,
Reviewed-by: Amit Daniel Kachhap amit.dan...@samsung.com


 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
 ---

 Changes since v6:
  - Add a comment that max77686_read_gpios() function can sleep.
Sugggested by Krzysztof Kozlowski
 ---
  drivers/mfd/max77686.c   | 119 
 +++
  include/linux/mfd/max77686.h |  18 ---
  2 files changed, 129 insertions(+), 8 deletions(-)

 diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
 index 8650832..d193873 100644
 --- a/drivers/mfd/max77686.c
 +++ b/drivers/mfd/max77686.c
 @@ -32,8 +32,10 @@
  #include linux/mfd/core.h
  #include linux/mfd/max77686.h
  #include linux/mfd/max77686-private.h
 +#include linux/gpio/consumer.h
  #include linux/err.h
  #include linux/of.h
 +#include linux/export.h

  #define I2C_ADDR_RTC   (0x0C  1)

 @@ -101,9 +103,119 @@ static const struct of_device_id 
 max77686_pmic_dt_match[] = {
 {},
  };

 +static void max77686_dt_parse_dvs_gpio(struct device *dev)
 +{
 +   struct max77686_platform_data *pd = dev_get_platdata(dev);
 +   int i;
 +
 +   /*
 +* NOTE: we don't consider GPIO errors fatal; board may have some 
 lines
 +* directly pulled high or low and thus doesn't specify them.
 +*/
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_dvs); i++)
 +   pd-buck_gpio_dvs[i] =
 +   devm_gpiod_get_index(dev, max77686,pmic-buck-dvs, 
 i);
 +
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++)
 +   pd-buck_gpio_selb[i] =
 +   devm_gpiod_get_index(dev, max77686,pmic-buck-selb, 
 i);
 +}
 +
 +/**
 + * max77686_setup_gpios() - init DVS-related GPIOs
 + * @dev: device whose platform data contains the dvs GPIOs information
 + *
 + * This function claims / initalizations GPIOs related to DVS if they are
 + * defined. This may have the effect of switching voltages if the
 + * pdata-buck_default_idx does not match the boot time state of pins.
 + */
 +int max77686_setup_gpios(struct device *dev)
 +{
 +   struct max77686_platform_data *pd = dev_get_platdata(dev);
 +   int buck_default_idx = pd-buck_default_idx;
 +   int ret;
 +   int i;
 +
 +   /* Set all SELB high to avoid glitching while DVS is changing */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_selb[i];
 +
 +   /* OK if some GPIOs aren't defined */
 +   if (IS_ERR(gpio))
 +   continue;
 +
 +   ret = gpiod_direction_output_raw(gpio, 1);
 +   if (ret) {
 +   dev_err(dev, can't set gpio[%d] dir: %d\n, i, ret);
 +   return ret;
 +   }
 +   }
 +
 +   /* Set our initial setting */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_dvs); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_dvs[i];
 +
 +   /* OK if some GPIOs aren't defined */
 +   if (IS_ERR(gpio))
 +   continue;
 +
 +   /* If a GPIO is valid, set it */
 +   gpiod_direction_output(gpio, (buck_default_idx  i)  1);
 +   if (ret) {
 +   dev_err(dev, can't set gpio[%d]: dir %d\n, i, ret);
 +   return ret;
 +   }
 +   }
 +
 +   /* Now set SELB low to take effect */
 +   for (i = 0; i  ARRAY_SIZE(pd-buck_gpio_selb); i++) {
 +   struct gpio_desc *gpio = pd-buck_gpio_selb[i];
 +
 +   if (!IS_ERR(gpio))
 +   gpiod_set_value(gpio, 0);
 +   }
 +
 +   return 0;
 +}
 +EXPORT_SYMBOL_GPL(max77686_setup_gpios);
 +
 +/**
 + * max77686_read_gpios() - read the current state of the dvs GPIOs
 + * @pdata: platform data that contains the dvs GPIOs information
 + *
 + * We call this function at bootup to detect what slot the firmware was
 + * using for the DVS GPIOs.  That way we can properly preserve the firmware's
 + * voltage settings

Re: [PATCH v6 15/23] regulator: max77686: Setup DVS-related GPIOs on probe

2014-07-10 Thread amit daniel kachhap
On Fri, Jul 4, 2014 at 3:25 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
 MAX77686 PMIC support Dyamic Voltage Scaling (DVS) on a set
 of Buck regulators. A number of GPIO are connected to these
 lines and are requested by the mfd driver. Setup the GPIO
 pins from the regulator driver.
If possible merge this patch with patch 8. Both are adding DVS
support. Put regmap_copy dependency patch in very beginning.

 Signed-off-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
 ---
  drivers/regulator/max77686.c | 34 ++
  1 file changed, 34 insertions(+)

 diff --git a/drivers/regulator/max77686.c b/drivers/regulator/max77686.c
 index ef1af2d..ecce77a 100644
 --- a/drivers/regulator/max77686.c
 +++ b/drivers/regulator/max77686.c
 @@ -435,6 +435,12 @@ static int max77686_pmic_dt_parse_pdata(struct 
 platform_device *pdev,
  }
  #endif /* CONFIG_OF */

 +static inline bool max77686_is_dvs_buck(int id)
 +{
 +   /* BUCK 2,3 and 4 support DVS */
 +   return (id = MAX77686_BUCK2  id = MAX77686_BUCK4);
I am just wondering if along with above check, SELB gpios (if present)
can be used to confirm if BUCK's are DVS based or not.
 +}
 +
  static int max77686_pmic_probe(struct platform_device *pdev)
  {
 struct max77686_dev *iodev = dev_get_drvdata(pdev-dev.parent);
 @@ -442,6 +448,9 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 struct max77686_data *max77686;
 int i, ret = 0;
 struct regulator_config config = { };
 +   unsigned int reg;
 +   int buck_default_idx;
 +   int buck_old_idx;

 dev_dbg(pdev-dev, %s\n, __func__);

 @@ -472,13 +481,34 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 config.driver_data = max77686;
 platform_set_drvdata(pdev, max77686);

 +   buck_default_idx = pdata-buck_default_idx;
 +   buck_old_idx = max77686_read_gpios(pdata);
 +
 for (i = 0; i  MAX77686_REGULATORS; i++) {
 struct regulator_dev *rdev;
 +   int id = pdata-regulators[i].id;

 config.init_data = pdata-regulators[i].initdata;
 config.of_node = pdata-regulators[i].of_node;

 max77686-opmode[i] = regulators[i].enable_mask;
 +
 +   if (max77686_is_dvs_buck(id)) {
 +   /* Try to copy over data so we keep firmware settings 
 */
 +   reg = regulators[i].vsel_reg;
 +
 +   ret = regmap_reg_copy(iodev-regmap,
 + reg + buck_default_idx,
 + reg + buck_old_idx);
 +
 +   if (ret)
 +   dev_warn(pdev-dev, Copy err %d = %d 
 (%d)\n,
 +reg + buck_old_idx,
 +reg + buck_default_idx, ret);
 +
 +   regulators[i].vsel_reg += buck_default_idx;
 +   }
 +
 rdev = devm_regulator_register(pdev-dev,
 regulators[i], config);
 if (IS_ERR(rdev)) {
 @@ -488,6 +518,10 @@ static int max77686_pmic_probe(struct platform_device 
 *pdev)
 }
 }

 +   ret = max77686_setup_gpios(iodev-dev);
 +   if (ret)
 +   return ret;
 +
 return 0;
  }

 --
 2.0.0.rc2

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Re: [PATCH 2/3] regulator: s2mpa01: Optimize the regulator description macro

2014-07-10 Thread amit daniel kachhap
On Thu, Jul 10, 2014 at 1:05 PM, Lee Jones lee.jo...@linaro.org wrote:
 On Thu, 10 Jul 2014, amit daniel kachhap wrote:
 Adding MFD maintainers.

 Why, what for?
Sorry not needed for this patch.

 On Tue, Jul 8, 2014 at 5:57 PM, Amit Daniel Kachhap
 amit.dan...@samsung.com wrote:
  This patch makes the regulator description macro take minimum and
  steps voltage as parameter. In this way many repeated macros can be
  removed. Now these macros are repeated only if the the LDO/BUCK ctrl
  registers have non-linear positions. The good thing is these ctrl registers
  are mostly linear so they are not passed as parameters.
 
  This patch reduces the code size and also allow easy addition of more
  s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.
 
  Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
  ---
   drivers/regulator/s2mpa01.c | 136 
  
   1 file changed, 37 insertions(+), 99 deletions(-)
 
  diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
  index 962c5f1..8073466 100644
  --- a/drivers/regulator/s2mpa01.c
  +++ b/drivers/regulator/s2mpa01.c
  @@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
  .set_ramp_delay = s2mpa01_set_ramp_delay,
   };
 
  -#define regulator_desc_ldo1(num)   {   \
  +#define regulator_desc_ldo(num, min, step) {   \
  .name   = LDO#num,\
  .id = S2MPA01_LDO##num, \
  .ops= s2mpa01_ldo_ops, \
  .type   = REGULATOR_VOLTAGE,\
  .owner  = THIS_MODULE,  \
  -   .min_uV = MIN_800_MV,   \
  -   .uV_step= STEP_50_MV,   \
  -   .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
  -   .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
  -   .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
  -   .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
  -   .enable_mask= S2MPA01_ENABLE_MASK   \
  -}
  -#define regulator_desc_ldo2(num)   {   \
  -   .name   = LDO#num,\
  -   .id = S2MPA01_LDO##num, \
  -   .ops= s2mpa01_ldo_ops, \
  -   .type   = REGULATOR_VOLTAGE,\
  -   .owner  = THIS_MODULE,  \
  -   .min_uV = MIN_800_MV,   \
  -   .uV_step= STEP_25_MV,   \
  +   .min_uV = min,  \
  +   .uV_step= step, \
  .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
  .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
  .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
  @@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
  .enable_mask= S2MPA01_ENABLE_MASK   \
   }
 
  -#define regulator_desc_buck6_7(num){   \
  +#define regulator_desc_buck6_10(num, min, step){   \
  .name   = BUCK#num,   \
  .id = S2MPA01_BUCK##num,\
  .ops= s2mpa01_buck_ops,\
  .type   = REGULATOR_VOLTAGE,\
  .owner  = THIS_MODULE,  \
  -   .min_uV = MIN_600_MV,   \
  -   .uV_step= STEP_6_25_MV, \
  +   .min_uV = min,  \
  +   .uV_step= step, \
  .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
  .ramp_delay = S2MPA01_RAMP_DELAY,   \
  .vsel_reg   = S2MPA01_REG_B6CTRL2 + (num - 6) * 2,  \
  @@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
  .enable_mask= S2MPA01_ENABLE_MASK   \
   }
 
  -#define regulator_desc_buck8   {   \
  -   .name   = BUCK8,  \
  -   .id = S2MPA01_BUCK8,\
  -   .ops= s2mpa01_buck_ops,\
  -   .type   = REGULATOR_VOLTAGE,\
  -   .owner  = THIS_MODULE,  \
  -   .min_uV = MIN_800_MV,   \
  -   .uV_step= STEP_12_5_MV, \
  -   .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
  -   .ramp_delay = S2MPA01_RAMP_DELAY,   \
  -   .vsel_reg   = S2MPA01_REG_B8CTRL2,  \
  -   .vsel_mask  = S2MPA01_BUCK_VSEL_MASK

Re: [PATCH 1/3] regulator: s2mpxxx: Move regulator min/step voltages in common place

2014-07-09 Thread amit daniel kachhap
On Wed, Jul 9, 2014 at 2:55 PM, Mark Brown broo...@kernel.org wrote:
 On Tue, Jul 08, 2014 at 05:57:58PM +0530, Amit Daniel Kachhap wrote:

  include/linux/mfd/samsung/core.h| 21 
  include/linux/mfd/samsung/s2mpa01.h | 12 -
  include/linux/mfd/samsung/s2mps11.h |  9 ---
  include/linux/mfd/samsung/s2mps14.h | 10 

 You need to send patches to the MFD subsystem to the MFD maintainers as
 well.

Thanks for the pointer. Will submit to MFD maintainers.
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Re: [PATCH 2/3] regulator: s2mpa01: Optimize the regulator description macro

2014-07-09 Thread amit daniel kachhap
Adding MFD maintainers.

On Tue, Jul 8, 2014 at 5:57 PM, Amit Daniel Kachhap
amit.dan...@samsung.com wrote:
 This patch makes the regulator description macro take minimum and
 steps voltage as parameter. In this way many repeated macros can be
 removed. Now these macros are repeated only if the the LDO/BUCK ctrl
 registers have non-linear positions. The good thing is these ctrl registers
 are mostly linear so they are not passed as parameters.

 This patch reduces the code size and also allow easy addition of more
 s2mpxxx PMIC drivers which differs a lot in minimum/step voltages.

 Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
 ---
  drivers/regulator/s2mpa01.c | 136 
 
  1 file changed, 37 insertions(+), 99 deletions(-)

 diff --git a/drivers/regulator/s2mpa01.c b/drivers/regulator/s2mpa01.c
 index 962c5f1..8073466 100644
 --- a/drivers/regulator/s2mpa01.c
 +++ b/drivers/regulator/s2mpa01.c
 @@ -235,28 +235,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .set_ramp_delay = s2mpa01_set_ramp_delay,
  };

 -#define regulator_desc_ldo1(num)   {   \
 +#define regulator_desc_ldo(num, min, step) {   \
 .name   = LDO#num,\
 .id = S2MPA01_LDO##num, \
 .ops= s2mpa01_ldo_ops, \
 .type   = REGULATOR_VOLTAGE,\
 .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_50_MV,   \
 -   .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
 -   .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
 -   .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
 -   .enable_reg = S2MPA01_REG_L1CTRL + num - 1, \
 -   .enable_mask= S2MPA01_ENABLE_MASK   \
 -}
 -#define regulator_desc_ldo2(num)   {   \
 -   .name   = LDO#num,\
 -   .id = S2MPA01_LDO##num, \
 -   .ops= s2mpa01_ldo_ops, \
 -   .type   = REGULATOR_VOLTAGE,\
 -   .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_25_MV,   \
 +   .min_uV = min,  \
 +   .uV_step= step, \
 .n_voltages = S2MPA01_LDO_N_VOLTAGES,   \
 .vsel_reg   = S2MPA01_REG_L1CTRL + num - 1, \
 .vsel_mask  = S2MPA01_LDO_VSEL_MASK,\
 @@ -296,14 +282,14 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .enable_mask= S2MPA01_ENABLE_MASK   \
  }

 -#define regulator_desc_buck6_7(num){   \
 +#define regulator_desc_buck6_10(num, min, step){   \
 .name   = BUCK#num,   \
 .id = S2MPA01_BUCK##num,\
 .ops= s2mpa01_buck_ops,\
 .type   = REGULATOR_VOLTAGE,\
 .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_600_MV,   \
 -   .uV_step= STEP_6_25_MV, \
 +   .min_uV = min,  \
 +   .uV_step= step, \
 .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
 .ramp_delay = S2MPA01_RAMP_DELAY,   \
 .vsel_reg   = S2MPA01_REG_B6CTRL2 + (num - 6) * 2,  \
 @@ -312,91 +298,43 @@ static struct regulator_ops s2mpa01_buck_ops = {
 .enable_mask= S2MPA01_ENABLE_MASK   \
  }

 -#define regulator_desc_buck8   {   \
 -   .name   = BUCK8,  \
 -   .id = S2MPA01_BUCK8,\
 -   .ops= s2mpa01_buck_ops,\
 -   .type   = REGULATOR_VOLTAGE,\
 -   .owner  = THIS_MODULE,  \
 -   .min_uV = MIN_800_MV,   \
 -   .uV_step= STEP_12_5_MV, \
 -   .n_voltages = S2MPA01_BUCK_N_VOLTAGES,  \
 -   .ramp_delay = S2MPA01_RAMP_DELAY,   \
 -   .vsel_reg   = S2MPA01_REG_B8CTRL2,  \
 -   .vsel_mask  = S2MPA01_BUCK_VSEL_MASK,   \
 -   .enable_reg = S2MPA01_REG_B8CTRL1,  \
 -   .enable_mask= S2MPA01_ENABLE_MASK   \
 -}
 -
 -#define regulator_desc_buck9   {   \
 -   .name   = BUCK9

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