[PATCH] drm/exynos: simplify sleep PM ops

2015-11-27 Thread Andrzej Hajda
PM ops in exynos_drm_drv were split into two separate function as they were
used also by drm device. Since PM ops have been removed from drm device, the
functions can be merged together.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi Inki,

This is the patch I have promised during our discussion about
PM callbcks in components.

Regards
Andrzej

 drivers/gpu/drm/exynos/exynos_drm_drv.c | 76 +
 1 file changed, 30 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 2c6019d..9756797a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -304,45 +304,6 @@ int exynos_atomic_commit(struct drm_device *dev, struct 
drm_atomic_state *state,
return 0;
 }
 
-#ifdef CONFIG_PM_SLEEP
-static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state)
-{
-   struct drm_connector *connector;
-
-   drm_modeset_lock_all(dev);
-   list_for_each_entry(connector, >mode_config.connector_list, head) {
-   int old_dpms = connector->dpms;
-
-   if (connector->funcs->dpms)
-   connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF);
-
-   /* Set the old mode back to the connector for resume */
-   connector->dpms = old_dpms;
-   }
-   drm_modeset_unlock_all(dev);
-
-   return 0;
-}
-
-static int exynos_drm_resume(struct drm_device *dev)
-{
-   struct drm_connector *connector;
-
-   drm_modeset_lock_all(dev);
-   list_for_each_entry(connector, >mode_config.connector_list, head) {
-   if (connector->funcs->dpms) {
-   int dpms = connector->dpms;
-
-   connector->dpms = DRM_MODE_DPMS_OFF;
-   connector->funcs->dpms(connector, dpms);
-   }
-   }
-   drm_modeset_unlock_all(dev);
-
-   return 0;
-}
-#endif
-
 static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
 {
struct drm_exynos_file_private *file_priv;
@@ -476,31 +437,54 @@ static struct drm_driver exynos_drm_driver = {
 };
 
 #ifdef CONFIG_PM_SLEEP
-static int exynos_drm_sys_suspend(struct device *dev)
+static int exynos_drm_suspend(struct device *dev)
 {
struct drm_device *drm_dev = dev_get_drvdata(dev);
-   pm_message_t message;
+   struct drm_connector *connector;
 
if (pm_runtime_suspended(dev) || !drm_dev)
return 0;
 
-   message.event = PM_EVENT_SUSPEND;
-   return exynos_drm_suspend(drm_dev, message);
+   drm_modeset_lock_all(drm_dev);
+   drm_for_each_connector(connector, drm_dev) {
+   int old_dpms = connector->dpms;
+
+   if (connector->funcs->dpms)
+   connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF);
+
+   /* Set the old mode back to the connector for resume */
+   connector->dpms = old_dpms;
+   }
+   drm_modeset_unlock_all(drm_dev);
+
+   return 0;
 }
 
-static int exynos_drm_sys_resume(struct device *dev)
+static int exynos_drm_resume(struct device *dev)
 {
struct drm_device *drm_dev = dev_get_drvdata(dev);
+   struct drm_connector *connector;
 
if (pm_runtime_suspended(dev) || !drm_dev)
return 0;
 
-   return exynos_drm_resume(drm_dev);
+   drm_modeset_lock_all(drm_dev);
+   drm_for_each_connector(connector, drm_dev) {
+   if (connector->funcs->dpms) {
+   int dpms = connector->dpms;
+
+   connector->dpms = DRM_MODE_DPMS_OFF;
+   connector->funcs->dpms(connector, dpms);
+   }
+   }
+   drm_modeset_unlock_all(drm_dev);
+
+   return 0;
 }
 #endif
 
 static const struct dev_pm_ops exynos_drm_pm_ops = {
-   SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_sys_suspend, exynos_drm_sys_resume)
+   SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_suspend, exynos_drm_resume)
 };
 
 /* forward declaration */
-- 
1.9.1

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[PATCH] drm/exynos: atomic check only enabled crtc states

2015-11-26 Thread Andrzej Hajda
Since atomic check is called also for disabled crtcs it should skip
mode checking as it can be uninitialized. The patch fixes it.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
Suggested-by: Daniel Vetter <daniel.vet...@ffwll.ch>
---
Hi Javier,

Could you check with this patch.

Regards
Andrzej

 drivers/gpu/drm/exynos/exynos_drm_crtc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index b3ba27f..e693571 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -55,6 +55,9 @@ static int exynos_crtc_atomic_check(struct drm_crtc *crtc,
 {
struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
 
+   if (!state->enable)
+   return 0;
+
if (exynos_crtc->ops->atomic_check)
return exynos_crtc->ops->atomic_check(exynos_crtc, state);
 
-- 
1.9.1

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Re: [PATCH] ARM: dts: exynos5422-odroid*: remove fimd node

2015-11-26 Thread Andrzej Hajda
Hi Javier, Krzysztof,

On 11/26/2015 04:49 AM, Krzysztof Kozlowski wrote:
...
> Do you have some test cases for MFC? I know that Gstreamer has support
> for it but I don't know what Gst pipelines I can use to test if all is
> working correctly.
> Yes, I think we have. I think Jacek Anaszewski or Andrzej Hajda (both
> Cc-ed) were developing MFC drivers and testing it.
>
> Jacek, Andrzej, Marek,
>
> Do you have test cases for Exynos MFC drivers? Is it possible to share them?

There are test apps at:
http://git.linuxtv.org/cgit.cgi/snawrocki/samsung-utils.git/
v4l2-mfc-example - MFC decoder,
v4l2-mfc-encoder - MFC encoder,


Regards
Andrzej

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Re: [PATCH] drm/exynos: only run atomic_check() if crtc is active

2015-11-20 Thread Andrzej Hajda
On 11/17/2015 05:12 PM, Daniel Vetter wrote:

(...)
> 
> Check crtc_state->enable, skip if false. That's the "is this pipeline
> configured" knob. For plane/connector it's state->crtc, but with the same
> role.
> 
> I guess we could check that in the helpers, but we need to be careful to
> still call ->atomic_check for the disabling transition, in case userspace
> is asking for a vblank-synced flip that disables a plane but somehow
> that's not possible. I somewhat prefer to handle that all in drivers
> though.
> -Daniel
> 

Thanks for the explanation, Gustavo will you update your patch?

Regards
Andrzej

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[PATCH 02/16 REBASED] dt-bindings: remove deprecated compatible string from exynos-hdmi

2015-11-18 Thread Andrzej Hajda
samsung,exynos5-hdmi compatible was marked as deprecated in Jun 2013.
It was never used since then.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
Reviewed-by: Gustavo Padovan <gustavo.pado...@collabora.co.uk>
---
 Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt 
b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
index 1fd8cf9..d474f59 100644
--- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt
@@ -2,10 +2,9 @@ Device-Tree bindings for drm hdmi driver
 
 Required properties:
 - compatible: value should be one among the following:
-   1) "samsung,exynos5-hdmi" 
-   2) "samsung,exynos4210-hdmi"
-   3) "samsung,exynos4212-hdmi"
-   4) "samsung,exynos5420-hdmi"
+   1) "samsung,exynos4210-hdmi"
+   2) "samsung,exynos4212-hdmi"
+   3) "samsung,exynos5420-hdmi"
 - reg: physical base address of the hdmi and length of memory mapped
region.
 - interrupts: interrupt number to the cpu.
-- 
1.9.1

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Re: [PATCH] drm/exynos: only run atomic_check() if crtc is active

2015-11-17 Thread Andrzej Hajda
Hi Daniel,

On 11/17/2015 11:06 AM, Daniel Vetter wrote:
> On Thu, Nov 12, 2015 at 02:49:29PM +0100, Thierry Reding wrote:
>> On Thu, Nov 12, 2015 at 11:11:20AM -0200, Gustavo Padovan wrote:
>>> From: Gustavo Padovan 
>>>
>>> Fixes an regression added by 3ae2436 (drm/exynos/mixer: replace
>>> direct cross-driver call with drm mode). The whole atomic update
>>> was failing if the hdmi display is not present/active. Add a test
>>> to only run atomic_check() if the CRTC is active.
>>>
>>> Signed-off-by: Gustavo Padovan 
>>> ---
>>>  drivers/gpu/drm/exynos/exynos_drm_crtc.c | 3 +++
>>>  1 file changed, 3 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
>>> b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>>> index b3ba27f..1d3ca0a 100644
>>> --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>>> +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
>>> @@ -55,6 +55,9 @@ static int exynos_crtc_atomic_check(struct drm_crtc *crtc,
>>>  {
>>> struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
>>>  
>>> +   if (!state->active)
>>> +   return 0;
>>> +
>>> if (exynos_crtc->ops->atomic_check)
>>> return exynos_crtc->ops->atomic_check(exynos_crtc, state);
>>>  
>>
>> This looks like something that the core should be doing.
> 
> Nah, this is a bug in exynos atomic_check code. Drivers _must_ check state
> irrespective of state->active - if they forgoe any checking when active =
> false then legacy DPMS On might spuriuosly fail, which will upset
> userspace. There shouldn't be any exceptions to this rule.
> 
> Cheers, Daniel
> 

What about the situation when we have two display pipelines
with separate crtcs:
- one for panel, fimd->dsi->panel,
- one for hdmi, mixer->hdmi->TV.

Since TV is not connected mixer state have mode initially filled
with zeros and active field set to 0. How should we handle situation
if userspace tries to enable dpms on HDMI connector?
How should we handle situation userspace tries to start panel pipeline?
In this case atomic_check for mixer is called also, but since
it will not be used and its state will not be changed it
should not return error, am I right?

Regards
Andrzej

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Re: [PATCH v2 0/7] drm/exynos: add pm runtime support

2015-11-04 Thread Andrzej Hajda
On 11/04/2015 08:56 AM, Inki Dae wrote:
>
> 2015년 11월 04일 16:24에 Andrzej Hajda 이(가) 쓴 글:
>> On 11/03/2015 04:38 PM, Inki Dae wrote:
>>>  
>>> 2015-11-03 22:24 GMT+09:00 Andrzej Hajda <a.ha...@samsung.com
>>> <mailto:a.ha...@samsung.com>>:
>>>> Hi Inki,
>>>>
>>>> On 11/03/2015 11:47 AM, Inki Dae wrote:
>>>>> This patch series adds pm runtime support for Exynos drm.
>>>>>
>>>>> Originally, this patch was posted by Gustavo but there was no any
>>>>> answer about some comments. So I rebased this patch series on top of
>>>>> exynos-drm-next, removed unnecessary patches and modified wrong macro.
>>>> I have sent comment to original patchset[1], but for some strange reasons
>>>> it went only to mailing lists.
>>>> My concerns were as follows:
>>>> - exynos_drm has already pm_runtime support via exynos_drm_drv pm ops,
>>>>   why should we add per component support?
>>>  
>>> For this, I think I already mentioned enough,
>>> http://www.spinics.net/lists/linux-samsung-soc/msg47695.html
>>>
>>> In brief, exynos_drm_drv doesn't control each power domain of each kms 
>>> device.
>>> It means that we cannot power off fully without pm runtime interface of each
>>> kms device - just they can only control their clock not power domain. So
>>> question. How we could control power domain of each kms device without 
>>> runtime
>>> pm interface?
>> Hmm, but to enable pm_runtime in components it is enough to use
>> pm_runtime_enable/disable and pm_runtime_get/put(_sync), there is no need to 
>> add
>> pm callbacks.
> That is this patch series does, and pm callback is implemented in 
> exynos_drm_drv not in component drivers.

But this patchset adds runtime_pm ops to each component. Runtime_pm support does
not require
implementing runtime_pm ops, they just increases complexity of the code, and I
see no gain in splitting
power off/on sequence between drm enable/disable callbacks and suspend/resume
callbacks.

Regards
Andrzej

>
>> In fact most of the components already supports runtime pm,  but quick grep
>> shows that it is not implemented in:
>> exynos_drm_dsi.c, exynos_dp_core.c, exynos_drm_mic.c.
> exynos_dp_core already has runtime pm interface with this patch series. For 
> dsi and mic, we need to add the runtime pm interfaces.
>
>> So I guess adding pm_runtime support by adding calls 
>> pm_runtime_enable/disable
>> and pm_runtime_get/put(_sync) in appropriate places should be enough.
>>
>>>> - component suspend sequence is non deterministic, but in case of
>>>>   video pipelines, specification often requires fixed order,
>>> Can your show me an example? I think component suspend and resume are 
>>> invoked
>>> by only drm dpms interface, and the dpms interface has a fixed order - when
>>> dpms goes to off, encoder first, and when dpms goes to on, crtc first.
>> Now as I understand you do not want to remove exynos_drm_drv pm callbacks so
>> they will disable devices properly, after that clock disabling order should 
>> not
>> matter, so the whole point is not valid.
> In this case, the dpms actually is invoked by SLEEP PM of Linux power 
> management framework. DRM KMS has a interface to control power of kms device, 
> which is really different from SLEEP PM.
> So this request can be done by userspace in runtime - just Display power 
> off/on.
>
>>> My only concern is that runtime pm interface of each kms driver is called
>>> within pm sleep context of Exynos drm driver. So I will look into this no 
>>> problem.
>>>
>>>> - the patchset adds implicit dependency on PM_SLEEP.
>>>>
>>>>
>>>> Current solution should work correctly and it was OK last time I have 
>>>> tested it.
>>>> I am not sure about atomic requirements, are there special ones?
>>> Not related to atomic feature.
>>>
>>>> There are other issues with current solution, rather easy to solve:
>>>> - it assumes that exynos-drm device will be suspended first - it should be 
>>>> true,
>>>>  as it is created at the end and suspend order is reverse to creation 
>>>> order, but
>>>>  I am not sure if we can rely on it - some solution is to add pm callbacks 
>>>> to
>>>>  all components, and from those callbacks call one centralized pm routine,
>>> You mean pm callbacks are pm sleep interface? And you mean let's add sleep 
>>>

Re: [PATCH v2 0/7] drm/exynos: add pm runtime support

2015-11-03 Thread Andrzej Hajda
Hi Inki,

On 11/03/2015 11:47 AM, Inki Dae wrote:
> This patch series adds pm runtime support for Exynos drm.
> 
> Originally, this patch was posted by Gustavo but there was no any
> answer about some comments. So I rebased this patch series on top of
> exynos-drm-next, removed unnecessary patches and modified wrong macro.

I have sent comment to original patchset[1], but for some strange reasons
it went only to mailing lists.
My concerns were as follows:
- exynos_drm has already pm_runtime support via exynos_drm_drv pm ops,
  why should we add per component support?
- component suspend sequence is non deterministic, but in case of
  video pipelines, specification often requires fixed order,
- the patchset adds implicit dependency on PM_SLEEP.


Current solution should work correctly and it was OK last time I have tested it.
I am not sure about atomic requirements, are there special ones?

There are other issues with current solution, rather easy to solve:
- it assumes that exynos-drm device will be suspended first - it should be true,
 as it is created at the end and suspend order is reverse to creation order, but
 I am not sure if we can rely on it - some solution is to add pm callbacks to
 all components, and from those callbacks call one centralized pm routine,
- suspend/resume callbacks theoretically can be called during component
  master initialization/deinitailization it could be racy,
- exynos_drm_sys_suspend/resume calls exynos_drm_suspend/resume
  for historical reasons, these function can be merged together.

[1]: http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/48395

Regards
Andrzej

> 
> Changelog v2:
> - Remove patch 5 and 6.
>   . commit callback are already removed so isn't required anymore.
> - Remove patch 8 which makes dp clock enabled directly from FIMD.
>   . Really not mendatory for FIMD uses DP, and it could be different
> according to Board.
> - Modified CONFIG_PM_SLEEP to CONFIG_PM.
>   . In case of runtime pm, CONFIG_PM macro should be used instead of
> CONFIG_PM_SLEEP.
> 
> Gustavo Padovan (7):
>   drm/exynos: do not start enabling DP at bind() phase
>   drm/exynos: add pm_runtime to DP
>   drm/exynos: add pm_runtime to HDMI
>   drm/exynos: add pm_runtime to Mixer
>   drm/exynos: add pm_runtime to FIMD
>   drm/exynos: add pm_runtime to DECON 5433
>   drm/exynos: add pm_runtime to DECON 7
> 
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c |  54 ++---
>  drivers/gpu/drm/exynos/exynos7_drm_decon.c| 125 +--
>  drivers/gpu/drm/exynos/exynos_dp_core.c   | 165 
> +++---
>  drivers/gpu/drm/exynos/exynos_dp_core.h   |   1 +
>  drivers/gpu/drm/exynos/exynos_drm_fimd.c  |  91 ++
>  drivers/gpu/drm/exynos/exynos_hdmi.c  |  56 ++---
>  drivers/gpu/drm/exynos/exynos_mixer.c | 125 ++-
>  7 files changed, 352 insertions(+), 265 deletions(-)
> 

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Re: [PATCH v2 0/7] drm/exynos: add pm runtime support

2015-11-03 Thread Andrzej Hajda
On 11/03/2015 04:38 PM, Inki Dae wrote:
>  
> 2015-11-03 22:24 GMT+09:00 Andrzej Hajda <a.ha...@samsung.com
> <mailto:a.ha...@samsung.com>>:
> > Hi Inki,
> >
> > On 11/03/2015 11:47 AM, Inki Dae wrote:
> >> This patch series adds pm runtime support for Exynos drm.
> >>
> >> Originally, this patch was posted by Gustavo but there was no any
> >> answer about some comments. So I rebased this patch series on top of
> >> exynos-drm-next, removed unnecessary patches and modified wrong macro.
> >
> > I have sent comment to original patchset[1], but for some strange reasons
> > it went only to mailing lists.
> > My concerns were as follows:
> > - exynos_drm has already pm_runtime support via exynos_drm_drv pm ops,
> >   why should we add per component support?
>  
> For this, I think I already mentioned enough,
> http://www.spinics.net/lists/linux-samsung-soc/msg47695.html
>
> In brief, exynos_drm_drv doesn't control each power domain of each kms device.
> It means that we cannot power off fully without pm runtime interface of each
> kms device - just they can only control their clock not power domain. So
> question. How we could control power domain of each kms device without runtime
> pm interface?

Hmm, but to enable pm_runtime in components it is enough to use
pm_runtime_enable/disable and pm_runtime_get/put(_sync), there is no need to add
pm callbacks.
In fact most of the components already supports runtime pm,  but quick grep
shows that it is not implemented in:
exynos_drm_dsi.c, exynos_dp_core.c, exynos_drm_mic.c.
So I guess adding pm_runtime support by adding calls pm_runtime_enable/disable
and pm_runtime_get/put(_sync) in appropriate places should be enough.

>
> > - component suspend sequence is non deterministic, but in case of
> >   video pipelines, specification often requires fixed order,
>
> Can your show me an example? I think component suspend and resume are invoked
> by only drm dpms interface, and the dpms interface has a fixed order - when
> dpms goes to off, encoder first, and when dpms goes to on, crtc first.

Now as I understand you do not want to remove exynos_drm_drv pm callbacks so
they will disable devices properly, after that clock disabling order should not
matter, so the whole point is not valid.

>
> My only concern is that runtime pm interface of each kms driver is called
> within pm sleep context of Exynos drm driver. So I will look into this no 
> problem.
>
> > - the patchset adds implicit dependency on PM_SLEEP.
> >
> >
> > Current solution should work correctly and it was OK last time I have 
> > tested it.
> > I am not sure about atomic requirements, are there special ones?
>
> Not related to atomic feature.
>
> >
> > There are other issues with current solution, rather easy to solve:
> > - it assumes that exynos-drm device will be suspended first - it should be 
> > true,
> >  as it is created at the end and suspend order is reverse to creation 
> > order, but
> >  I am not sure if we can rely on it - some solution is to add pm callbacks 
> > to
> >  all components, and from those callbacks call one centralized pm routine,
>
> You mean pm callbacks are pm sleep interface? And you mean let's add sleep pm
> interface to each kms driver?  If so, I'm not agree with you because sleep pm
> should be controlled by only drm top like single driver does.

Lets look at an example:
Assume we have present only fimd and dsi components.
In such case kernel creates two platform devices for fimd and dsi in early stage
of parsing device tree blob.
During exynos_drm_drv initialization exynos-drm platform device is created, the
important thing it is created after fimd and dsi.
Now when platform enters sleep mode suspend callbacks are called, the important
thing here is
in which order. If I remember correctly PM guarantees only that children will be
handled before parents.
Since we have no parent-child relation between exynos-drm, fimd and dsi, the
order is unknown.
So it will be possible that component will enter sleep mode before exynos-drm
and in such case system can even
hang if exynos-drm callbacks will try to access registers of such component.
Fortunately in current implementation of PM order of suspending is reversed
order of device creation, so
it will be always exynos-drm first.

So in short we rely here on implementation detail of PM framework.

>
> > - suspend/resume callbacks theoretically can be called during component
> >   master initialization/deinitailization it could be racy,
>
> I'm not sure what you mean but component master
> initialization/deinitailization mean bind and unbind? If so, bind/unbind
> interfaces of all components will never ca

[PATCH 7/7] drm/exynos/hdmi: add Exynos5433 support

2015-11-02 Thread Andrzej Hajda
HDMI on Exynos5433 differs from previous versions:
- different HDMI-PHY settings,
- different clocks,
- SYSREG registers for enabling reference clock,
- MODE_SET register in HDMI-PHY.
It is distinguished from other variants by different compatible string.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 142 +++
 drivers/gpu/drm/exynos/regs-hdmi.h   |   9 ++-
 2 files changed, 149 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index e44e2f6..46cf863 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -112,6 +112,7 @@ struct string_array_spec {
 struct hdmi_driver_data {
unsigned int type;
unsigned int is_apb_phy:1;
+   unsigned int has_sysreg:1;
struct hdmiphy_configs phy_confs;
struct string_array_spec clk_gates;
/*
@@ -140,6 +141,7 @@ struct hdmi_context {
struct gpio_desc*hpd_gpio;
int irq;
struct regmap   *pmureg;
+   struct regmap   *sysreg;
struct clk  **clk_gates;
struct clk  **clk_muxes;
struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
@@ -516,6 +518,90 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] 
= {
},
 };
 
+static const struct hdmiphy_config hdmiphy_5433_configs[] = {
+   {
+   .pixel_clock = 2700,
+   .conf = {
+   0x01, 0x51, 0x22, 0x51, 0x08, 0xfc, 0x88, 0x46,
+   0x72, 0x50, 0x24, 0x0c, 0x24, 0x0f, 0x7c, 0xa5,
+   0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 27027000,
+   .conf = {
+   0x01, 0x51, 0x2d, 0x72, 0x64, 0x09, 0x88, 0xc3,
+   0x71, 0x50, 0x24, 0x14, 0x24, 0x0f, 0x7c, 0xa5,
+   0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x28, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 4000,
+   .conf = {
+   0x01, 0x51, 0x32, 0x55, 0x01, 0x00, 0x88, 0x02,
+   0x4d, 0x50, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 5000,
+   .conf = {
+   0x01, 0x51, 0x34, 0x40, 0x64, 0x09, 0x88, 0xc3,
+   0x3d, 0x50, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 6500,
+   .conf = {
+   0x01, 0x51, 0x36, 0x31, 0x40, 0x10, 0x04, 0xc6,
+   0x2e, 0xe8, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 74176000,
+   .conf = {
+   0x01, 0x51, 0x3E, 0x35, 0x5B, 0xDE, 0x88, 0x42,
+   0x53, 0x51, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 7425,
+   .conf = {
+   0x01, 0x51, 0x3E, 0x35, 0x40, 0xF0, 0x88, 0xC2,
+   0x52, 0x51, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 10800,
+   .conf = {
+   0x01, 0x51, 0x2d, 0x15, 0x01, 0x00, 0x88, 0x02,
+   0x72, 0x52, 0x44, 0x8C, 0x27, 0x00, 0x7C, 0xAC,
+   0xD6, 0x2B, 0x67, 0x00, 0x00, 0x04, 0x00, 0x30,
+   0x08, 0x10, 0x01, 0x01, 0x48, 0x40, 0x00, 0x40,
+   },
+   },
+   {
+   .pixel_clock = 14850,
+   .conf = {
+   0x01, 0x51, 0x1f, 0x00, 0x40, 0xf8, 0x88, 0xc1,
+   0x52, 0x52, 0x24, 0x0c, 0x24, 0x0f, 0x7c, 0xa5,
+   0xd4, 0x2b, 0x87, 0x00, 0x00, 0x04, 0x00

[PATCH 4/7] drm/exynos/hdmi: code cleanup

2015-11-02 Thread Andrzej Hajda
The patch performs following clean-ups:
- remove unnecessary white spaces,
- remove obvious comments,
- fix tabulations,
- remove NULL initializators,
- re-order driver data.

The patch does not change driver's behavior.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 79 
 1 file changed, 26 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 5ff68db..13eea02 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -7,9 +7,9 @@
  *
  * Based on drivers/media/video/s5p-tv/hdmi_drv.c
  *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
  * option) any later version.
  *
  */
@@ -49,14 +49,16 @@
 
 /* AVI header and aspect ratio */
 #define HDMI_AVI_VERSION   0x02
-#define HDMI_AVI_LENGTH0x0D
+#define HDMI_AVI_LENGTH0x0d
 
 /* AUI header info */
-#define HDMI_AUI_VERSION   0x01
-#define HDMI_AUI_LENGTH0x0A
-#define AVI_SAME_AS_PIC_ASPECT_RATIO 0x8
-#define AVI_4_3_CENTER_RATIO   0x9
-#define AVI_16_9_CENTER_RATIO  0xa
+#define HDMI_AUI_VERSION   0x01
+#define HDMI_AUI_LENGTH0x0a
+
+/* AVI active format aspect ratio */
+#define AVI_SAME_AS_PIC_ASPECT_RATIO   0x08
+#define AVI_4_3_CENTER_RATIO   0x09
+#define AVI_16_9_CENTER_RATIO  0x0a
 
 enum hdmi_type {
HDMI_TYPE13,
@@ -154,7 +156,6 @@ static inline struct hdmi_context *connector_to_hdmi(struct 
drm_connector *c)
return container_of(c, struct hdmi_context, connector);
 }
 
-/* list of phy config settings */
 static const struct hdmiphy_config hdmiphy_v13_configs[] = {
{
.pixel_clock = 2700,
@@ -523,26 +524,24 @@ static const char * const hdmi_clk_muxes4[] = {
"sclk_pixel", "sclk_hdmiphy", "mout_hdmi"
 };
 
-static const struct hdmi_driver_data exynos5420_hdmi_driver_data = {
-   .type   = HDMI_TYPE14,
-   .is_apb_phy = 1,
-   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_5420_configs),
+static const struct hdmi_driver_data exynos4210_hdmi_driver_data = {
+   .type   = HDMI_TYPE13,
+   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_v13_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static const struct hdmi_driver_data exynos4212_hdmi_driver_data = {
.type   = HDMI_TYPE14,
-   .is_apb_phy = 0,
.phy_confs  = INIT_ARRAY_SPEC(hdmiphy_v14_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
-static const struct hdmi_driver_data exynos4210_hdmi_driver_data = {
-   .type   = HDMI_TYPE13,
-   .is_apb_phy = 0,
-   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_v13_configs),
+static const struct hdmi_driver_data exynos5420_hdmi_driver_data = {
+   .type   = HDMI_TYPE14,
+   .is_apb_phy = 1,
+   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_5420_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
@@ -1154,13 +1153,11 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder,
 
mode_ok = hdmi_mode_valid(connector, adjusted_mode);
 
-   /* just return if user desired mode exists. */
if (mode_ok == MODE_OK)
return true;
 
/*
-* otherwise, find the most suitable mode among modes and change it
-* to adjusted_mode.
+* Find the most suitable mode and copy it to adjusted_mode.
 */
list_for_each_entry(m, >modes, head) {
mode_ok = hdmi_mode_valid(connector, m);
@@ -1205,15 +1202,15 @@ static void hdmi_audio_init(struct hdmi_context *hdata)
switch (bits_per_sample) {
case 20:
data_num = 2;
-   bit_ch  = 1;
+   bit_ch = 1;
break;
case 24:
data_num = 3;
-   bit_ch  = 1;
+   bit_ch = 1;
break;
default:
data_num = 1;
-   bit_ch  = 0;
+   bit_ch = 0;
break;
}
 
@@ -1306,13 +1303,12 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
/* choose HDMI mode */
hdmi_reg_writemask(hdata, HDMI_MODE_SEL,
  

[PATCH 2/7] drm/exynos/hdmi: constify global variables

2015-11-02 Thread Andrzej Hajda
These variables should not be modified.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index d720b77..3b92d87 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -511,15 +511,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] 
= {
},
 };
 
-static const char *hdmi_clk_gates4[] = {
+static const char * const hdmi_clk_gates4[] = {
"hdmi", "sclk_hdmi"
 };
 
-static const char *hdmi_clk_muxes4[] = {
+static const char * const hdmi_clk_muxes4[] = {
"sclk_pixel", "sclk_hdmiphy", "mout_hdmi"
 };
 
-static struct hdmi_driver_data exynos5420_hdmi_driver_data = {
+static const struct hdmi_driver_data exynos5420_hdmi_driver_data = {
.type   = HDMI_TYPE14,
.phy_confs  = hdmiphy_5420_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs),
@@ -528,7 +528,7 @@ static struct hdmi_driver_data exynos5420_hdmi_driver_data 
= {
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
-static struct hdmi_driver_data exynos4212_hdmi_driver_data = {
+static const struct hdmi_driver_data exynos4212_hdmi_driver_data = {
.type   = HDMI_TYPE14,
.phy_confs  = hdmiphy_v14_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs),
@@ -537,7 +537,7 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data 
= {
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
-static struct hdmi_driver_data exynos4210_hdmi_driver_data = {
+static const struct hdmi_driver_data exynos4210_hdmi_driver_data = {
.type   = HDMI_TYPE13,
.phy_confs  = hdmiphy_v13_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
-- 
1.9.1

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[PATCH 6/7] dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant

2015-11-02 Thread Andrzej Hajda
Exynos5433 variant of HDMI requires different set of clocks and sysreg
phandle to system registers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 .../devicetree/bindings/video/exynos_hdmi.txt  | 27 +++---
 1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt 
b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index d474f59..4c3c582 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -5,6 +5,7 @@ Required properties:
1) "samsung,exynos4210-hdmi"
2) "samsung,exynos4212-hdmi"
3) "samsung,exynos5420-hdmi"
+   4) "samsung,exynos5433-hdmi"
 - reg: physical base address of the hdmi and length of memory mapped
region.
 - interrupts: interrupt number to the cpu.
@@ -12,6 +13,11 @@ Required properties:
a) phandle of the gpio controller node.
b) pin number within the gpio controller.
c) optional flags and pull up/down.
+- ddc: phandle to the hdmi ddc node
+- phy: phandle to the hdmi phy node
+- samsung,syscon-phandle: phandle for system controller node for PMU.
+
+Required properties for Exynos 4210, 4212 and 5420:
 - clocks: list of clock IDs from SoC clock driver.
a) hdmi: Gate of HDMI IP bus clock.
b) sclk_hdmi: Gate of HDMI special clock.
@@ -25,9 +31,24 @@ Required properties:
sclk_pixel.
 - clock-names: aliases as per driver requirements for above clock IDs:
"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
-- ddc: phandle to the hdmi ddc node
-- phy: phandle to the hdmi phy node
-- samsung,syscon-phandle: phandle for system controller node for PMU.
+
+Required properties for Exynos 5433:
+- clocks: list of clock specifiers according to common clock bindings.
+   a) hdmi_pclk: Gate of HDMI IP APB bus.
+   b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus.
+   d) i_tmds_clk: Gate of HDMI TMDS clock.
+   e) i_pixel_clk: Gate of HDMI pixel clock.
+   f) i_spdif_clk: Gate of HDMI SPDIF clock.
+   g) oscclk: Oscillator clock, used as parent of following *_user clocks
+   in case HDMI-PHY is not operational.
+   h) tmds_clko: TMDS clock generated by HDMI-PHY.
+   i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko,
+   respectively if HDMI-PHY is off and operational.
+   j) pixel_clko: Pixel clock generated by HDMI-PHY.
+   k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko,
+   respectively if HDMI-PHY is off and operational.
+- clock-names: aliases for above clock specfiers.
+- samsung,sysreg: handle to syscon used to control the system registers.
 
 Example:
 
-- 
1.9.1

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[PATCH 5/7] drm/exynos/hdmi: stop programming registers with default values

2015-11-02 Thread Andrzej Hajda
There is no point in rewriting default values, as the IP is reset anyway.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 19 ---
 1 file changed, 19 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 13eea02..e44e2f6 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1434,20 +1434,12 @@ static void hdmi_v13_mode_apply(struct hdmi_context 
*hdata)
hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
m->vtotal - m->vdisplay);
hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
-   hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x248);
}
 
hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay);
hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay);
hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_CHG_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_TOP_HDMI_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233);
 }
 
 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
@@ -1520,12 +1512,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context 
*hdata)
hdmi_reg_writev(hdata, HDMI_TG_VACT_ST_L, 2,
m->vtotal - m->vdisplay);
hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
-   hdmi_reg_writev(hdata, HDMI_TG_VACT_ST2_L, 2, 0x248);
-   hdmi_reg_writev(hdata, HDMI_TG_VACT_ST3_L, 2, 0x47b);
-   hdmi_reg_writev(hdata, HDMI_TG_VACT_ST4_L, 2, 0x6ae);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC2_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233);
}
 
hdmi_reg_writev(hdata, HDMI_H_SYNC_START_0, 2,
@@ -1555,11 +1541,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context 
*hdata)
hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay);
hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay);
hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_CHG_L, 2, 0x233);
-   hdmi_reg_writev(hdata, HDMI_TG_VSYNC_TOP_HDMI_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1);
-   hdmi_reg_writev(hdata, HDMI_TG_3D, 1, 0x0);
 }
 
 static void hdmi_mode_apply(struct hdmi_context *hdata)
-- 
1.9.1

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[PATCH 3/7] drm/exynos/hdmi: use array specifier for HDMI-PHY configurations

2015-11-02 Thread Andrzej Hajda
HDMI-PHY configurations are stored as array pointer and count pair,
we can re-use existing helpers to simplify their initialization.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 34 ++
 1 file changed, 18 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 3b92d87..5ff68db 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -90,6 +90,16 @@ static const char * const supply[] = {
"vdd_pll",
 };
 
+struct hdmiphy_config {
+   int pixel_clock;
+   u8 conf[32];
+};
+
+struct hdmiphy_configs {
+   int count;
+   const struct hdmiphy_config *data;
+};
+
 struct string_array_spec {
int count;
const char * const *data;
@@ -99,9 +109,8 @@ struct string_array_spec {
 
 struct hdmi_driver_data {
unsigned int type;
-   const struct hdmiphy_config *phy_confs;
-   unsigned int phy_conf_count;
unsigned int is_apb_phy:1;
+   struct hdmiphy_configs phy_confs;
struct string_array_spec clk_gates;
/*
 * Array of triplets (p_off, p_on, clock), where p_off and p_on are
@@ -145,11 +154,6 @@ static inline struct hdmi_context 
*connector_to_hdmi(struct drm_connector *c)
return container_of(c, struct hdmi_context, connector);
 }
 
-struct hdmiphy_config {
-   int pixel_clock;
-   u8 conf[32];
-};
-
 /* list of phy config settings */
 static const struct hdmiphy_config hdmiphy_v13_configs[] = {
{
@@ -521,27 +525,24 @@ static const char * const hdmi_clk_muxes4[] = {
 
 static const struct hdmi_driver_data exynos5420_hdmi_driver_data = {
.type   = HDMI_TYPE14,
-   .phy_confs  = hdmiphy_5420_configs,
-   .phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs),
.is_apb_phy = 1,
+   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_5420_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static const struct hdmi_driver_data exynos4212_hdmi_driver_data = {
.type   = HDMI_TYPE14,
-   .phy_confs  = hdmiphy_v14_configs,
-   .phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs),
.is_apb_phy = 0,
+   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_v14_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static const struct hdmi_driver_data exynos4210_hdmi_driver_data = {
.type   = HDMI_TYPE13,
-   .phy_confs  = hdmiphy_v13_configs,
-   .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
.is_apb_phy = 0,
+   .phy_confs  = INIT_ARRAY_SPEC(hdmiphy_v13_configs),
.clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
.clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
@@ -1067,10 +1068,11 @@ static int hdmi_get_modes(struct drm_connector 
*connector)
 
 static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
 {
+   const struct hdmiphy_configs *confs = >drv_data->phy_confs;
int i;
 
-   for (i = 0; i < hdata->drv_data->phy_conf_count; i++)
-   if (hdata->drv_data->phy_confs[i].pixel_clock == pixel_clock)
+   for (i = 0; i < confs->count; i++)
+   if (confs->data[i].pixel_clock == pixel_clock)
return i;
 
DRM_DEBUG_KMS("Could not find phy config for %d\n", pixel_clock);
@@ -1611,7 +1613,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)
}
 
ret = hdmiphy_reg_write_buf(hdata, 0,
-   hdata->drv_data->phy_confs[i].conf, 32);
+   hdata->drv_data->phy_confs.data[i].conf, 32);
if (ret) {
DRM_ERROR("failed to configure hdmiphy\n");
return;
-- 
1.9.1

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[PATCH 1/7] drm/exynos/hdmi: clock code re-factoring

2015-11-02 Thread Andrzej Hajda
With incoming support for newer SoCs different set of clocks will be required,
depending on IP version. The patch prepares the driver for it.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 184 ++-
 1 file changed, 137 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 57b6755..d720b77 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -90,11 +90,24 @@ static const char * const supply[] = {
"vdd_pll",
 };
 
+struct string_array_spec {
+   int count;
+   const char * const *data;
+};
+
+#define INIT_ARRAY_SPEC(a) { .count = ARRAY_SIZE(a), .data = a }
+
 struct hdmi_driver_data {
unsigned int type;
const struct hdmiphy_config *phy_confs;
unsigned int phy_conf_count;
unsigned int is_apb_phy:1;
+   struct string_array_spec clk_gates;
+   /*
+* Array of triplets (p_off, p_on, clock), where p_off and p_on are
+* required parents of clock when HDMI-PHY is respectively off or on.
+*/
+   struct string_array_spec clk_muxes;
 };
 
 struct hdmi_context {
@@ -116,11 +129,8 @@ struct hdmi_context {
struct gpio_desc*hpd_gpio;
int irq;
struct regmap   *pmureg;
-   struct clk  *hdmi;
-   struct clk  *sclk_hdmi;
-   struct clk  *sclk_pixel;
-   struct clk  *sclk_hdmiphy;
-   struct clk  *mout_hdmi;
+   struct clk  **clk_gates;
+   struct clk  **clk_muxes;
struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
struct regulator*reg_hdmi_en;
 };
@@ -501,11 +511,21 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] 
= {
},
 };
 
+static const char *hdmi_clk_gates4[] = {
+   "hdmi", "sclk_hdmi"
+};
+
+static const char *hdmi_clk_muxes4[] = {
+   "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"
+};
+
 static struct hdmi_driver_data exynos5420_hdmi_driver_data = {
.type   = HDMI_TYPE14,
.phy_confs  = hdmiphy_5420_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_5420_configs),
.is_apb_phy = 1,
+   .clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
+   .clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static struct hdmi_driver_data exynos4212_hdmi_driver_data = {
@@ -513,6 +533,8 @@ static struct hdmi_driver_data exynos4212_hdmi_driver_data 
= {
.phy_confs  = hdmiphy_v14_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_v14_configs),
.is_apb_phy = 0,
+   .clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
+   .clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static struct hdmi_driver_data exynos4210_hdmi_driver_data = {
@@ -520,6 +542,8 @@ static struct hdmi_driver_data exynos4210_hdmi_driver_data 
= {
.phy_confs  = hdmiphy_v13_configs,
.phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
.is_apb_phy = 0,
+   .clk_gates  = INIT_ARRAY_SPEC(hdmi_clk_gates4),
+   .clk_muxes  = INIT_ARRAY_SPEC(hdmi_clk_muxes4),
 };
 
 static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
@@ -847,6 +871,54 @@ static void hdmi_regs_dump(struct hdmi_context *hdata, 
char *prefix)
hdmi_v14_regs_dump(hdata, prefix);
 }
 
+static int hdmi_clk_enable_gates(struct hdmi_context *hdata)
+{
+   int i, ret;
+
+   for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
+   ret = clk_prepare_enable(hdata->clk_gates[i]);
+   if (!ret)
+   continue;
+
+   dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",
+   hdata->drv_data->clk_gates.data[i], ret);
+   while (i--)
+   clk_disable_unprepare(hdata->clk_gates[i]);
+   return ret;
+   }
+
+   return 0;
+}
+
+static void hdmi_clk_disable_gates(struct hdmi_context *hdata)
+{
+   int i = hdata->drv_data->clk_gates.count;
+
+   while (i--)
+   clk_disable_unprepare(hdata->clk_gates[i]);
+}
+
+static int hdmi_clk_set_parents(struct hdmi_context *hdata, bool to_phy)
+{
+   struct device *dev = hdata->dev;
+   int ret = 0;
+   int i;
+
+   for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
+   struct clk **c = >clk_muxes[i];
+
+   ret = clk_set_parent(c[2], c[to_phy]);
+   if (!ret)
+   continue;
+
+   dev_err(dev, "Cannot set clock parent of '%s' to '%s', %d\n",
+ 

[PATCH 0/7] drm/exynos/hdmi: add Exynos5433 support

2015-11-02 Thread Andrzej Hajda
Hi Inki, Krzysztof,

This patchset adds support for Exynos 5433 HDMI.
There are also few preparation/cleanup patches.
All patches except one touch only exynos-drm.
Sixth patch adds binding properties for Exynos5433 HDMI,
Krzysztof could you look at it.

The patchset is based on exynos-drm-next.

Regards
Andrzej


Andrzej Hajda (7):
  drm/exynos/hdmi: clock code re-factoring
  drm/exynos/hdmi: constify global variables
  drm/exynos/hdmi: use array specifier for HDMI-PHY configurations
  drm/exynos/hdmi: code cleanup
  drm/exynos/hdmi: stop programming registers with default values
  dt-bindings: exynos_hdmi: add bindings for Exynos5433 variant
  drm/exynos/hdmi: add Exynos5433 support

 .../devicetree/bindings/video/exynos_hdmi.txt  |  27 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c   | 454 +++--
 drivers/gpu/drm/exynos/regs-hdmi.h |   9 +-
 3 files changed, 352 insertions(+), 138 deletions(-)

-- 
1.9.1

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[PATCH] ARM: multi_v7_defconfig: enable Exynos DRM Mixer driver

2015-10-29 Thread Andrzej Hajda
Mixer driver is selected by CONFIG_DRM_EXYNOS_HDMI option. Since Exynos5433
HDMI does not require Mixer and there are separate options to select Mixer
and HDMI.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig 
b/arch/arm/configs/multi_v7_defconfig
index 03deb7f..ca5e928 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -449,6 +449,7 @@ CONFIG_DRM_NOUVEAU=m
 CONFIG_DRM_EXYNOS=m
 CONFIG_DRM_EXYNOS_DSI=y
 CONFIG_DRM_EXYNOS_FIMD=y
+CONFIG_DRM_EXYNOS_MIXER=y
 CONFIG_DRM_EXYNOS_HDMI=y
 CONFIG_DRM_RCAR_DU=m
 CONFIG_DRM_TEGRA=y
-- 
1.9.1

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[PATCH 7/7] drm/exynos: simplify Kconfig component names

2015-10-26 Thread Andrzej Hajda
Many Exynos DRM sub-options mentions Exynos DRM in their titles.
It is redundant and can be safely shortened. The patch additionally
makes some entries more descriptive.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/Kconfig | 30 +++---
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 86ff8ab..fbc28fa 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -21,7 +21,7 @@ config DRM_EXYNOS_IOMMU
 comment "CRTCs"
 
 config DRM_EXYNOS_FIMD
-   bool "Exynos DRM FIMD"
+   bool "FIMD"
depends on !FB_S3C
select FB_MODE_HELPERS
select MFD_SYSCON
@@ -29,32 +29,32 @@ config DRM_EXYNOS_FIMD
  Choose this option if you want to use Exynos FIMD for DRM.
 
 config DRM_EXYNOS5433_DECON
-   bool "Exynos5433 DRM DECON"
+   bool "DECON on Exynos5433"
help
  Choose this option if you want to use Exynos5433 DECON for DRM.
 
 config DRM_EXYNOS7_DECON
-   bool "Exynos7 DRM DECON"
+   bool "DECON on Exynos7"
depends on !FB_S3C
select FB_MODE_HELPERS
help
  Choose this option if you want to use Exynos DECON for DRM.
 
 config DRM_EXYNOS_MIXER
-   bool "Exynos DRM Mixer"
+   bool "Mixer"
depends on !VIDEO_SAMSUNG_S5P_TV
help
  Choose this option if you want to use Exynos Mixer for DRM.
 
 config DRM_EXYNOS_VIDI
-   bool "Exynos DRM Virtual Display"
+   bool "Virtual Display"
help
  Choose this option if you want to use Exynos VIDI for DRM.
 
 comment "Encoders and Bridges"
 
 config DRM_EXYNOS_DPI
-   bool "EXYNOS DRM parallel output support"
+   bool "Parallel output"
depends on DRM_EXYNOS_FIMD
select DRM_PANEL
default n
@@ -62,7 +62,7 @@ config DRM_EXYNOS_DPI
  This enables support for Exynos parallel output.
 
 config DRM_EXYNOS_DSI
-   bool "EXYNOS DRM MIPI-DSI driver support"
+   bool "MIPI-DSI host"
depends on DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || DRM_EXYNOS7_DECON
select DRM_MIPI_DSI
select DRM_PANEL
@@ -71,7 +71,7 @@ config DRM_EXYNOS_DSI
  This enables support for Exynos MIPI-DSI device.
 
 config DRM_EXYNOS_DP
-   bool "EXYNOS DRM DP driver support"
+   bool "Display Port"
depends on DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON
default DRM_EXYNOS
select DRM_PANEL
@@ -79,13 +79,13 @@ config DRM_EXYNOS_DP
  This enables support for DP device.
 
 config DRM_EXYNOS_HDMI
-   bool "Exynos DRM HDMI"
+   bool "HDMI"
depends on !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || 
DRM_EXYNOS5433_DECON)
help
  Choose this option if you want to use Exynos HDMI for DRM.
 
 config DRM_EXYNOS_MIC
-   bool "Exynos DRM MIC"
+   bool "Mobile Image Compressor"
depends on DRM_EXYNOS5433_DECON
help
  Choose this option if you want to use Exynos MIC for DRM.
@@ -93,31 +93,31 @@ config DRM_EXYNOS_MIC
 comment "Sub-drivers"
 
 config DRM_EXYNOS_G2D
-   bool "Exynos DRM G2D"
+   bool "G2D"
depends on !VIDEO_SAMSUNG_S5P_G2D
select FRAME_VECTOR
help
  Choose this option if you want to use Exynos G2D for DRM.
 
 config DRM_EXYNOS_IPP
-   bool "Exynos DRM IPP"
+   bool "Image Post Processor"
help
  Choose this option if you want to use IPP feature for DRM.
 
 config DRM_EXYNOS_FIMC
-   bool "Exynos DRM FIMC"
+   bool "FIMC"
depends on DRM_EXYNOS_IPP && MFD_SYSCON
help
  Choose this option if you want to use Exynos FIMC for DRM.
 
 config DRM_EXYNOS_ROTATOR
-   bool "Exynos DRM Rotator"
+   bool "Rotator"
depends on DRM_EXYNOS_IPP
help
  Choose this option if you want to use Exynos Rotator for DRM.
 
 config DRM_EXYNOS_GSC
-   bool "Exynos DRM GSC"
+   bool "GScaler"
depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !ARCH_MULTIPLATFORM
help
  Choose this option if you want to use Exynos GSC for DRM.
-- 
1.9.1

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[PATCH 1/7] drm/exynos: add atomic_check callback to exynos_crtc

2015-10-26 Thread Andrzej Hajda
Some CRTCs needs mode validation, this patch adds neccessary
callback to Exynos DRM framework. It is called from DRM core
via atomic_check helper for drm_crtc.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_crtc.c | 12 
 drivers/gpu/drm/exynos/exynos_drm_drv.h  |  3 +++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c 
b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 50dec0d..b3ba27f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -50,6 +50,17 @@ exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
exynos_crtc->ops->commit(exynos_crtc);
 }
 
+static int exynos_crtc_atomic_check(struct drm_crtc *crtc,
+struct drm_crtc_state *state)
+{
+   struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+
+   if (exynos_crtc->ops->atomic_check)
+   return exynos_crtc->ops->atomic_check(exynos_crtc, state);
+
+   return 0;
+}
+
 static void exynos_crtc_atomic_begin(struct drm_crtc *crtc,
 struct drm_crtc_state *old_crtc_state)
 {
@@ -86,6 +97,7 @@ static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs 
= {
.enable = exynos_drm_crtc_enable,
.disable= exynos_drm_crtc_disable,
.mode_set_nofb  = exynos_drm_crtc_mode_set_nofb,
+   .atomic_check   = exynos_crtc_atomic_check,
.atomic_begin   = exynos_crtc_atomic_begin,
.atomic_flush   = exynos_crtc_atomic_flush,
 };
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h 
b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 638fc43..f1eda7f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -89,6 +89,7 @@ struct exynos_drm_plane {
  * @disable_vblank: specific driver callback for disabling vblank interrupt.
  * @wait_for_vblank: wait for vblank interrupt to make sure that
  * hardware overlay is updated.
+ * @atomic_check: validate state
  * @atomic_begin: prepare a window to receive a update
  * @atomic_flush: mark the end of a window update
  * @update_plane: apply hardware specific overlay data to registers.
@@ -108,6 +109,8 @@ struct exynos_drm_crtc_ops {
int (*enable_vblank)(struct exynos_drm_crtc *crtc);
void (*disable_vblank)(struct exynos_drm_crtc *crtc);
void (*wait_for_vblank)(struct exynos_drm_crtc *crtc);
+   int (*atomic_check)(struct exynos_drm_crtc *crtc,
+   struct drm_crtc_state *state);
void (*atomic_begin)(struct exynos_drm_crtc *crtc,
  struct exynos_drm_plane *plane);
void (*update_plane)(struct exynos_drm_crtc *crtc,
-- 
1.9.1

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[PATCH 4/7] drm/exynos: separate Mixer and HDMI drivers

2015-10-26 Thread Andrzej Hajda
Latest Exynos SoCs does not have Mixer IP, but they still have HDMI IP.
Their drivers should be configurable separately.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/Kconfig  | 8 +++-
 drivers/gpu/drm/exynos/Makefile | 3 ++-
 drivers/gpu/drm/exynos/exynos_drm_drv.c | 4 +++-
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 16cb1f7..c0dc056 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -62,9 +62,15 @@ config DRM_EXYNOS_DP
help
  This enables support for DP device.
 
+config DRM_EXYNOS_MIXER
+   bool "Exynos DRM Mixer"
+   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV
+   help
+ Choose this option if you want to use Exynos Mixer for DRM.
+
 config DRM_EXYNOS_HDMI
bool "Exynos DRM HDMI"
-   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV
+   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || 
DRM_EXYNOS5433_DECON)
help
  Choose this option if you want to use Exynos HDMI for DRM.
 
diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile
index 02aecfe..6496532 100644
--- a/drivers/gpu/drm/exynos/Makefile
+++ b/drivers/gpu/drm/exynos/Makefile
@@ -14,7 +14,8 @@ exynosdrm-$(CONFIG_DRM_EXYNOS7_DECON) += exynos7_drm_decon.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_DPI) += exynos_drm_dpi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_DSI) += exynos_drm_dsi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_DP)  += exynos_dp_core.o exynos_dp_reg.o
-exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)+= exynos_hdmi.o exynos_mixer.o
+exynosdrm-$(CONFIG_DRM_EXYNOS_MIXER)   += exynos_mixer.o
+exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)+= exynos_hdmi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)+= exynos_drm_vidi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_G2D) += exynos_drm_g2d.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_IPP) += exynos_drm_ipp.o
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 0a05117..ba4de7d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -531,8 +531,10 @@ static struct platform_driver *const 
exynos_drm_kms_drivers[] = {
 #ifdef CONFIG_DRM_EXYNOS_DSI
_driver,
 #endif
-#ifdef CONFIG_DRM_EXYNOS_HDMI
+#ifdef CONFIG_DRM_EXYNOS_MIXER
_driver,
+#endif
+#ifdef CONFIG_DRM_EXYNOS_HDMI
_driver,
 #endif
 #ifdef CONFIG_DRM_EXYNOS_VIDI
-- 
1.9.1

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[PATCH 6/7] drm/exynos: re-arrange Kconfig entries

2015-10-26 Thread Andrzej Hajda
Exynos DRM driver have quite big number of components and options.
The patch re-arranges them into three logical groups:
- CRTCs,
- Encoders and Bridges,
- Sub-drivers.
It should make driver options more clear.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/Kconfig | 38 ++
 1 file changed, 22 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 25351d0..86ff8ab 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -18,6 +18,8 @@ config DRM_EXYNOS_IOMMU
depends on EXYNOS_IOMMU && ARM_DMA_USE_IOMMU
default y
 
+comment "CRTCs"
+
 config DRM_EXYNOS_FIMD
bool "Exynos DRM FIMD"
depends on !FB_S3C
@@ -38,9 +40,22 @@ config DRM_EXYNOS7_DECON
help
  Choose this option if you want to use Exynos DECON for DRM.
 
+config DRM_EXYNOS_MIXER
+   bool "Exynos DRM Mixer"
+   depends on !VIDEO_SAMSUNG_S5P_TV
+   help
+ Choose this option if you want to use Exynos Mixer for DRM.
+
+config DRM_EXYNOS_VIDI
+   bool "Exynos DRM Virtual Display"
+   help
+ Choose this option if you want to use Exynos VIDI for DRM.
+
+comment "Encoders and Bridges"
+
 config DRM_EXYNOS_DPI
bool "EXYNOS DRM parallel output support"
-   depends on DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON
+   depends on DRM_EXYNOS_FIMD
select DRM_PANEL
default n
help
@@ -63,22 +78,19 @@ config DRM_EXYNOS_DP
help
  This enables support for DP device.
 
-config DRM_EXYNOS_MIXER
-   bool "Exynos DRM Mixer"
-   depends on !VIDEO_SAMSUNG_S5P_TV
-   help
- Choose this option if you want to use Exynos Mixer for DRM.
-
 config DRM_EXYNOS_HDMI
bool "Exynos DRM HDMI"
depends on !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || 
DRM_EXYNOS5433_DECON)
help
  Choose this option if you want to use Exynos HDMI for DRM.
 
-config DRM_EXYNOS_VIDI
-   bool "Exynos DRM Virtual Display"
+config DRM_EXYNOS_MIC
+   bool "Exynos DRM MIC"
+   depends on DRM_EXYNOS5433_DECON
help
- Choose this option if you want to use Exynos VIDI for DRM.
+ Choose this option if you want to use Exynos MIC for DRM.
+
+comment "Sub-drivers"
 
 config DRM_EXYNOS_G2D
bool "Exynos DRM G2D"
@@ -110,10 +122,4 @@ config DRM_EXYNOS_GSC
help
  Choose this option if you want to use Exynos GSC for DRM.
 
-config DRM_EXYNOS_MIC
-   bool "Exynos DRM MIC"
-   depends on DRM_EXYNOS5433_DECON
-   help
- Choose this option if you want to use Exynos MIC for DRM.
-
 endif
-- 
1.9.1

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[PATCH 5/7] drm/exynos: abstract out common dependency

2015-10-26 Thread Andrzej Hajda
All options depends on DRM_EXYNOS so it can be moved to enclosing if clause.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/Kconfig | 27 ++-
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index c0dc056..25351d0 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -11,14 +11,16 @@ config DRM_EXYNOS
  Choose this option if you have a Samsung SoC EXYNOS chipset.
  If M is selected the module will be called exynosdrm.
 
+if DRM_EXYNOS
+
 config DRM_EXYNOS_IOMMU
bool
-   depends on DRM_EXYNOS && EXYNOS_IOMMU && ARM_DMA_USE_IOMMU
+   depends on EXYNOS_IOMMU && ARM_DMA_USE_IOMMU
default y
 
 config DRM_EXYNOS_FIMD
bool "Exynos DRM FIMD"
-   depends on DRM_EXYNOS && !FB_S3C
+   depends on !FB_S3C
select FB_MODE_HELPERS
select MFD_SYSCON
help
@@ -26,20 +28,19 @@ config DRM_EXYNOS_FIMD
 
 config DRM_EXYNOS5433_DECON
bool "Exynos5433 DRM DECON"
-   depends on DRM_EXYNOS
help
  Choose this option if you want to use Exynos5433 DECON for DRM.
 
 config DRM_EXYNOS7_DECON
bool "Exynos7 DRM DECON"
-   depends on DRM_EXYNOS && !FB_S3C
+   depends on !FB_S3C
select FB_MODE_HELPERS
help
  Choose this option if you want to use Exynos DECON for DRM.
 
 config DRM_EXYNOS_DPI
bool "EXYNOS DRM parallel output support"
-   depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)
+   depends on DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON
select DRM_PANEL
default n
help
@@ -47,7 +48,7 @@ config DRM_EXYNOS_DPI
 
 config DRM_EXYNOS_DSI
bool "EXYNOS DRM MIPI-DSI driver support"
-   depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || 
DRM_EXYNOS7_DECON)
+   depends on DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || DRM_EXYNOS7_DECON
select DRM_MIPI_DSI
select DRM_PANEL
default n
@@ -56,7 +57,7 @@ config DRM_EXYNOS_DSI
 
 config DRM_EXYNOS_DP
bool "EXYNOS DRM DP driver support"
-   depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)
+   depends on DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON
default DRM_EXYNOS
select DRM_PANEL
help
@@ -64,32 +65,30 @@ config DRM_EXYNOS_DP
 
 config DRM_EXYNOS_MIXER
bool "Exynos DRM Mixer"
-   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV
+   depends on !VIDEO_SAMSUNG_S5P_TV
help
  Choose this option if you want to use Exynos Mixer for DRM.
 
 config DRM_EXYNOS_HDMI
bool "Exynos DRM HDMI"
-   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || 
DRM_EXYNOS5433_DECON)
+   depends on !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || 
DRM_EXYNOS5433_DECON)
help
  Choose this option if you want to use Exynos HDMI for DRM.
 
 config DRM_EXYNOS_VIDI
bool "Exynos DRM Virtual Display"
-   depends on DRM_EXYNOS
help
  Choose this option if you want to use Exynos VIDI for DRM.
 
 config DRM_EXYNOS_G2D
bool "Exynos DRM G2D"
-   depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_G2D
+   depends on !VIDEO_SAMSUNG_S5P_G2D
select FRAME_VECTOR
help
  Choose this option if you want to use Exynos G2D for DRM.
 
 config DRM_EXYNOS_IPP
bool "Exynos DRM IPP"
-   depends on DRM_EXYNOS
help
  Choose this option if you want to use IPP feature for DRM.
 
@@ -113,6 +112,8 @@ config DRM_EXYNOS_GSC
 
 config DRM_EXYNOS_MIC
bool "Exynos DRM MIC"
-   depends on (DRM_EXYNOS && DRM_EXYNOS5433_DECON)
+   depends on DRM_EXYNOS5433_DECON
help
  Choose this option if you want to use Exynos MIC for DRM.
+
+endif
-- 
1.9.1

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[PATCH 3/7] ARM: exynos_defconfig: enable Exynos DRM Mixer driver

2015-10-26 Thread Andrzej Hajda
Mixer driver is selected by CONFIG_DRM_EXYNOS_HDMI option. Since Exynos5433
HDMI does not require Mixer. There will be separate options to select Mixer
and HDMI. Adding new option to defconfig before Kconfig will allow to keep
bisectability.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 arch/arm/configs/exynos_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/exynos_defconfig 
b/arch/arm/configs/exynos_defconfig
index 1ff2bfa..af79a21 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -132,6 +132,7 @@ CONFIG_DRM_PARADE_PS8622=y
 CONFIG_DRM_EXYNOS=y
 CONFIG_DRM_EXYNOS_FIMD=y
 CONFIG_DRM_EXYNOS_DSI=y
+CONFIG_DRM_EXYNOS_MIXER=y
 CONFIG_DRM_EXYNOS_HDMI=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y
-- 
1.9.1

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[PATCH 0/7] add atomic_check callback to exynos_crtc

2015-10-26 Thread Andrzej Hajda
Hi Inki,

This patchset removes hacky mode validation in Mixer driver by adding
atomic_check callback to exynos_crtc and replacing direct function call
with DRM framework validation. As a result HDMI driver does not depend anymore
on MIXER driver and both drivers can be selected with different Kconfig options,
it is usefull especially for latests SoCs which do have HDMI IP but do not have
MIXER IP.
Additionally patchset performs small Kconfig refactoring.

Krzysztof could you look at exynos_defconfig patch. Maybe it would be good
to merge it before next patch to allow full bi-sectability :)

Regards
Andrzej


Andrzej Hajda (7):
  drm/exynos: add atomic_check callback to exynos_crtc
  drm/exynos/mixer: replace direct cross-driver call with drm mode
validation
  ARM: exynos_defconfig: enable Exynos DRM Mixer driver
  drm/exynos: separate Mixer and HDMI drivers
  drm/exynos: abstract out common dependency
  drm/exynos: re-arrange Kconfig entries
  drm/exynos: simplify Kconfig component names

 arch/arm/configs/exynos_defconfig|  1 +
 drivers/gpu/drm/exynos/Kconfig   | 75 +++-
 drivers/gpu/drm/exynos/Makefile  |  3 +-
 drivers/gpu/drm/exynos/exynos_drm_crtc.c | 12 +
 drivers/gpu/drm/exynos/exynos_drm_drv.c  |  4 +-
 drivers/gpu/drm/exynos/exynos_drm_drv.h  |  3 ++
 drivers/gpu/drm/exynos/exynos_hdmi.c |  5 ---
 drivers/gpu/drm/exynos/exynos_mixer.c|  6 ++-
 drivers/gpu/drm/exynos/exynos_mixer.h| 20 -
 9 files changed, 69 insertions(+), 60 deletions(-)
 delete mode 100644 drivers/gpu/drm/exynos/exynos_mixer.h

-- 
1.9.1

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[PATCH 2/7] drm/exynos/mixer: replace direct cross-driver call with drm mode validation

2015-10-26 Thread Andrzej Hajda
HDMI driver called directly function from MIXER driver to invalidate modes
not supported by MIXER. The patch replaces the hack with proper .atomic_check
callback.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c  |  5 -
 drivers/gpu/drm/exynos/exynos_mixer.c |  6 --
 drivers/gpu/drm/exynos/exynos_mixer.h | 20 
 3 files changed, 4 insertions(+), 27 deletions(-)
 delete mode 100644 drivers/gpu/drm/exynos/exynos_mixer.h

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index b0f5ff4..57b6755 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -44,7 +44,6 @@
 
 #include "exynos_drm_drv.h"
 #include "exynos_drm_crtc.h"
-#include "exynos_mixer.h"
 
 #define HOTPLUG_DEBOUNCE_MS1100
 
@@ -1017,10 +1016,6 @@ static int hdmi_mode_valid(struct drm_connector 
*connector,
(mode->flags & DRM_MODE_FLAG_INTERLACE) ? true :
false, mode->clock * 1000);
 
-   ret = mixer_check_mode(mode);
-   if (ret)
-   return MODE_BAD;
-
ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
if (ret < 0)
return MODE_BAD;
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 3f9f072..d09f8f9 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -39,7 +39,6 @@
 #include "exynos_drm_crtc.h"
 #include "exynos_drm_plane.h"
 #include "exynos_drm_iommu.h"
-#include "exynos_mixer.h"
 
 #define MIXER_WIN_NR   3
 #define VP_DEFAULT_WIN 2
@@ -1096,8 +1095,10 @@ static void mixer_disable(struct exynos_drm_crtc *crtc)
 }
 
 /* Only valid for Mixer version 16.0.33.0 */
-int mixer_check_mode(struct drm_display_mode *mode)
+static int mixer_atomic_check(struct exynos_drm_crtc *crtc,
+  struct drm_crtc_state *state)
 {
+   struct drm_display_mode *mode = >adjusted_mode;
u32 w, h;
 
w = mode->hdisplay;
@@ -1123,6 +1124,7 @@ static const struct exynos_drm_crtc_ops mixer_crtc_ops = {
.wait_for_vblank= mixer_wait_for_vblank,
.update_plane   = mixer_update_plane,
.disable_plane  = mixer_disable_plane,
+   .atomic_check   = mixer_atomic_check,
 };
 
 static struct mixer_drv_data exynos5420_mxr_drv_data = {
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.h 
b/drivers/gpu/drm/exynos/exynos_mixer.h
deleted file mode 100644
index 3811e41..000
--- a/drivers/gpu/drm/exynos/exynos_mixer.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2013 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _EXYNOS_MIXER_H_
-#define _EXYNOS_MIXER_H_
-
-/* This function returns 0 if the given timing is valid for the mixer */
-int mixer_check_mode(struct drm_display_mode *mode);
-
-#endif
-- 
1.9.1

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[PATCH v2 09/10] dt-bindings: video: exynos5433-decon: add bindings for DECON-TV

2015-10-26 Thread Andrzej Hajda
DECON-TV(Display and Enhancement Controller for TV) is a variation
of DECON IP. Its main purpose is to produce video stream for HDMI IP.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi Krzysztof,

I have decided to skip cleanup part as it would require more work,
not related to this patchset.

Regards
Andrzej

 Documentation/devicetree/bindings/video/exynos5433-decon.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
index 3dff78b..c9fd7b3 100644
--- a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
+++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
@@ -5,7 +5,8 @@ Exynos series of SoCs which transfers the image data from a 
video memory
 buffer to an external LCD interface.
 
 Required properties:
-- compatible: value should be "samsung,exynos5433-decon";
+- compatible: value should be one of:
+   "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv";
 - reg: physical base address and length of the DECON registers set.
 - interrupts: should contain a list of all DECON IP block interrupts in the
  order: VSYNC, LCD_SYSTEM. The interrupt specifier format
-- 
1.9.1

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Re: [PATCH 10/10] drm/exynos/decon5433: add support for DECON-TV

2015-10-23 Thread Andrzej Hajda
On 10/23/2015 01:55 PM, Inki Dae wrote:
> Hi Andrzej,
>
>
> 2015년 10월 20일 18:22에 Andrzej Hajda 이(가) 쓴 글:
>> DECON-TV IP is responsible for generating video stream which is transferred
>> to HDMI IP. It is almost fully compatible with DECON IP.
>>
>> The patch is based on initial work of Hyungwon Hwang.
>>
>> Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
>> ---
>>   drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 154 
>> --
>>   include/video/exynos5433_decon.h  |  29 +
>>   2 files changed, 122 insertions(+), 61 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
>> b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> index 3c9aa4e..fbe1b31 100644
>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> @@ -13,6 +13,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>
>> @@ -37,6 +38,12 @@ static const char * const decon_clks_name[] = {
>>  "sclk_decon_eclk",
>>   };
>>
>> +enum decon_iftype {
>> +IFTYPE_RGB,
>> +IFTYPE_I80,
>> +IFTYPE_HDMI
>> +};
>> +
>>   enum decon_flag_bits {
>>  BIT_CLKS_ENABLED,
>>  BIT_IRQS_ENABLED,
>> @@ -53,7 +60,8 @@ struct decon_context {
>>  struct clk  *clks[ARRAY_SIZE(decon_clks_name)];
>>  int pipe;
>>  unsigned long   flags;
>> -booli80_if;
>> +enum decon_iftype   out_type;
>> +int first_win;
>>   };
>>
>>   static const uint32_t decon_formats[] = {
>> @@ -80,7 +88,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc 
>> *crtc)
>>
>>  if (test_and_set_bit(BIT_IRQS_ENABLED, >flags)) {
>>  val = VIDINTCON0_INTEN;
>> -if (ctx->i80_if)
>> +if (ctx->out_type == IFTYPE_I80)
>>  val |= VIDINTCON0_FRAMEDONE;
>>  else
>>  val |= VIDINTCON0_INTFRMEN;
>> @@ -104,8 +112,11 @@ static void decon_disable_vblank(struct exynos_drm_crtc 
>> *crtc)
>>
>>   static void decon_setup_trigger(struct decon_context *ctx)
>>   {
>> -u32 val = TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>> -TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN;
>> +u32 val = (ctx->out_type != IFTYPE_HDMI)
>> +? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>> +  TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
>> +: TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
>> +  TRIGCON_HWTRIGMASK_I80_RGB | TRIGCON_HWTRIGEN_I80_RGB;
>>  writel(val, ctx->addr + DECON_TRIGCON);
>>   }
>>
>> @@ -118,13 +129,22 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>  if (test_bit(BIT_SUSPENDED, >flags))
>>  return;
>>
>> +if (ctx->out_type == IFTYPE_HDMI) {
>> +m->crtc_hsync_start = m->crtc_hdisplay + 10;
>> +m->crtc_hsync_end = m->crtc_htotal - 92;
>> +m->crtc_vsync_start = m->crtc_vdisplay + 1;
>> +m->crtc_vsync_end = m->crtc_vsync_start + 1;
>> +}
>> +
>> +decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID, 0);
>> +
>>  /* enable clock gate */
>>  val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F;
>>  writel(val, ctx->addr + DECON_CMU);
>>
>>  /* lcd on and use command if */
>>  val = VIDOUT_LCD_ON;
>> -if (ctx->i80_if)
>> +if (ctx->out_type == IFTYPE_I80)
>>  val |= VIDOUT_COMMAND_IF;
>>  else
>>  val |= VIDOUT_RGB_IF;
>> @@ -134,7 +154,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>  VIDTCON2_HOZVAL(m->hdisplay - 1);
>>  writel(val, ctx->addr + DECON_VIDTCON2);
>>
>> -if (!ctx->i80_if) {
>> +if (ctx->out_type != IFTYPE_I80) {
>>  val = VIDTCON00_VBPD_F(
>>  m->crtc_vtotal - m->crtc_vsync_end - 1) |
>>  VIDTCON00_VFPD_F(
>> @@ -159,15 +179,9 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
>>  decon_setup_trigger(ctx);
>>
>>  /* enable output and display signal */
>> -val = VIDCON0_ENVID | VIDCON0_ENVID_F;
>> -writel(val, ctx

[PATCH 05/10] drm/exynos/decon5433: fix timing registers writes

2015-10-20 Thread Andrzej Hajda
All timing registers should contain values decreased by one.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index b25d764..83e0939 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -104,7 +104,7 @@ static void decon_setup_trigger(struct decon_context *ctx)
 static void decon_commit(struct exynos_drm_crtc *crtc)
 {
struct decon_context *ctx = crtc->ctx;
-   struct drm_display_mode *mode = >base.mode;
+   struct drm_display_mode *m = >base.mode;
u32 val;
 
if (ctx->suspended)
@@ -122,29 +122,29 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
val |= VIDOUT_RGB_IF;
writel(val, ctx->addr + DECON_VIDOUTCON0);
 
-   val = VIDTCON2_LINEVAL(mode->vdisplay - 1) |
-   VIDTCON2_HOZVAL(mode->hdisplay - 1);
+   val = VIDTCON2_LINEVAL(m->vdisplay - 1) |
+   VIDTCON2_HOZVAL(m->hdisplay - 1);
writel(val, ctx->addr + DECON_VIDTCON2);
 
if (!ctx->i80_if) {
val = VIDTCON00_VBPD_F(
-   mode->crtc_vtotal - mode->crtc_vsync_end) |
+   m->crtc_vtotal - m->crtc_vsync_end - 1) |
VIDTCON00_VFPD_F(
-   mode->crtc_vsync_start - mode->crtc_vdisplay);
+   m->crtc_vsync_start - m->crtc_vdisplay - 1);
writel(val, ctx->addr + DECON_VIDTCON00);
 
val = VIDTCON01_VSPW_F(
-   mode->crtc_vsync_end - mode->crtc_vsync_start);
+   m->crtc_vsync_end - m->crtc_vsync_start - 1);
writel(val, ctx->addr + DECON_VIDTCON01);
 
val = VIDTCON10_HBPD_F(
-   mode->crtc_htotal - mode->crtc_hsync_end) |
+   m->crtc_htotal - m->crtc_hsync_end - 1) |
VIDTCON10_HFPD_F(
-   mode->crtc_hsync_start - mode->crtc_hdisplay);
+   m->crtc_hsync_start - m->crtc_hdisplay - 1);
writel(val, ctx->addr + DECON_VIDTCON10);
 
val = VIDTCON11_HSPW_F(
-   mode->crtc_hsync_end - mode->crtc_hsync_start);
+   m->crtc_hsync_end - m->crtc_hsync_start - 1);
writel(val, ctx->addr + DECON_VIDTCON11);
}
 
-- 
1.9.1

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[PATCH 00/10] drm/exynos/decon5433: add support to DECON-TV

2015-10-20 Thread Andrzej Hajda
Hi Inki,

This patchset adds support to DECON-TV in Exynos5433 SoC.
The main patch is prepended with few preparation patches:
- add three clocks required by HDMI pipeline,
- small bindings update,
- driver cleanup.

The patchset is based on the latest exynos-drm-next branch.

Regards
Andrzej


Andrzej Hajda (10):
  clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks
  clk/samsung: exynos5433: add pclk_decon clock
  drm/exynos/decon5433: add PCLK clock
  dt-bindings: video: add PCLK clock entry to exynos5433-decon
  drm/exynos/decon5433: fix timing registers writes
  drm/exynos/decon5433: add function to set particular register bits
  drm/exynos/decon5433: merge different flag fields
  drm/exynos/decon5433: remove duplicated initialization
  dt-bindings: video: exynos5433-decon: add bindings for DECON-TV
  drm/exynos/decon5433: add support for DECON-TV

 .../devicetree/bindings/video/exynos5433-decon.txt |  23 +-
 drivers/clk/samsung/clk-exynos5433.c   |   8 +-
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c  | 320 ++---
 include/dt-bindings/clock/exynos5433.h |   7 +-
 include/video/exynos5433_decon.h   |  29 ++
 5 files changed, 214 insertions(+), 173 deletions(-)

-- 
1.9.1

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[PATCH 06/10] drm/exynos/decon5433: add function to set particular register bits

2015-10-20 Thread Andrzej Hajda
The driver often sets only particular bits of configuration registers.
Using separate function to such action simplifies the code.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 69 ---
 1 file changed, 19 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 83e0939..722c11a 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -62,6 +62,13 @@ static const uint32_t decon_formats[] = {
DRM_FORMAT_ARGB,
 };
 
+static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
+ u32 val)
+{
+   val = (val & mask) | (readl(ctx->addr + reg) & ~mask);
+   writel(val, ctx->addr + reg);
+}
+
 static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 {
struct decon_context *ctx = crtc->ctx;
@@ -215,16 +222,8 @@ static void decon_win_set_pixfmt(struct decon_context 
*ctx, unsigned int win,
 static void decon_shadow_protect_win(struct decon_context *ctx, int win,
bool protect)
 {
-   u32 val;
-
-   val = readl(ctx->addr + DECON_SHADOWCON);
-
-   if (protect)
-   val |= SHADOWCON_Wx_PROTECT(win);
-   else
-   val &= ~SHADOWCON_Wx_PROTECT(win);
-
-   writel(val, ctx->addr + DECON_SHADOWCON);
+   decon_set_bits(ctx, DECON_SHADOWCON, SHADOWCON_Wx_PROTECT(win),
+  protect ? ~0 : 0);
 }
 
 static void decon_atomic_begin(struct exynos_drm_crtc *crtc,
@@ -278,14 +277,10 @@ static void decon_update_plane(struct exynos_drm_crtc 
*crtc,
decon_win_set_pixfmt(ctx, win, state->fb);
 
/* window enable */
-   val = readl(ctx->addr + DECON_WINCONx(win));
-   val |= WINCONx_ENWIN_F;
-   writel(val, ctx->addr + DECON_WINCONx(win));
+   decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);
 
/* standalone update */
-   val = readl(ctx->addr + DECON_UPDATE);
-   val |= STANDALONE_UPDATE_F;
-   writel(val, ctx->addr + DECON_UPDATE);
+   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
 }
 
 static void decon_disable_plane(struct exynos_drm_crtc *crtc,
@@ -293,7 +288,6 @@ static void decon_disable_plane(struct exynos_drm_crtc 
*crtc,
 {
struct decon_context *ctx = crtc->ctx;
unsigned int win = plane->zpos;
-   u32 val;
 
if (ctx->suspended)
return;
@@ -301,16 +295,12 @@ static void decon_disable_plane(struct exynos_drm_crtc 
*crtc,
decon_shadow_protect_win(ctx, win, true);
 
/* window disable */
-   val = readl(ctx->addr + DECON_WINCONx(win));
-   val &= ~WINCONx_ENWIN_F;
-   writel(val, ctx->addr + DECON_WINCONx(win));
+   decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);
 
decon_shadow_protect_win(ctx, win, false);
 
/* standalone update */
-   val = readl(ctx->addr + DECON_UPDATE);
-   val |= STANDALONE_UPDATE_F;
-   writel(val, ctx->addr + DECON_UPDATE);
+   decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);
 }
 
 static void decon_atomic_flush(struct exynos_drm_crtc *crtc,
@@ -416,17 +406,12 @@ static void decon_disable(struct exynos_drm_crtc *crtc)
 void decon_te_irq_handler(struct exynos_drm_crtc *crtc)
 {
struct decon_context *ctx = crtc->ctx;
-   u32 val;
 
if (!test_bit(BIT_CLKS_ENABLED, >enabled))
return;
 
-   if (atomic_add_unless(>win_updated, -1, 0)) {
-   /* trigger */
-   val = readl(ctx->addr + DECON_TRIGCON);
-   val |= TRIGCON_SWTRIGCMD;
-   writel(val, ctx->addr + DECON_TRIGCON);
-   }
+   if (atomic_add_unless(>win_updated, -1, 0))
+   decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
 
drm_crtc_handle_vblank(>crtc->base);
 }
@@ -435,7 +420,6 @@ static void decon_clear_channels(struct exynos_drm_crtc 
*crtc)
 {
struct decon_context *ctx = crtc->ctx;
int win, i, ret;
-   u32 val;
 
DRM_DEBUG_KMS("%s\n", __FILE__);
 
@@ -446,25 +430,10 @@ static void decon_clear_channels(struct exynos_drm_crtc 
*crtc)
}
 
for (win = 0; win < WINDOWS_NR; win++) {
-   /* shadow update disable */
-   val = readl(ctx->addr + DECON_SHADOWCON);
-   val |= SHADOWCON_Wx_PROTECT(win);
-   writel(val, ctx->addr + DECON_SHADOWCON);
-
-   /* window disable */
-   val = readl(ctx->addr + DECON_WINCONx(win));
-   val &= ~WINCONx_ENWIN_F;
-   writel(val, ctx->addr + DECON_WINCONx(win));
-
-   /* shadow update enable */
-   v

[PATCH 04/10] dt-bindings: video: add PCLK clock entry to exynos5433-decon

2015-10-20 Thread Andrzej Hajda
DECON IP requires this clock to access configuration registers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
index 377afbf..3dff78b 100644
--- a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
+++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
@@ -16,7 +16,7 @@ Required properties:
 - clocks: must include clock specifiers corresponding to entries in the
  clock-names property.
 - clock-names: list of clock names sorted in the same order as the clocks
-  property. Must contain "aclk_decon", "aclk_smmu_decon0x",
+  property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x",
   "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
   "sclk_decon_eclk"
 - ports: contains a port which is connected to mic node. address-cells and
-- 
1.9.1

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[PATCH 01/10] clk/samsung: exynos5433: add definitions of HDMI-PHY output clocks

2015-10-20 Thread Andrzej Hajda
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c   | 6 --
 include/dt-bindings/clock/exynos5433.h | 5 -
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 650ec13..e037406 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2614,8 +2614,10 @@ static struct samsung_fixed_rate_clock disp_fixed_clks[] 
__initdata = {
FRATE(0, "phyclk_mipidphy0_rxclkesc0_phy", NULL, CLK_IS_ROOT,
1),
/* PHY clocks from HDMI_PHY */
-   FRATE(0, "phyclk_hdmiphy_tmds_clko_phy", NULL, CLK_IS_ROOT, 3),
-   FRATE(0, "phyclk_hdmiphy_pixel_clko_phy", NULL, CLK_IS_ROOT, 16600),
+   FRATE(CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY, "phyclk_hdmiphy_tmds_clko_phy",
+   NULL, CLK_IS_ROOT, 3),
+   FRATE(CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY, 
"phyclk_hdmiphy_pixel_clko_phy",
+   NULL, CLK_IS_ROOT, 16600),
 };
 
 static struct samsung_mux_clock disp_mux_clks[] __initdata = {
diff --git a/include/dt-bindings/clock/exynos5433.h 
b/include/dt-bindings/clock/exynos5433.h
index 5bd80d5..4f0d566 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -765,7 +765,10 @@
 #define CLK_SCLK_RGB_VCLK  109
 #define CLK_SCLK_RGB_TV_VCLK   110
 
-#define DISP_NR_CLK111
+#define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY  111
+#define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY   112
+
+#define DISP_NR_CLK113
 
 /* CMU_AUD */
 #define CLK_MOUT_AUD_PLL_USER  1
-- 
1.9.1

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[PATCH 03/10] drm/exynos/decon5433: add PCLK clock

2015-10-20 Thread Andrzej Hajda
PCLK clock is used by DECON IP. The patch also replaces magic number with
number of clocks in array definition.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 1ea26dbb..b25d764 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -27,13 +27,23 @@
 #define CURSOR_WIN 2
 #define MIN_FB_WIDTH_FOR_16WORD_BURST  128
 
+static const char * const decon_clks_name[] = {
+   "pclk",
+   "aclk_decon",
+   "aclk_smmu_decon0x",
+   "aclk_xiu_decon0x",
+   "pclk_smmu_decon0x",
+   "sclk_decon_vclk",
+   "sclk_decon_eclk",
+};
+
 struct decon_context {
struct device   *dev;
struct drm_device   *drm_dev;
struct exynos_drm_crtc  *crtc;
struct exynos_drm_plane planes[WINDOWS_NR];
void __iomem*addr;
-   struct clk  *clks[6];
+   struct clk  *clks[ARRAY_SIZE(decon_clks_name)];
unsigned long   irq_flags;
int pipe;
boolsuspended;
@@ -45,15 +55,6 @@ struct decon_context {
atomic_twin_updated;
 };
 
-static const char * const decon_clks_name[] = {
-   "aclk_decon",
-   "aclk_smmu_decon0x",
-   "aclk_xiu_decon0x",
-   "pclk_smmu_decon0x",
-   "sclk_decon_vclk",
-   "sclk_decon_eclk",
-};
-
 static const uint32_t decon_formats[] = {
DRM_FORMAT_XRGB1555,
DRM_FORMAT_RGB565,
-- 
1.9.1

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[PATCH 02/10] clk/samsung: exynos5433: add pclk_decon clock

2015-10-20 Thread Andrzej Hajda
This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/clk/samsung/clk-exynos5433.c   | 2 ++
 include/dt-bindings/clock/exynos5433.h | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index e037406..e7b4533 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2822,6 +2822,8 @@ static struct samsung_gate_clock disp_gate_clks[] 
__initdata = {
ENABLE_PCLK_DISP, 2, 0, 0),
GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp",
ENABLE_PCLK_DISP, 1, 0, 0),
+   GATE(CLK_PCLK_DECON, "pclk_decon", "div_pclk_disp",
+   ENABLE_PCLK_DISP, 0, 0, 0),
 
/* ENABLE_SCLK_DISP */
GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8",
diff --git a/include/dt-bindings/clock/exynos5433.h 
b/include/dt-bindings/clock/exynos5433.h
index 4f0d566..5c2636c 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -768,7 +768,9 @@
 #define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY  111
 #define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY   112
 
-#define DISP_NR_CLK113
+#define CLK_PCLK_DECON 113
+
+#define DISP_NR_CLK114
 
 /* CMU_AUD */
 #define CLK_MOUT_AUD_PLL_USER  1
-- 
1.9.1

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[PATCH 09/10] dt-bindings: video: exynos5433-decon: add bindings for DECON-TV

2015-10-20 Thread Andrzej Hajda
DECON-TV(Display and Enhancement Controller for TV) is a variation
of DECON IP. Its main purpose is to produce video stream for HDMI IP.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 .../devicetree/bindings/video/exynos5433-decon.txt  | 21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
index 3dff78b..2a88c8d 100644
--- a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
+++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
@@ -5,24 +5,27 @@ Exynos series of SoCs which transfers the image data from a 
video memory
 buffer to an external LCD interface.
 
 Required properties:
-- compatible: value should be "samsung,exynos5433-decon";
+- compatible: value should be one of:
+   "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv";
 - reg: physical base address and length of the DECON registers set.
-- interrupts: should contain a list of all DECON IP block interrupts in the
- order: VSYNC, LCD_SYSTEM. The interrupt specifier format
- depends on the interrupt controller used.
-- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
-  in the same order as they were listed in the interrupts
-  property.
+- interrupts: should contain interrupt specifier of VSYNC and optionally
+ LCD_SYSTEM. The interrupt specifier format depends on
+ the interrupt controller used.
+- interrupt-names: should contain the interrupt name "vsync" and optionally
+  "lcd_sys" in the same order as they were listed in
+  the interrupts property.
 - clocks: must include clock specifiers corresponding to entries in the
  clock-names property.
 - clock-names: list of clock names sorted in the same order as the clocks
   property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x",
   "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
   "sclk_decon_eclk"
+
+Optional properties:
 - ports: contains a port which is connected to mic node. address-cells and
-size-cells must 1 and 0, respectively.
+size-cells must be 1 and 0, respectively.
 - port: contains an endpoint node which is connected to the endpoint in the mic
-   node. The reg value muset be 0.
+   node. The reg value must be 0.
 - i80-if-timings: specify whether the panel which is connected to decon uses
  i80 lcd interface or mipi video interface. This node contains
  no timing information as that of fimd does. Because there is
-- 
1.9.1

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[PATCH 10/10] drm/exynos/decon5433: add support for DECON-TV

2015-10-20 Thread Andrzej Hajda
DECON-TV IP is responsible for generating video stream which is transferred
to HDMI IP. It is almost fully compatible with DECON IP.

The patch is based on initial work of Hyungwon Hwang.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 154 --
 include/video/exynos5433_decon.h  |  29 +
 2 files changed, 122 insertions(+), 61 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 3c9aa4e..fbe1b31 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -37,6 +38,12 @@ static const char * const decon_clks_name[] = {
"sclk_decon_eclk",
 };
 
+enum decon_iftype {
+   IFTYPE_RGB,
+   IFTYPE_I80,
+   IFTYPE_HDMI
+};
+
 enum decon_flag_bits {
BIT_CLKS_ENABLED,
BIT_IRQS_ENABLED,
@@ -53,7 +60,8 @@ struct decon_context {
struct clk  *clks[ARRAY_SIZE(decon_clks_name)];
int pipe;
unsigned long   flags;
-   booli80_if;
+   enum decon_iftype   out_type;
+   int first_win;
 };
 
 static const uint32_t decon_formats[] = {
@@ -80,7 +88,7 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 
if (test_and_set_bit(BIT_IRQS_ENABLED, >flags)) {
val = VIDINTCON0_INTEN;
-   if (ctx->i80_if)
+   if (ctx->out_type == IFTYPE_I80)
val |= VIDINTCON0_FRAMEDONE;
else
val |= VIDINTCON0_INTFRMEN;
@@ -104,8 +112,11 @@ static void decon_disable_vblank(struct exynos_drm_crtc 
*crtc)
 
 static void decon_setup_trigger(struct decon_context *ctx)
 {
-   u32 val = TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
-   TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN;
+   u32 val = (ctx->out_type != IFTYPE_HDMI)
+   ? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
+ TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN
+   : TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |
+ TRIGCON_HWTRIGMASK_I80_RGB | TRIGCON_HWTRIGEN_I80_RGB;
writel(val, ctx->addr + DECON_TRIGCON);
 }
 
@@ -118,13 +129,22 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
if (test_bit(BIT_SUSPENDED, >flags))
return;
 
+   if (ctx->out_type == IFTYPE_HDMI) {
+   m->crtc_hsync_start = m->crtc_hdisplay + 10;
+   m->crtc_hsync_end = m->crtc_htotal - 92;
+   m->crtc_vsync_start = m->crtc_vdisplay + 1;
+   m->crtc_vsync_end = m->crtc_vsync_start + 1;
+   }
+
+   decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID, 0);
+
/* enable clock gate */
val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F;
writel(val, ctx->addr + DECON_CMU);
 
/* lcd on and use command if */
val = VIDOUT_LCD_ON;
-   if (ctx->i80_if)
+   if (ctx->out_type == IFTYPE_I80)
val |= VIDOUT_COMMAND_IF;
else
val |= VIDOUT_RGB_IF;
@@ -134,7 +154,7 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
VIDTCON2_HOZVAL(m->hdisplay - 1);
writel(val, ctx->addr + DECON_VIDTCON2);
 
-   if (!ctx->i80_if) {
+   if (ctx->out_type != IFTYPE_I80) {
val = VIDTCON00_VBPD_F(
m->crtc_vtotal - m->crtc_vsync_end - 1) |
VIDTCON00_VFPD_F(
@@ -159,15 +179,9 @@ static void decon_commit(struct exynos_drm_crtc *crtc)
decon_setup_trigger(ctx);
 
/* enable output and display signal */
-   val = VIDCON0_ENVID | VIDCON0_ENVID_F;
-   writel(val, ctx->addr + DECON_VIDCON0);
+   decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);
 }
 
-#define COORDINATE_X(x)(((x) & 0xfff) << 12)
-#define COORDINATE_Y(x)((x) & 0xfff)
-#define OFFSIZE(x) (((x) & 0x3fff) << 14)
-#define PAGEWIDTH(x)   ((x) & 0x3fff)
-
 static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
 struct drm_framebuffer *fb)
 {
@@ -238,6 +252,10 @@ static void decon_atomic_begin(struct exynos_drm_crtc 
*crtc,
decon_shadow_protect_win(ctx, plane->zpos, true);
 }
 
+#define BIT_VAL(x, e, s) (((x) & ((1 << ((e) - (s) + 1)) - 1)) << (s))
+#define COORDINATE_X(x) BIT_VAL((x), 23, 12)
+#define COORDINATE_Y(x) BIT_VAL((x), 11, 0)
+
 static void decon_update_plane(struct exynos_drm_crtc *crtc,
   struct exynos_drm_pl

[PATCH 08/10] drm/exynos/decon5433: remove duplicated initialization

2015-10-20 Thread Andrzej Hajda
Field .commit is already initialized few lines above.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 265a77f..3c9aa4e 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -448,7 +448,6 @@ static struct exynos_drm_crtc_ops decon_crtc_ops = {
.commit = decon_commit,
.enable_vblank  = decon_enable_vblank,
.disable_vblank = decon_disable_vblank,
-   .commit = decon_commit,
.atomic_begin   = decon_atomic_begin,
.update_plane   = decon_update_plane,
.disable_plane  = decon_disable_plane,
-- 
1.9.1

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Re: [PATCH 00/16] drm/exynos/hdmi: refactoring/cleanup patches

2015-10-20 Thread Andrzej Hajda
Hi Krzysztof,


On 10/12/2015 03:26 PM, Inki Dae wrote:
> Hi Andrzej,
>
> For all patches, merged excepting patch 2 which cleans up dt binding
> document.

Could you take this patch [1], it is just small binding cleanup.

[1]: https://patchwork.kernel.org/patch/7264251/

Regards
Andrzej

>
> Thanks,
> Inki Dae
>
> 2015년 09월 25일 21:48에 Andrzej Hajda 이(가) 쓴 글:
>> Hi,
>>
>> This is another set of cleanup/improvement patches for HDMI.
>>
>> The patchset is based on exynos-drm-next.
>> It was tested on Universal and Odroid U3.
>>
>> Regards
>> Andrzej
>>
>>
>> Andrzej Hajda (15):
>>drm/exynos/hdmi: remove support for deprecated compatible
>>dt-bindings: remove deprecated compatible string from exynos-hdmi
>>drm/exynos/hdmi: use mappings for registers with IP dependent address
>>drm/exynos/hdmi: move PLL stabilization check code to separate
>>  function
>>drm/exynos/hdmi: simplify HDMI-PHY power sequence
>>drm/exynos/hdmi: replace all writeb with writel
>>drm/exynos/hdmi: fix removal order
>>drm/exynos/hdmi: use optional regulator_get for hdmi-en
>>drm/exynos/hdmi: use constant size array for regulators
>>drm/exynos/hdmi: simplify clock re-parenting
>>drm/exynos/hdmi: convert to gpiod API
>>drm/exynos/hdmi: remove deprecated hdmi_resources structure
>>drm/exynos/hdmi: convert container_of macro to inline function
>>drm/exynos/hdmi: improve HDMI/ACR related code
>>drm/exynos/hdmi: remove unused field
>>
>> Tomasz Stanislawski (1):
>>drm: exynos: mixer: fix using usleep() in atomic context
>>
>>   .../devicetree/bindings/video/exynos_hdmi.txt  |   7 +-
>>   drivers/gpu/drm/exynos/exynos_hdmi.c   | 491 
>> +++--
>>   drivers/gpu/drm/exynos/exynos_mixer.c  |   2 +-
>>   drivers/gpu/drm/exynos/regs-hdmi.h |  33 +-
>>   4 files changed, 189 insertions(+), 344 deletions(-)
>>

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Re: [PATCH 09/10] dt-bindings: video: exynos5433-decon: add bindings for DECON-TV

2015-10-20 Thread Andrzej Hajda
On 10/20/2015 02:30 PM, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> DECON-TV(Display and Enhancement Controller for TV) is a variation
>> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>>
>> Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
>> ---
>>  .../devicetree/bindings/video/exynos5433-decon.txt  | 21 
>> -
>>  1 file changed, 12 insertions(+), 9 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt 
>> b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
>> index 3dff78b..2a88c8d 100644
>> --- a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
>> +++ b/Documentation/devicetree/bindings/video/exynos5433-decon.txt
>> @@ -5,24 +5,27 @@ Exynos series of SoCs which transfers the image data from 
>> a video memory
>>  buffer to an external LCD interface.
>>  
>>  Required properties:
>> -- compatible: value should be "samsung,exynos5433-decon";
>> +- compatible: value should be one of:
>> +"samsung,exynos5433-decon", "samsung,exynos5433-decon-tv";
> Until this point it looked good.
>
>>  - reg: physical base address and length of the DECON registers set.
>> -- interrupts: should contain a list of all DECON IP block interrupts in the
>> -  order: VSYNC, LCD_SYSTEM. The interrupt specifier format
>> -  depends on the interrupt controller used.
>> -- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys"
>> -   in the same order as they were listed in the interrupts
>> -   property.
>> +- interrupts: should contain interrupt specifier of VSYNC and optionally
>> +  LCD_SYSTEM. The interrupt specifier format depends on
>> +  the interrupt controller used.
>> +- interrupt-names: should contain the interrupt name "vsync" and optionally
>> +   "lcd_sys" in the same order as they were listed in
>> +   the interrupts property.
> The driver already did not require both interrupts, right? Only one of them?

Right. More precisely it did not require since beginning.

>
>>  - clocks: must include clock specifiers corresponding to entries in the
>>clock-names property.
>>  - clock-names: list of clock names sorted in the same order as the clocks
>> property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x",
>> "aclk_xiu_decon0x", "pclk_smmu_decon0x", clk_decon_vclk",
>> "sclk_decon_eclk"
>> +
>> +Optional properties:
>>  - ports: contains a port which is connected to mic node. address-cells and
>> - size-cells must 1 and 0, respectively.
>> + size-cells must be 1 and 0, respectively.
>>  - port: contains an endpoint node which is connected to the endpoint in the 
>> mic
>> -node. The reg value muset be 0.
>> +node. The reg value must be 0.
>>  - i80-if-timings: specify whether the panel which is connected to decon uses
>>i80 lcd interface or mipi video interface. This node contains
>>no timing information as that of fimd does. Because there is
>>
> This is cleanup, please split it.

Ok. I will split it into cleanup/fix patch, and 2nd one adding compatible.

Regards
Andrzej
>
> Best regards,
> Krzysztof
>

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[PATCH v3 2/2] s5p-mfc: use MFC_BUF_FLAG_EOS to identify last buffers in decoder capture queue

2015-10-07 Thread Andrzej Hajda
MFC driver never delivered EOS event to apps feeding constantly its capture
buffer with fresh buffers. The patch fixes it by marking last buffers
returned by MFC with MFC_BUF_FLAG_EOS flag and firing EOS event on
de-queuing such buffers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi Kamil,

Commit message fixed.

Regards
Andrzej
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 21 +
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 05a31ee..3ffe2ec 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -196,6 +196,7 @@ static void s5p_mfc_handle_frame_all_extracted(struct 
s5p_mfc_ctx *ctx)
vb2_set_plane_payload(_buf->b->vb2_buf, 0, 0);
vb2_set_plane_payload(_buf->b->vb2_buf, 1, 0);
list_del(_buf->list);
+   dst_buf->flags |= MFC_BUF_FLAG_EOS;
ctx->dst_queue_cnt--;
dst_buf->b->sequence = (ctx->sequence++);
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 1734775..8d3d40c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -645,17 +645,22 @@ static int vidioc_dqbuf(struct file *file, void *priv, 
struct v4l2_buffer *buf)
mfc_err("Call on DQBUF after unrecoverable error\n");
return -EIO;
}
-   if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
-   ret = vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
-   else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
+
+   switch (buf->type) {
+   case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
+   return vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
+   case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
ret = vb2_dqbuf(>vq_dst, buf, file->f_flags & O_NONBLOCK);
-   if (ret == 0 && ctx->state == MFCINST_FINISHED &&
-   list_empty(>vq_dst.done_list))
+   if (ret)
+   return ret;
+
+   if (ctx->state == MFCINST_FINISHED &&
+   (ctx->dst_bufs[buf->index].flags & MFC_BUF_FLAG_EOS))
v4l2_event_queue_fh(>fh, );
-   } else {
-   ret = -EINVAL;
+   return 0;
+   default:
+   return -EINVAL;
}
-   return ret;
 }
 
 /* Export DMA buffer */
-- 
1.9.1

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[PATCH v3 1/2] s5p-mfc: end-of-stream handling for newer encoders

2015-10-07 Thread Andrzej Hajda
MFC encoder supports end-of-stream handling for encoder
in version 5 of hardware. This patch adds it also for newer version.
It was successfully tested on MFC-v8.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi Kamil,

Incorrect format fixed.

Regards
Andrzej
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c| 25 ++---
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|  5 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 49 +
 3 files changed, 48 insertions(+), 31 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 7b646c2..05a31ee 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -181,13 +181,6 @@ unlock:
mutex_unlock(>mfc_mutex);
 }
 
-static void s5p_mfc_clear_int_flags(struct s5p_mfc_dev *dev)
-{
-   mfc_write(dev, 0, S5P_FIMV_RISC_HOST_INT);
-   mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD);
-   mfc_write(dev, 0x, S5P_FIMV_SI_RTN_CHID);
-}
-
 static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_buf *dst_buf;
@@ -579,17 +572,13 @@ static void s5p_mfc_handle_init_buffers(struct 
s5p_mfc_ctx *ctx,
}
 }
 
-static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx,
-unsigned int reason, unsigned int err)
+static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_dev *dev = ctx->dev;
struct s5p_mfc_buf *mb_entry;
 
mfc_debug(2, "Stream completed\n");
 
-   s5p_mfc_clear_int_flags(dev);
-   ctx->int_type = reason;
-   ctx->int_err = err;
ctx->state = MFCINST_FINISHED;
 
spin_lock(>irqlock);
@@ -646,6 +635,13 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
if (ctx->c_ops->post_frame_start) {
if (ctx->c_ops->post_frame_start(ctx))
mfc_err("post_frame_start() failed\n");
+
+   if (ctx->state == MFCINST_FINISHING &&
+   list_empty(>ref_queue)) {
+   s5p_mfc_hw_call_void(dev->mfc_ops, 
clear_int_flags, dev);
+   s5p_mfc_handle_stream_complete(ctx);
+   break;
+   }
s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, 
dev);
wake_up_ctx(ctx, reason, err);
WARN_ON(test_and_clear_bit(0, >hw_lock) == 0);
@@ -691,7 +687,10 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
break;
 
case S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET:
-   s5p_mfc_handle_stream_complete(ctx, reason, err);
+   s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
+   ctx->int_type = reason;
+   ctx->int_err = err;
+   s5p_mfc_handle_stream_complete(ctx);
break;
 
case S5P_MFC_R2H_CMD_DPB_FLUSH_RET:
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 94868f7..d082d47 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -907,9 +907,9 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
list_add_tail(_entry->list, >ref_queue);
ctx->ref_queue_cnt++;
}
-   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
- ctx->src_queue_cnt, ctx->ref_queue_cnt);
}
+   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
+ ctx->src_queue_cnt, ctx->ref_queue_cnt);
if ((ctx->dst_queue_cnt > 0) && (strm_size > 0)) {
mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
list);
@@ -932,6 +932,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
spin_unlock_irqrestore(>irqlock, flags);
if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
clear_work_bit(ctx);
+
return 0;
 }
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index e0924a52..b958453 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -554,7 +554,7 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct 
s5p_mfc_ctx *ctx,
enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr);
enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr);
 
-   mfc_debug(2, "recon y addr: 0x%08lx\n", en

[PATCH v2 1/2] s5p-mfc: end-of-stream handling for newer encoders

2015-10-02 Thread Andrzej Hajda
MFC encoder supports end-of-stream handling for encoder
in version 5 of hardware. This patch adds it also for newer version.
It was successfully tested on MFC-v8.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi,

This version is rebased on latest media_tree branch.

Regards
Andrzej
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c| 25 ++--
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|  5 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 51 -
 3 files changed, 49 insertions(+), 32 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 7b646c2..05a31ee 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -181,13 +181,6 @@ unlock:
mutex_unlock(>mfc_mutex);
 }
 
-static void s5p_mfc_clear_int_flags(struct s5p_mfc_dev *dev)
-{
-   mfc_write(dev, 0, S5P_FIMV_RISC_HOST_INT);
-   mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD);
-   mfc_write(dev, 0x, S5P_FIMV_SI_RTN_CHID);
-}
-
 static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_buf *dst_buf;
@@ -579,17 +572,13 @@ static void s5p_mfc_handle_init_buffers(struct 
s5p_mfc_ctx *ctx,
}
 }
 
-static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx,
-unsigned int reason, unsigned int err)
+static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_dev *dev = ctx->dev;
struct s5p_mfc_buf *mb_entry;
 
mfc_debug(2, "Stream completed\n");
 
-   s5p_mfc_clear_int_flags(dev);
-   ctx->int_type = reason;
-   ctx->int_err = err;
ctx->state = MFCINST_FINISHED;
 
spin_lock(>irqlock);
@@ -646,6 +635,13 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
if (ctx->c_ops->post_frame_start) {
if (ctx->c_ops->post_frame_start(ctx))
mfc_err("post_frame_start() failed\n");
+
+   if (ctx->state == MFCINST_FINISHING &&
+   list_empty(>ref_queue)) {
+   s5p_mfc_hw_call_void(dev->mfc_ops, 
clear_int_flags, dev);
+   s5p_mfc_handle_stream_complete(ctx);
+   break;
+   }
s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, 
dev);
wake_up_ctx(ctx, reason, err);
WARN_ON(test_and_clear_bit(0, >hw_lock) == 0);
@@ -691,7 +687,10 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
break;
 
case S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET:
-   s5p_mfc_handle_stream_complete(ctx, reason, err);
+   s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
+   ctx->int_type = reason;
+   ctx->int_err = err;
+   s5p_mfc_handle_stream_complete(ctx);
break;
 
case S5P_MFC_R2H_CMD_DPB_FLUSH_RET:
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 94868f7..d082d47 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -907,9 +907,9 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
list_add_tail(_entry->list, >ref_queue);
ctx->ref_queue_cnt++;
}
-   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
- ctx->src_queue_cnt, ctx->ref_queue_cnt);
}
+   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
+ ctx->src_queue_cnt, ctx->ref_queue_cnt);
if ((ctx->dst_queue_cnt > 0) && (strm_size > 0)) {
mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
list);
@@ -932,6 +932,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
spin_unlock_irqrestore(>irqlock, flags);
if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
clear_work_bit(ctx);
+
return 0;
 }
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index e0924a52..69a6880 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -522,7 +522,7 @@ static int s5p_mfc_set_enc_stream_buffer_v6(struct 
s5p_mfc_ctx *ctx,
writel(addr, mfc_regs->e_stream_buffer_addr); /* 16B align */
writel(size, mfc_regs->e_stream_buffer_size);
 
-   mfc_debug(2, "stream buf addr: 

[PATCH v2 2/2] s5p-mfc: use MFC_BUF_FLAG_EOS to identify last buffers in decoder capture queue

2015-10-02 Thread Andrzej Hajda
MFC driver never delivered EOS event to apps feeding constantly its capture
buffer with fresh buffers. The patch fixes it by marking last buffers returned
by MFC with MFC_BUF_FLAG_EOS flag and firing EOS event on de-queuing such
buffers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
Hi,

This version is rebased on latest media_tree branch.

Regards
Andrzej
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 21 +
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 05a31ee..3ffe2ec 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -196,6 +196,7 @@ static void s5p_mfc_handle_frame_all_extracted(struct 
s5p_mfc_ctx *ctx)
vb2_set_plane_payload(_buf->b->vb2_buf, 0, 0);
vb2_set_plane_payload(_buf->b->vb2_buf, 1, 0);
list_del(_buf->list);
+   dst_buf->flags |= MFC_BUF_FLAG_EOS;
ctx->dst_queue_cnt--;
dst_buf->b->sequence = (ctx->sequence++);
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 1734775..8d3d40c 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -645,17 +645,22 @@ static int vidioc_dqbuf(struct file *file, void *priv, 
struct v4l2_buffer *buf)
mfc_err("Call on DQBUF after unrecoverable error\n");
return -EIO;
}
-   if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
-   ret = vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
-   else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
+
+   switch (buf->type) {
+   case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
+   return vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
+   case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
ret = vb2_dqbuf(>vq_dst, buf, file->f_flags & O_NONBLOCK);
-   if (ret == 0 && ctx->state == MFCINST_FINISHED &&
-   list_empty(>vq_dst.done_list))
+   if (ret)
+   return ret;
+
+   if (ctx->state == MFCINST_FINISHED &&
+   (ctx->dst_bufs[buf->index].flags & MFC_BUF_FLAG_EOS))
v4l2_event_queue_fh(>fh, );
-   } else {
-   ret = -EINVAL;
+   return 0;
+   default:
+   return -EINVAL;
}
-   return ret;
 }
 
 /* Export DMA buffer */
-- 
1.9.1

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[PATCH 1/2] s5p-mfc: end-of-stream handling for newer encoders

2015-10-02 Thread Andrzej Hajda
MFC encoder supports end-of-stream handling for encoder
in version 5 of hardware. This patch adds it also for newer version.
It was successfully tested on MFC-v8.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c| 25 
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|  5 ++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 40 ++---
 3 files changed, 44 insertions(+), 26 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 8de61dc..21c424e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -181,13 +181,6 @@ unlock:
mutex_unlock(>mfc_mutex);
 }
 
-static void s5p_mfc_clear_int_flags(struct s5p_mfc_dev *dev)
-{
-   mfc_write(dev, 0, S5P_FIMV_RISC_HOST_INT);
-   mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD);
-   mfc_write(dev, 0x, S5P_FIMV_SI_RTN_CHID);
-}
-
 static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_buf *dst_buf;
@@ -573,17 +566,13 @@ static void s5p_mfc_handle_init_buffers(struct 
s5p_mfc_ctx *ctx,
}
 }
 
-static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx,
-unsigned int reason, unsigned int err)
+static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx)
 {
struct s5p_mfc_dev *dev = ctx->dev;
struct s5p_mfc_buf *mb_entry;
 
mfc_debug(2, "Stream completed\n");
 
-   s5p_mfc_clear_int_flags(dev);
-   ctx->int_type = reason;
-   ctx->int_err = err;
ctx->state = MFCINST_FINISHED;
 
spin_lock(>irqlock);
@@ -640,6 +629,13 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
if (ctx->c_ops->post_frame_start) {
if (ctx->c_ops->post_frame_start(ctx))
mfc_err("post_frame_start() failed\n");
+
+   if (ctx->state == MFCINST_FINISHING &&
+   list_empty(>ref_queue)) {
+   s5p_mfc_hw_call_void(dev->mfc_ops, 
clear_int_flags, dev);
+   s5p_mfc_handle_stream_complete(ctx);
+   break;
+   }
s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, 
dev);
wake_up_ctx(ctx, reason, err);
WARN_ON(test_and_clear_bit(0, >hw_lock) == 0);
@@ -685,7 +681,10 @@ static irqreturn_t s5p_mfc_irq(int irq, void *priv)
break;
 
case S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET:
-   s5p_mfc_handle_stream_complete(ctx, reason, err);
+   s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
+   ctx->int_type = reason;
+   ctx->int_err = err;
+   s5p_mfc_handle_stream_complete(ctx);
break;
 
case S5P_MFC_R2H_CMD_DPB_FLUSH_RET:
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 2e57e9f..5280592 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -902,9 +902,9 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
list_add_tail(_entry->list, >ref_queue);
ctx->ref_queue_cnt++;
}
-   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
- ctx->src_queue_cnt, ctx->ref_queue_cnt);
}
+   mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
+ ctx->src_queue_cnt, ctx->ref_queue_cnt);
if ((ctx->dst_queue_cnt > 0) && (strm_size > 0)) {
mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
list);
@@ -927,6 +927,7 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
spin_unlock_irqrestore(>irqlock, flags);
if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
clear_work_bit(ctx);
+
return 0;
 }
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index e5cb30e..af4b936 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -554,7 +554,7 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct 
s5p_mfc_ctx *ctx,
enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr);
enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr);
 
-   mfc_debug(2, "recon y addr: 0x%08lx\n", enc_recon_y_addr);
+   mfc_debug(2, &q

[PATCH 2/2] s5p-mfc: use MFC_BUF_FLAG_EOS to identify last buffers in decoder capture queue

2015-10-02 Thread Andrzej Hajda
MFC driver never delivered EOS event to apps feeding constantly its capture
buffer with fresh buffers. The patch fixes it by marking last buffers returned
by MFC with MFC_BUF_FLAG_EOS flag and firing EOS event on de-queuing such
buffers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/media/platform/s5p-mfc/s5p_mfc.c |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 21 +
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 21c424e..f1e537e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -196,6 +196,7 @@ static void s5p_mfc_handle_frame_all_extracted(struct 
s5p_mfc_ctx *ctx)
vb2_set_plane_payload(dst_buf->b, 0, 0);
vb2_set_plane_payload(dst_buf->b, 1, 0);
list_del(_buf->list);
+   dst_buf->flags |= MFC_BUF_FLAG_EOS;
ctx->dst_queue_cnt--;
dst_buf->b->v4l2_buf.sequence = (ctx->sequence++);
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index aebe4fd..7866eda 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -645,17 +645,22 @@ static int vidioc_dqbuf(struct file *file, void *priv, 
struct v4l2_buffer *buf)
mfc_err("Call on DQBUF after unrecoverable error\n");
return -EIO;
}
-   if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
-   ret = vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
-   else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
+
+   switch (buf->type) {
+   case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
+   return vb2_dqbuf(>vq_src, buf, file->f_flags & O_NONBLOCK);
+   case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
ret = vb2_dqbuf(>vq_dst, buf, file->f_flags & O_NONBLOCK);
-   if (ret == 0 && ctx->state == MFCINST_FINISHED &&
-   list_empty(>vq_dst.done_list))
+   if (ret)
+   return ret;
+
+   if (ctx->state == MFCINST_FINISHED &&
+   (ctx->dst_bufs[buf->index].flags & MFC_BUF_FLAG_EOS))
v4l2_event_queue_fh(>fh, );
-   } else {
-   ret = -EINVAL;
+   return 0;
+   default:
+   return -EINVAL;
}
-   return ret;
 }
 
 /* Export DMA buffer */
-- 
1.9.1

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Re: [PATCH 2/3] drm/exynos: fimc: Clock control is unused if !PM

2015-09-25 Thread Andrzej Hajda
On 09/24/2015 12:14 PM, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
> 
> Protect the fimc_clk_ctrl() function with an #ifdef CONFIG_PM guard to
> avoid "defined but not used" warnings.
> 
> Signed-off-by: Thierry Reding <tred...@nvidia.com>

Reviewed-by: Andrzej Hajda <a.ha...@samsung.com>

Regards
Andrzej

> ---
>  drivers/gpu/drm/exynos/exynos_drm_fimc.c | 36 
> 
>  1 file changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c 
> b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
> index 2a652359af64..dd3a5e6d58c8 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
> @@ -1206,23 +1206,6 @@ static struct exynos_drm_ipp_ops fimc_dst_ops = {
>   .set_addr = fimc_dst_set_addr,
>  };
>  
> -static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable)
> -{
> - DRM_DEBUG_KMS("enable[%d]\n", enable);
> -
> - if (enable) {
> - clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]);
> - clk_prepare_enable(ctx->clocks[FIMC_CLK_WB_A]);
> - ctx->suspended = false;
> - } else {
> - clk_disable_unprepare(ctx->clocks[FIMC_CLK_GATE]);
> - clk_disable_unprepare(ctx->clocks[FIMC_CLK_WB_A]);
> - ctx->suspended = true;
> - }
> -
> - return 0;
> -}
> -
>  static irqreturn_t fimc_irq_handler(int irq, void *dev_id)
>  {
>   struct fimc_context *ctx = dev_id;
> @@ -1780,6 +1763,24 @@ static int fimc_remove(struct platform_device *pdev)
>   return 0;
>  }
>  
> +#ifdef CONFIG_PM
> +static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable)
> +{
> + DRM_DEBUG_KMS("enable[%d]\n", enable);
> +
> + if (enable) {
> + clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]);
> + clk_prepare_enable(ctx->clocks[FIMC_CLK_WB_A]);
> + ctx->suspended = false;
> + } else {
> + clk_disable_unprepare(ctx->clocks[FIMC_CLK_GATE]);
> + clk_disable_unprepare(ctx->clocks[FIMC_CLK_WB_A]);
> + ctx->suspended = true;
> + }
> +
> + return 0;
> +}
> +
>  #ifdef CONFIG_PM_SLEEP
>  static int fimc_suspend(struct device *dev)
>  {
> @@ -1806,7 +1807,6 @@ static int fimc_resume(struct device *dev)
>  }
>  #endif
>  
> -#ifdef CONFIG_PM
>  static int fimc_runtime_suspend(struct device *dev)
>  {
>   struct fimc_context *ctx = get_fimc_context(dev);
> 

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Re: [PATCH 3/3] drm/exynos: rotator: Clock control is unused if !PM

2015-09-25 Thread Andrzej Hajda
On 09/24/2015 12:14 PM, Thierry Reding wrote:
> From: Thierry Reding <tred...@nvidia.com>
> 
> Protect the rotator_clk_crtl() function with an #ifdef CONFIG_PM guard
> to avoid "defined but not used" warnings.
> 
> Signed-off-by: Thierry Reding <tred...@nvidia.com>

Reviewed-by: Andrzej Hajda <a.ha...@samsung.com>


> ---
>  drivers/gpu/drm/exynos/exynos_drm_rotator.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c 
> b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
> index 425e70625388..2f5c118f4c8e 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
> @@ -786,6 +786,7 @@ static int rotator_remove(struct platform_device *pdev)
>   return 0;
>  }
>  
> +#ifdef CONFIG_PM
>  static int rotator_clk_crtl(struct rot_context *rot, bool enable)
>  {
>   if (enable) {
> @@ -822,7 +823,6 @@ static int rotator_resume(struct device *dev)
>  }
>  #endif
>  
> -#ifdef CONFIG_PM
>  static int rotator_runtime_suspend(struct device *dev)
>  {
>   struct rot_context *rot = dev_get_drvdata(dev);
> 

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Re: [PATCH 1/3] drm/exynos: Suspend/resume is unused if !PM

2015-09-25 Thread Andrzej Hajda
On 09/24/2015 12:14 PM, Thierry Reding wrote:
> From: Thierry Reding 
> 
> Protect the suspend and resume callbacks with an #ifdef CONFIG_PM_SLEEP
> guard to avoid "defined but not used" warnings.
> 
> Signed-off-by: Thierry Reding 

The best solution would be to merge legacy exynos_drm_(suspend|resume) PM
functions with exynos_drm_sys_(suspend|resume). There is no reason to keep both.
Could you do it, if not I can prepare quick patch.

Regards
Andrzej

> ---
>  drivers/gpu/drm/exynos/exynos_drm_drv.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
> b/drivers/gpu/drm/exynos/exynos_drm_drv.c
> index f0a5839bd226..e07a0fe16432 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
> @@ -304,6 +304,7 @@ int exynos_atomic_commit(struct drm_device *dev, struct 
> drm_atomic_state *state,
>   return 0;
>  }
>  
> +#ifdef CONFIG_PM_SLEEP
>  static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state)
>  {
>   struct drm_connector *connector;
> @@ -340,6 +341,7 @@ static int exynos_drm_resume(struct drm_device *dev)
>  
>   return 0;
>  }
> +#endif
>  
>  static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
>  {
> 

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[PATCH 00/16] drm/exynos/hdmi: refactoring/cleanup patches

2015-09-25 Thread Andrzej Hajda
Hi,

This is another set of cleanup/improvement patches for HDMI.

The patchset is based on exynos-drm-next.
It was tested on Universal and Odroid U3.

Regards
Andrzej


Andrzej Hajda (15):
  drm/exynos/hdmi: remove support for deprecated compatible
  dt-bindings: remove deprecated compatible string from exynos-hdmi
  drm/exynos/hdmi: use mappings for registers with IP dependent address
  drm/exynos/hdmi: move PLL stabilization check code to separate
function
  drm/exynos/hdmi: simplify HDMI-PHY power sequence
  drm/exynos/hdmi: replace all writeb with writel
  drm/exynos/hdmi: fix removal order
  drm/exynos/hdmi: use optional regulator_get for hdmi-en
  drm/exynos/hdmi: use constant size array for regulators
  drm/exynos/hdmi: simplify clock re-parenting
  drm/exynos/hdmi: convert to gpiod API
  drm/exynos/hdmi: remove deprecated hdmi_resources structure
  drm/exynos/hdmi: convert container_of macro to inline function
  drm/exynos/hdmi: improve HDMI/ACR related code
  drm/exynos/hdmi: remove unused field

Tomasz Stanislawski (1):
  drm: exynos: mixer: fix using usleep() in atomic context

 .../devicetree/bindings/video/exynos_hdmi.txt  |   7 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c   | 491 +++--
 drivers/gpu/drm/exynos/exynos_mixer.c  |   2 +-
 drivers/gpu/drm/exynos/regs-hdmi.h |  33 +-
 4 files changed, 189 insertions(+), 344 deletions(-)

-- 
1.9.1

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[PATCH 05/16] drm/exynos/hdmi: simplify HDMI-PHY power sequence

2015-09-25 Thread Andrzej Hajda
Currently driver tries to set specific HDMI-PHY registers in three situations:
- before reset,
- before power off,
- after applying HDMI-PHY configuration.

First two cases seems to be unnecessary - register contents will be lost
anyway. The third case can be merged with HDMI-PHY configuration by fixing
the last byte of configuration data.

The patch has been tested with following platforms:
- exynos4210-universal_c210,
- exynos4412-odroidu3,
- exynos5422-odroidxu3.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 93 
 1 file changed, 8 insertions(+), 85 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 414ea2d..814dd8c 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -148,7 +148,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,
0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-   0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
+   0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x80,
},
},
{
@@ -157,7 +157,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,
0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-   0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
+   0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x80,
},
},
{
@@ -166,7 +166,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B,
0x6D, 0x10, 0x01, 0x51, 0xef, 0xF3, 0x54, 0xb9,
0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-   0x22, 0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x00,
+   0x22, 0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x80,
},
},
{
@@ -175,7 +175,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
0x01, 0x05, 0x00, 0xd8, 0x10, 0x9c, 0xf8, 0x40,
0x6a, 0x10, 0x01, 0x51, 0xff, 0xf1, 0x54, 0xba,
0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xe0,
-   0x22, 0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x00,
+   0x22, 0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x80,
},
},
{
@@ -184,7 +184,7 @@ static const struct hdmiphy_config hdmiphy_v13_configs[] = {
0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xf8, 0x40,
0x6A, 0x18, 0x00, 0x51, 0xff, 0xF1, 0x54, 0xba,
0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,
-   0x22, 0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x00,
+   0x22, 0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x80,
},
},
 };
@@ -214,7 +214,7 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
0x01, 0xd1, 0x2d, 0x72, 0x40, 0x64, 0x12, 0x08,
0x43, 0xa0, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-   0x54, 0xe3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00,
+   0x54, 0xe3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
},
},
{
@@ -277,7 +277,7 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
0x01, 0xd1, 0x1f, 0x10, 0x40, 0x40, 0xf8, 0x08,
0x81, 0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80,
0x3c, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-   0x54, 0xa5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00,
+   0x54, 0xa5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
},
},
{
@@ -340,7 +340,7 @@ static const struct hdmiphy_config hdmiphy_v14_configs[] = {
0x01, 0xd1, 0x1f, 0x00, 0x40, 0x40, 0xf8, 0x08,
0x81, 0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80,
0x3c, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-   0x54, 0x4b, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00,
+   0x54, 0x4b, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
},
},
 };
@@ -563,26 +563,6 @@ static inline void hdmi_reg_writemask(struct hdmi_context 
*hdata,
writel(value, hdata->regs + reg_id);
 }
 
-static int hdmiphy_reg_writeb(struct hdmi_context *hdata,
-   u32 reg_offset, u8 value)
-{
-   if (hdata->

[PATCH 06/16] drm/exynos/hdmi: replace all writeb with writel

2015-09-25 Thread Andrzej Hajda
Registers are 32-bit, even if only lower 8-bits are used.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 814dd8c..50ced709 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -537,7 +537,7 @@ static inline u32 hdmi_reg_read(struct hdmi_context *hdata, 
u32 reg_id)
 static inline void hdmi_reg_writeb(struct hdmi_context *hdata,
 u32 reg_id, u8 value)
 {
-   writeb(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
+   writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
 }
 
 static inline void hdmi_reg_writev(struct hdmi_context *hdata, u32 reg_id,
@@ -546,7 +546,7 @@ static inline void hdmi_reg_writev(struct hdmi_context 
*hdata, u32 reg_id,
reg_id = hdmi_map_reg(hdata, reg_id);
 
while (--bytes >= 0) {
-   writeb(val & 0xff, hdata->regs + reg_id);
+   writel(val & 0xff, hdata->regs + reg_id);
val >>= 8;
reg_id += 4;
}
@@ -579,7 +579,7 @@ static int hdmiphy_reg_write_buf(struct hdmi_context *hdata,
} else {
int i;
for (i = 0; i < len; i++)
-   writeb(buf[i], hdata->regs_hdmiphy +
+   writel(buf[i], hdata->regs_hdmiphy +
((reg_offset + i)<<2));
return 0;
}
-- 
1.9.1

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[PATCH 09/16] drm/exynos/hdmi: use constant size array for regulators

2015-09-25 Thread Andrzej Hajda
Driver always uses the same number of regulators, so there is no point in
dynamic allocation.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 25 +
 1 file changed, 9 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 841470c..583dd5e 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -83,6 +83,12 @@ static const u32 hdmi_reg_map[][HDMI_TYPE_COUNT] = {
{ HDMI_V13_ACR_CON, HDMI_V14_ACR_CON },
 };
 
+static const char * const supply[] = {
+   "vdd",
+   "vdd_osc",
+   "vdd_pll",
+};
+
 struct hdmi_driver_data {
unsigned int type;
const struct hdmiphy_config *phy_confs;
@@ -96,9 +102,8 @@ struct hdmi_resources {
struct clk  *sclk_pixel;
struct clk  *sclk_hdmiphy;
struct clk  *mout_hdmi;
-   struct regulator_bulk_data  *regul_bulk;
+   struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
struct regulator*reg_hdmi_en;
-   int regul_count;
 };
 
 struct hdmi_context {
@@ -1652,7 +1657,7 @@ static void hdmi_enable(struct drm_encoder *encoder)
 
pm_runtime_get_sync(hdata->dev);
 
-   if (regulator_bulk_enable(res->regul_count, res->regul_bulk))
+   if (regulator_bulk_enable(ARRAY_SIZE(supply), res->regul_bulk))
DRM_DEBUG_KMS("failed to enable regulator bulk\n");
 
/* set pmu hdmiphy control bit to enable hdmiphy */
@@ -1701,7 +1706,7 @@ static void hdmi_disable(struct drm_encoder *encoder)
regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
PMU_HDMI_PHY_ENABLE_BIT, 0);
 
-   regulator_bulk_disable(res->regul_count, res->regul_bulk);
+   regulator_bulk_disable(ARRAY_SIZE(supply), res->regul_bulk);
 
pm_runtime_put_sync(hdata->dev);
 
@@ -1743,11 +1748,6 @@ static int hdmi_resources_init(struct hdmi_context 
*hdata)
 {
struct device *dev = hdata->dev;
struct hdmi_resources *res = >res;
-   static char *supply[] = {
-   "vdd",
-   "vdd_osc",
-   "vdd_pll",
-   };
int i, ret;
 
DRM_DEBUG_KMS("HDMI resource init\n");
@@ -1786,12 +1786,6 @@ static int hdmi_resources_init(struct hdmi_context 
*hdata)
 
clk_set_parent(res->mout_hdmi, res->sclk_pixel);
 
-   res->regul_bulk = devm_kzalloc(dev, ARRAY_SIZE(supply) *
-   sizeof(res->regul_bulk[0]), GFP_KERNEL);
-   if (!res->regul_bulk) {
-   ret = -ENOMEM;
-   goto fail;
-   }
for (i = 0; i < ARRAY_SIZE(supply); ++i) {
res->regul_bulk[i].supply = supply[i];
res->regul_bulk[i].consumer = NULL;
@@ -1801,7 +1795,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
DRM_ERROR("failed to get regulators\n");
return ret;
}
-   res->regul_count = ARRAY_SIZE(supply);
 
res->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en");
 
-- 
1.9.1

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[PATCH 13/16] drm/exynos/hdmi: convert container_of macro to inline function

2015-09-25 Thread Andrzej Hajda
Inline function is safer than macro, also the name has been changed to
be consistent with other inline function encoder_to_hdmi.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 15 +--
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 0d538d3..c5a0617 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -46,8 +46,6 @@
 #include "exynos_drm_crtc.h"
 #include "exynos_mixer.h"
 
-#define ctx_from_connector(c)  container_of(c, struct hdmi_context, connector)
-
 #define HOTPLUG_DEBOUNCE_MS1100
 
 /* AVI header and aspect ratio */
@@ -128,6 +126,11 @@ static inline struct hdmi_context *encoder_to_hdmi(struct 
drm_encoder *e)
return container_of(e, struct hdmi_context, encoder);
 }
 
+static inline struct hdmi_context *connector_to_hdmi(struct drm_connector *c)
+{
+   return container_of(c, struct hdmi_context, connector);
+}
+
 struct hdmiphy_config {
int pixel_clock;
u8 conf[32];
@@ -935,7 +938,7 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata,
 static enum drm_connector_status hdmi_detect(struct drm_connector *connector,
bool force)
 {
-   struct hdmi_context *hdata = ctx_from_connector(connector);
+   struct hdmi_context *hdata = connector_to_hdmi(connector);
 
if (gpiod_get_value(hdata->hpd_gpio))
return connector_status_connected;
@@ -961,7 +964,7 @@ static struct drm_connector_funcs hdmi_connector_funcs = {
 
 static int hdmi_get_modes(struct drm_connector *connector)
 {
-   struct hdmi_context *hdata = ctx_from_connector(connector);
+   struct hdmi_context *hdata = connector_to_hdmi(connector);
struct edid *edid;
int ret;
 
@@ -1001,7 +1004,7 @@ static int hdmi_find_phy_conf(struct hdmi_context *hdata, 
u32 pixel_clock)
 static int hdmi_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode)
 {
-   struct hdmi_context *hdata = ctx_from_connector(connector);
+   struct hdmi_context *hdata = connector_to_hdmi(connector);
int ret;
 
DRM_DEBUG_KMS("xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
@@ -1022,7 +1025,7 @@ static int hdmi_mode_valid(struct drm_connector 
*connector,
 
 static struct drm_encoder *hdmi_best_encoder(struct drm_connector *connector)
 {
-   struct hdmi_context *hdata = ctx_from_connector(connector);
+   struct hdmi_context *hdata = connector_to_hdmi(connector);
 
return >encoder;
 }
-- 
1.9.1

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[PATCH 08/16] drm/exynos/hdmi: use optional regulator_get for hdmi-en

2015-09-25 Thread Andrzej Hajda
hdmi-en is an optional regulator so it should be better handled by
devm_regulator_get_optional call.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 725ddb5..841470c 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1803,19 +1803,17 @@ static int hdmi_resources_init(struct hdmi_context 
*hdata)
}
res->regul_count = ARRAY_SIZE(supply);
 
-   res->reg_hdmi_en = devm_regulator_get(dev, "hdmi-en");
-   if (IS_ERR(res->reg_hdmi_en) && PTR_ERR(res->reg_hdmi_en) != -ENOENT) {
-   DRM_ERROR("failed to get hdmi-en regulator\n");
+   res->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en");
+
+   if (PTR_ERR(res->reg_hdmi_en) == -ENODEV)
+   return 0;
+
+   if (IS_ERR(res->reg_hdmi_en))
return PTR_ERR(res->reg_hdmi_en);
-   }
-   if (!IS_ERR(res->reg_hdmi_en)) {
-   ret = regulator_enable(res->reg_hdmi_en);
-   if (ret) {
-   DRM_ERROR("failed to enable hdmi-en regulator\n");
-   return ret;
-   }
-   } else
-   res->reg_hdmi_en = NULL;
+
+   ret = regulator_enable(res->reg_hdmi_en);
+   if (ret)
+   DRM_ERROR("failed to enable hdmi-en regulator\n");
 
return ret;
 fail:
@@ -2050,7 +2048,7 @@ static int hdmi_remove(struct platform_device *pdev)
 
pm_runtime_disable(>dev);
 
-   if (hdata->res.reg_hdmi_en)
+   if (!IS_ERR(hdata->res.reg_hdmi_en))
regulator_disable(hdata->res.reg_hdmi_en);
 
if (hdata->hdmiphy_port)
-- 
1.9.1

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[PATCH 04/16] drm/exynos/hdmi: move PLL stabilization check code to separate function

2015-09-25 Thread Andrzej Hajda
The patch moves PLL stabilization check to separate function, adjust timeout
parameters and de-duplicates code common for both HW variants.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 68 ++--
 1 file changed, 26 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 6221803..414ea2d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1351,11 +1351,27 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
}
 }
 
+static void hdmiphy_wait_for_pll(struct hdmi_context *hdata)
+{
+   int tries;
+
+   for (tries = 0; tries < 10; ++tries) {
+   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
+
+   if (val & HDMI_PHY_STATUS_READY) {
+   DRM_DEBUG_KMS("PLL stabilized after %d tries\n", tries);
+   return;
+   }
+   usleep_range(10, 20);
+   }
+
+   DRM_ERROR("PLL could not reach steady state\n");
+}
+
 static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
 {
struct drm_display_mode *m = >current_mode;
unsigned int val;
-   int tries;
 
hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
hdmi_reg_writev(hdata, HDMI_V13_H_V_LINE_0, 3,
@@ -1441,32 +1457,11 @@ static void hdmi_v13_mode_apply(struct hdmi_context 
*hdata)
hdmi_reg_writev(hdata, HDMI_TG_VSYNC_BOT_HDMI_L, 2, 0x233);
hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1);
hdmi_reg_writev(hdata, HDMI_TG_FIELD_BOT_HDMI_L, 2, 0x233);
-
-   /* waiting for HDMIPHY's PLL to get to steady state */
-   for (tries = 100; tries; --tries) {
-   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
-   if (val & HDMI_PHY_STATUS_READY)
-   break;
-   usleep_range(1000, 2000);
-   }
-   /* steady state not achieved */
-   if (tries == 0) {
-   DRM_ERROR("hdmiphy's pll could not reach steady state.\n");
-   hdmi_regs_dump(hdata, "timing apply");
-   }
-
-   clk_disable_unprepare(hdata->res.sclk_hdmi);
-   clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
-   clk_prepare_enable(hdata->res.sclk_hdmi);
-
-   /* enable HDMI and timing generator */
-   hdmi_start(hdata, true);
 }
 
 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
 {
struct drm_display_mode *m = >current_mode;
-   int tries;
 
hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
hdmi_reg_writev(hdata, HDMI_V_LINE_0, 2, m->vtotal);
@@ -1578,26 +1573,6 @@ static void hdmi_v14_mode_apply(struct hdmi_context 
*hdata)
hdmi_reg_writev(hdata, HDMI_TG_VSYNC_TOP_HDMI_L, 2, 0x1);
hdmi_reg_writev(hdata, HDMI_TG_FIELD_TOP_HDMI_L, 2, 0x1);
hdmi_reg_writev(hdata, HDMI_TG_3D, 1, 0x0);
-
-   /* waiting for HDMIPHY's PLL to get to steady state */
-   for (tries = 100; tries; --tries) {
-   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
-   if (val & HDMI_PHY_STATUS_READY)
-   break;
-   usleep_range(1000, 2000);
-   }
-   /* steady state not achieved */
-   if (tries == 0) {
-   DRM_ERROR("hdmiphy's pll could not reach steady state.\n");
-   hdmi_regs_dump(hdata, "timing apply");
-   }
-
-   clk_disable_unprepare(hdata->res.sclk_hdmi);
-   clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
-   clk_prepare_enable(hdata->res.sclk_hdmi);
-
-   /* enable HDMI and timing generator */
-   hdmi_start(hdata, true);
 }
 
 static void hdmi_mode_apply(struct hdmi_context *hdata)
@@ -1606,6 +1581,15 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
hdmi_v13_mode_apply(hdata);
else
hdmi_v14_mode_apply(hdata);
+
+   hdmiphy_wait_for_pll(hdata);
+
+   clk_disable_unprepare(hdata->res.sclk_hdmi);
+   clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
+   clk_prepare_enable(hdata->res.sclk_hdmi);
+
+   /* enable HDMI and timing generator */
+   hdmi_start(hdata, true);
 }
 
 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
-- 
1.9.1

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[PATCH 03/16] drm/exynos/hdmi: use mappings for registers with IP dependent address

2015-09-25 Thread Andrzej Hajda
Some registers resides at different offsets depending on device version.
This patch adds infrastructure for mapping such registers to proper address
based on hdmi_type. It adds also mappings to some registers.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 56 +++-
 drivers/gpu/drm/exynos/regs-hdmi.h   |  4 +--
 2 files changed, 38 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index c25b892..6221803 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -66,6 +66,21 @@
 enum hdmi_type {
HDMI_TYPE13,
HDMI_TYPE14,
+   HDMI_TYPE_COUNT
+};
+
+#define HDMI_MAPPED_BASE 0x
+
+enum hdmi_mapped_regs {
+   HDMI_PHY_STATUS = HDMI_MAPPED_BASE,
+   HDMI_PHY_RSTOUT,
+   HDMI_ACR_CON,
+};
+
+static const u32 hdmi_reg_map[][HDMI_TYPE_COUNT] = {
+   { HDMI_V13_PHY_STATUS, HDMI_PHY_STATUS_0 },
+   { HDMI_V13_PHY_RSTOUT, HDMI_V14_PHY_RSTOUT },
+   { HDMI_V13_ACR_CON, HDMI_V14_ACR_CON },
 };
 
 struct hdmi_driver_data {
@@ -507,20 +522,29 @@ static struct hdmi_driver_data 
exynos4210_hdmi_driver_data = {
.is_apb_phy = 0,
 };
 
+static inline u32 hdmi_map_reg(struct hdmi_context *hdata, u32 reg_id)
+{
+   if ((reg_id & 0x) == HDMI_MAPPED_BASE)
+   return hdmi_reg_map[reg_id & 0x][hdata->drv_data->type];
+   return reg_id;
+}
+
 static inline u32 hdmi_reg_read(struct hdmi_context *hdata, u32 reg_id)
 {
-   return readl(hdata->regs + reg_id);
+   return readl(hdata->regs + hdmi_map_reg(hdata, reg_id));
 }
 
 static inline void hdmi_reg_writeb(struct hdmi_context *hdata,
 u32 reg_id, u8 value)
 {
-   writeb(value, hdata->regs + reg_id);
+   writeb(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
 }
 
 static inline void hdmi_reg_writev(struct hdmi_context *hdata, u32 reg_id,
   int bytes, u32 val)
 {
+   reg_id = hdmi_map_reg(hdata, reg_id);
+
while (--bytes >= 0) {
writeb(val & 0xff, hdata->regs + reg_id);
val >>= 8;
@@ -531,7 +555,10 @@ static inline void hdmi_reg_writev(struct hdmi_context 
*hdata, u32 reg_id,
 static inline void hdmi_reg_writemask(struct hdmi_context *hdata,
 u32 reg_id, u32 value, u32 mask)
 {
-   u32 old = readl(hdata->regs + reg_id);
+   u32 old;
+
+   reg_id = hdmi_map_reg(hdata, reg_id);
+   old = readl(hdata->regs + reg_id);
value = (value & mask) | (old & ~mask);
writel(value, hdata->regs + reg_id);
 }
@@ -682,7 +709,7 @@ static void hdmi_v14_regs_dump(struct hdmi_context *hdata, 
char *prefix)
DUMPREG(HDMI_PHY_STATUS_0);
DUMPREG(HDMI_PHY_STATUS_PLL);
DUMPREG(HDMI_PHY_CON_0);
-   DUMPREG(HDMI_PHY_RSTOUT);
+   DUMPREG(HDMI_V14_PHY_RSTOUT);
DUMPREG(HDMI_PHY_VPLL);
DUMPREG(HDMI_PHY_CMU);
DUMPREG(HDMI_CORE_RSTOUT);
@@ -1162,11 +1189,7 @@ static void hdmi_reg_acr(struct hdmi_context *hdata, u8 
*acr)
hdmi_reg_writeb(hdata, HDMI_ACR_CTS0, acr[3]);
hdmi_reg_writeb(hdata, HDMI_ACR_CTS1, acr[2]);
hdmi_reg_writeb(hdata, HDMI_ACR_CTS2, acr[1]);
-
-   if (hdata->drv_data->type == HDMI_TYPE13)
-   hdmi_reg_writeb(hdata, HDMI_V13_ACR_CON, 4);
-   else
-   hdmi_reg_writeb(hdata, HDMI_ACR_CON, 4);
+   hdmi_reg_writeb(hdata, HDMI_ACR_CON, 4);
 }
 
 static void hdmi_audio_init(struct hdmi_context *hdata)
@@ -1421,7 +1444,7 @@ static void hdmi_v13_mode_apply(struct hdmi_context 
*hdata)
 
/* waiting for HDMIPHY's PLL to get to steady state */
for (tries = 100; tries; --tries) {
-   u32 val = hdmi_reg_read(hdata, HDMI_V13_PHY_STATUS);
+   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
if (val & HDMI_PHY_STATUS_READY)
break;
usleep_range(1000, 2000);
@@ -1558,7 +1581,7 @@ static void hdmi_v14_mode_apply(struct hdmi_context 
*hdata)
 
/* waiting for HDMIPHY's PLL to get to steady state */
for (tries = 100; tries; --tries) {
-   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS_0);
+   u32 val = hdmi_reg_read(hdata, HDMI_PHY_STATUS);
if (val & HDMI_PHY_STATUS_READY)
break;
usleep_range(1000, 2000);
@@ -1587,8 +1610,6 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
-   u32 reg;
-
clk_disable_unprepare(hdata->res.sclk_hdmi);
clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
clk_prepare_enable(hdata->res.sclk_hdmi);
@@ -1597,15 +1618,10 @@ s

[PATCH 10/16] drm/exynos/hdmi: simplify clock re-parenting

2015-09-25 Thread Andrzej Hajda
Driver tries to disable sclk_hdmi during re-parenting, to avoid possible
glitches. It is ineffective as the clock is used also by other devices (mixer).
Anyway driver works without disabling sclk_hdmi.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 583dd5e..475341f 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -1569,9 +1569,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
hdmiphy_wait_for_pll(hdata);
 
-   clk_disable_unprepare(hdata->res.sclk_hdmi);
clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
-   clk_prepare_enable(hdata->res.sclk_hdmi);
 
/* enable HDMI and timing generator */
hdmi_start(hdata, true);
@@ -1579,9 +1577,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
-   clk_disable_unprepare(hdata->res.sclk_hdmi);
clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
-   clk_prepare_enable(hdata->res.sclk_hdmi);
 
/* reset hdmiphy */
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
-- 
1.9.1

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[PATCH 15/16] drm/exynos/hdmi: remove unused field

2015-09-25 Thread Andrzej Hajda
The patch removes unused hdmi_context field.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index a4ec8b9..b0f5ff4 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -103,7 +103,6 @@ struct hdmi_context {
struct device   *dev;
struct drm_device   *drm_dev;
struct drm_connectorconnector;
-   boolhpd;
boolpowered;
booldvi_mode;
struct delayed_work hotplug_work;
-- 
1.9.1

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[PATCH 16/16] drm: exynos: mixer: fix using usleep() in atomic context

2015-09-25 Thread Andrzej Hajda
From: Tomasz Stanislawski 

This patch fixes calling usleep_range() after taking reg_slock
using spin_lock_irqsave(). The mdelay() is used instead.
Waiting in atomic context is not the best idea in general.
Hopefully, waiting occurs only when Video Processor fails
to reset correctly.

Signed-off-by: Tomasz Stanislawski 
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c 
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 7f81cce..ecf956c 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -652,7 +652,7 @@ static void vp_win_reset(struct mixer_context *ctx)
/* waiting until VP_SRESET_PROCESSING is 0 */
if (~vp_reg_read(res, VP_SRESET) & VP_SRESET_PROCESSING)
break;
-   usleep_range(1, 12000);
+   mdelay(10);
}
WARN(tries == 0, "failed to reset Video Processor\n");
 }
-- 
1.9.1

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[PATCH 07/16] drm/exynos/hdmi: fix removal order

2015-09-25 Thread Andrzej Hajda
DRM device should be destroyed before releasing resources.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 50ced709..725ddb5 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -2046,15 +2046,17 @@ static int hdmi_remove(struct platform_device *pdev)
 
cancel_delayed_work_sync(>hotplug_work);
 
+   component_del(>dev, _component_ops);
+
+   pm_runtime_disable(>dev);
+
if (hdata->res.reg_hdmi_en)
regulator_disable(hdata->res.reg_hdmi_en);
 
if (hdata->hdmiphy_port)
put_device(>hdmiphy_port->dev);
-   put_device(>ddc_adpt->dev);
 
-   pm_runtime_disable(>dev);
-   component_del(>dev, _component_ops);
+   put_device(>ddc_adpt->dev);
 
return 0;
 }
-- 
1.9.1

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[PATCH 12/16] drm/exynos/hdmi: remove deprecated hdmi_resources structure

2015-09-25 Thread Andrzej Hajda
hdmi_resources structure was filled by old platform data code and is not
necessary anymore. The patch removes it at groups together resource related
fields in hdmi_context.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 105 +++
 1 file changed, 46 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index c0664d53..0d538d3 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -94,16 +94,6 @@ struct hdmi_driver_data {
unsigned int is_apb_phy:1;
 };
 
-struct hdmi_resources {
-   struct clk  *hdmi;
-   struct clk  *sclk_hdmi;
-   struct clk  *sclk_pixel;
-   struct clk  *sclk_hdmiphy;
-   struct clk  *mout_hdmi;
-   struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
-   struct regulator*reg_hdmi_en;
-};
-
 struct hdmi_context {
struct drm_encoder  encoder;
struct device   *dev;
@@ -112,25 +102,25 @@ struct hdmi_context {
boolhpd;
boolpowered;
booldvi_mode;
-
-   void __iomem*regs;
-   int irq;
struct delayed_work hotplug_work;
-
-   struct i2c_adapter  *ddc_adpt;
-   struct i2c_client   *hdmiphy_port;
-
-   /* current hdmiphy conf regs */
struct drm_display_mode current_mode;
u8  cea_video_id;
-
-   struct hdmi_resources   res;
const struct hdmi_driver_data   *drv_data;
 
-   struct gpio_desc*hpd_gpio;
+   void __iomem*regs;
void __iomem*regs_hdmiphy;
-
+   struct i2c_client   *hdmiphy_port;
+   struct i2c_adapter  *ddc_adpt;
+   struct gpio_desc*hpd_gpio;
+   int irq;
struct regmap   *pmureg;
+   struct clk  *hdmi;
+   struct clk  *sclk_hdmi;
+   struct clk  *sclk_pixel;
+   struct clk  *sclk_hdmiphy;
+   struct clk  *mout_hdmi;
+   struct regulator_bulk_data  regul_bulk[ARRAY_SIZE(supply)];
+   struct regulator*reg_hdmi_en;
 };
 
 static inline struct hdmi_context *encoder_to_hdmi(struct drm_encoder *e)
@@ -1567,7 +1557,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
hdmiphy_wait_for_pll(hdata);
 
-   clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_hdmiphy);
+   clk_set_parent(hdata->mout_hdmi, hdata->sclk_hdmiphy);
 
/* enable HDMI and timing generator */
hdmi_start(hdata, true);
@@ -1575,7 +1565,7 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
-   clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
+   clk_set_parent(hdata->mout_hdmi, hdata->sclk_pixel);
 
/* reset hdmiphy */
hdmi_reg_writemask(hdata, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT);
@@ -1642,7 +1632,6 @@ static void hdmi_mode_set(struct drm_encoder *encoder,
 static void hdmi_enable(struct drm_encoder *encoder)
 {
struct hdmi_context *hdata = encoder_to_hdmi(encoder);
-   struct hdmi_resources *res = >res;
 
if (hdata->powered)
return;
@@ -1651,15 +1640,15 @@ static void hdmi_enable(struct drm_encoder *encoder)
 
pm_runtime_get_sync(hdata->dev);
 
-   if (regulator_bulk_enable(ARRAY_SIZE(supply), res->regul_bulk))
+   if (regulator_bulk_enable(ARRAY_SIZE(supply), hdata->regul_bulk))
DRM_DEBUG_KMS("failed to enable regulator bulk\n");
 
/* set pmu hdmiphy control bit to enable hdmiphy */
regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
PMU_HDMI_PHY_ENABLE_BIT, 1);
 
-   clk_prepare_enable(res->hdmi);
-   clk_prepare_enable(res->sclk_hdmi);
+   clk_prepare_enable(hdata->hdmi);
+   clk_prepare_enable(hdata->sclk_hdmi);
 
hdmi_conf_apply(hdata);
 }
@@ -1667,7 +1656,6 @@ static void hdmi_enable(struct drm_encoder *encoder)
 static void hdmi_disable(struct drm_encoder *encoder)
 {
struct hdmi_context *hdata = encoder_to_hdmi(encoder);
-   struct hdmi_resources *res = >res;
struct drm_crtc *crtc = encoder->crtc;
const struct drm_crtc_helper_funcs *funcs = NULL;
 
@@ -1693,14 +1681,14 @@ static void hdmi_disable(struct drm_encoder *encoder)
 
   

[PATCH 11/16] drm/exynos/hdmi: convert to gpiod API

2015-09-25 Thread Andrzej Hajda
The patch converts API to gpiod and moves initialization code
to hdmi_resources_init.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 37 ++--
 1 file changed, 14 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 475341f..c0664d53 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -30,11 +30,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -46,8 +46,6 @@
 #include "exynos_drm_crtc.h"
 #include "exynos_mixer.h"
 
-#include 
-
 #define ctx_from_connector(c)  container_of(c, struct hdmi_context, connector)
 
 #define HOTPLUG_DEBOUNCE_MS1100
@@ -129,7 +127,7 @@ struct hdmi_context {
struct hdmi_resources   res;
const struct hdmi_driver_data   *drv_data;
 
-   int hpd_gpio;
+   struct gpio_desc*hpd_gpio;
void __iomem*regs_hdmiphy;
 
struct regmap   *pmureg;
@@ -949,7 +947,7 @@ static enum drm_connector_status hdmi_detect(struct 
drm_connector *connector,
 {
struct hdmi_context *hdata = ctx_from_connector(connector);
 
-   if (gpio_get_value(hdata->hpd_gpio))
+   if (gpiod_get_value(hdata->hpd_gpio))
return connector_status_connected;
 
return connector_status_disconnected;
@@ -1748,6 +1746,17 @@ static int hdmi_resources_init(struct hdmi_context 
*hdata)
 
DRM_DEBUG_KMS("HDMI resource init\n");
 
+   hdata->hpd_gpio = devm_gpiod_get(dev, "hpd", GPIOD_IN);
+   if (IS_ERR(hdata->hpd_gpio)) {
+   DRM_ERROR("cannot get hpd gpio property\n");
+   return PTR_ERR(hdata->hpd_gpio);
+   }
+
+   hdata->irq = gpiod_to_irq(hdata->hpd_gpio);
+   if (hdata->irq < 0) {
+   DRM_ERROR("failed to get GPIO irq\n");
+   return  hdata->irq;
+   }
/* get clocks, power */
res->hdmi = devm_clk_get(dev, "hdmi");
if (IS_ERR(res->hdmi)) {
@@ -1909,11 +1918,6 @@ static int hdmi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, hdata);
 
hdata->dev = dev;
-   hdata->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpio", 0);
-   if (hdata->hpd_gpio < 0) {
-   DRM_ERROR("cannot get hpd gpio property\n");
-   return hdata->hpd_gpio;
-   }
 
ret = hdmi_resources_init(hdata);
if (ret) {
@@ -1928,12 +1932,6 @@ static int hdmi_probe(struct platform_device *pdev)
return ret;
}
 
-   ret = devm_gpio_request(dev, hdata->hpd_gpio, "HPD");
-   if (ret) {
-   DRM_ERROR("failed to request HPD gpio\n");
-   return ret;
-   }
-
ddc_node = hdmi_legacy_ddc_dt_binding(dev);
if (ddc_node)
goto out_get_ddc_adpt;
@@ -1981,13 +1979,6 @@ out_get_phy_port:
}
}
 
-   hdata->irq = gpio_to_irq(hdata->hpd_gpio);
-   if (hdata->irq < 0) {
-   DRM_ERROR("failed to get GPIO irq\n");
-   ret = hdata->irq;
-   goto err_hdmiphy;
-   }
-
INIT_DELAYED_WORK(>hotplug_work, hdmi_hotplug_work_func);
 
ret = devm_request_threaded_irq(dev, hdata->irq, NULL,
-- 
1.9.1

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[PATCH 02/16] dt-bindings: remove deprecated compatible string from exynos-hdmi

2015-09-25 Thread Andrzej Hajda
samsung,exynos5-hdmi compatible was marked as deprecated in Jun 2013.
It was never used since then.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 Documentation/devicetree/bindings/video/exynos_hdmi.txt | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt 
b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 1fd8cf9..d474f59 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -2,10 +2,9 @@ Device-Tree bindings for drm hdmi driver
 
 Required properties:
 - compatible: value should be one among the following:
-   1) "samsung,exynos5-hdmi" 
-   2) "samsung,exynos4210-hdmi"
-   3) "samsung,exynos4212-hdmi"
-   4) "samsung,exynos5420-hdmi"
+   1) "samsung,exynos4210-hdmi"
+   2) "samsung,exynos4212-hdmi"
+   3) "samsung,exynos5420-hdmi"
 - reg: physical base address of the hdmi and length of memory mapped
region.
 - interrupts: interrupt number to the cpu.
-- 
1.9.1

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[PATCH 01/16] drm/exynos/hdmi: remove support for deprecated compatible

2015-09-25 Thread Andrzej Hajda
This compatible was marked as deprecated in Jun 2013 and it is not used since
then. Additionally its driver data points to wrong pll settings, so it
cannot work anyway.

Signed-off-by: Andrzej Hajda <a.ha...@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 932f7fa..c25b892 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -507,13 +507,6 @@ static struct hdmi_driver_data exynos4210_hdmi_driver_data 
= {
.is_apb_phy = 0,
 };
 
-static struct hdmi_driver_data exynos5_hdmi_driver_data = {
-   .type   = HDMI_TYPE14,
-   .phy_confs  = hdmiphy_v13_configs,
-   .phy_conf_count = ARRAY_SIZE(hdmiphy_v13_configs),
-   .is_apb_phy = 0,
-};
-
 static inline u32 hdmi_reg_read(struct hdmi_context *hdata, u32 reg_id)
 {
return readl(hdata->regs + reg_id);
@@ -1909,9 +1902,6 @@ fail:
 
 static struct of_device_id hdmi_match_types[] = {
{
-   .compatible = "samsung,exynos5-hdmi",
-   .data = _hdmi_driver_data,
-   }, {
.compatible = "samsung,exynos4210-hdmi",
.data = _hdmi_driver_data,
}, {
-- 
1.9.1

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Re: [PATCH 00/10] drm/exynos: add pm_runtime support

2015-09-21 Thread Andrzej Hajda
On 09/04/2015 10:15 PM, Gustavo Padovan wrote:
> From: Gustavo Padovan 
> 
> Hi,
> 
> This series adds proper runtime PM suport to CRTCs and Encoders, so
> now instead of relying on 'suspended' or 'enabled' flags to track when
> the CRTC or Encoder is enabled we let the pm_runtime subsystem do it for us
> and remove all the flags. This is a important step to the atomic 
> suspend/resume
> support that will land in drm anytime soon.
> 
> Please review!
> 
>   Gustavo

The title is quite misleading, exynos_drm has already pm_runtime support :)
Could you explain more why do you want to change it, what are requirements of
atomic pm? What is wrong with the current one?

If I remember correctly one of arguments for replacing pm callbacks in
components by one centralized callback in exynos_drm_drv was to avoid issues
with non-deterministic order of calling components suspend callback.
Are there any recent changes in PM, DRM which invalidates the reason above?

On the other side your patchset adds implicit dependency on PM_SLEEP config
option, it should be avoided or at least it should be explicit.

Regards
Andrzej

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Re: [PATCH] s5p-mfc: fix state check from encoder queue_setup

2015-08-18 Thread Andrzej Hajda
On 05/13/2015 09:25 AM, Seung-Woo Kim wrote:
 MFCINST_GOT_INST state is set to encoder context with set_format
 only for catpure buffer. In queue_setup of encoder called during
 reqbufs, it is checked MFCINST_GOT_INST state for both capture
 and output buffer. So this patch fixes to encoder to check
 MFCINST_GOT_INST state only for capture buffer from queue_setup.
 
 Signed-off-by: Seung-Woo Kim sw0312@samsung.com

Looks OK.

Reviewed-by: Andrzej Hajda a.ha...@samsung.com

Regards
Andrzej


 ---
  drivers/media/platform/s5p-mfc/s5p_mfc_enc.c |9 +
  1 files changed, 5 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
 b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
 index e65993f..2e57e9f 100644
 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
 +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
 @@ -1819,11 +1819,12 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
   struct s5p_mfc_ctx *ctx = fh_to_ctx(vq-drv_priv);
   struct s5p_mfc_dev *dev = ctx-dev;
  
 - if (ctx-state != MFCINST_GOT_INST) {
 - mfc_err(inavlid state: %d\n, ctx-state);
 - return -EINVAL;
 - }
   if (vq-type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
 + if (ctx-state != MFCINST_GOT_INST) {
 + mfc_err(inavlid state: %d\n, ctx-state);
 + return -EINVAL;
 + }
 +
   if (ctx-dst_fmt)
   *plane_count = ctx-dst_fmt-num_planes;
   else
 

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Re: [PATCH 0/7] drm/exynos/hdmi: refactoring/cleanup patches

2015-07-13 Thread Andrzej Hajda
On 07/13/2015 11:04 AM, Tobias Jakobi wrote:
 Hello,

 Andrzej Hajda wrote:
 Hi Tobias,

 On 07/12/2015 06:06 PM, Tobias Jakobi wrote:
 Hello Andrzej!

 Just some small comments.

 It seems like linux-samsung-soc wasn't put into Cc for '[PATCH RESEND
 0/6] drm/exynos: HDMI related fixes' (even though this series was),
 maybe you should also forward the other series to this list.
 Yes, I forgot about it.

 This series doesn't apply cleanly when 'drm/exynos: HDMI related fixes'
 is applied. E.g. the 'powered' boolean was removed by that series, but
 here in patch 2/7 ('drm/exynos/hdmi: Simplify HPD gpio handling') it's
 still there.
 'drm/exynos: HDMI related fixes' removes powered field from
 mixer driver, and powered field in the patch 2/7 is from hdmi driver.
 So they should not interfere and for sure they do not interfere in my local 
 git :)
 Have you any warning when you tried to apply those patches.
 yes of course, otherwise I wouldn't point this out. The specific hunks
 just fail.

 Which is kinda obvious:
 @@ -186,7 +186,6 @@  struct hdmi_context {
  struct drm_device   *drm_dev;
  struct drm_connectorconnector;
  struct drm_encoder  *encoder;
 -boolhpd;
  boolpowered;
  booldvi_mode;
  struct mutexhdmi_mutex;
 This doesn't apply when 'powered' is no longer ther.

I have this field still present in my tree which is build of following 
components:
- current exynos-drm-next,
- drm/exynos: HDMI related fixes,
- this patchset

Could you show me exactly which patch removes this field?

As I mentioned one patch removes similar field from mixer driver, but not from 
hdmi.

Regards
Andrzej





 With best wishes,
 Tobias

 I also noticed that some of the patches ('drm/exynos/hdmi: remove
 private lock code') clash with Gustavo's latest cleanup series [1]. E.g.
 your patch 3/7 ('drm/exynos/hdmi: remove private lock code') touches
 hdmi_commit() which was removed by Gustavo. Maybe you should coordinate
 things with him?
 This is always problematic :) I can try to rebase my patches on Gustavo's
 if necessary. Gustavo, Inki what is your opinion?

 Regards
 Andrzej


 With best wishes,
 Tobias


 [1] http://www.spinics.net/lists/linux-samsung-soc/msg45787.html


 Andrzej Hajda wrote:
 Hi Inki, Joonyoung,

 These patches removes obsolete and old structures, to simplify further
 development. They should not change behavior of the driver.

 The patchset is based on exynos-drm-next plus my HDMI related fixes [1].

 The patchset was tested on Universal and Odroid U3.

 [1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/132348

 Regards
 Andrzej


 Andrzej Hajda (7):
   drm/exynos/hdmi: remove old platform data code
   drm/exynos/hdmi: Simplify HPD gpio handling
   drm/exynos/hdmi: remove private lock code
   drm/exynos/hdmi: add driver data pointer to private context
   drm/exynos/hdmi: remove redundant configuration fields
   drm/exynos/hdmi: remove hdmi_v13_conf struct
   drm/exynos/hdmi: remove hdmi_v14_conf struct

  drivers/gpu/drm/exynos/exynos_hdmi.c | 860 
 ++-
  1 file changed, 245 insertions(+), 615 deletions(-)



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Re: [PATCH 0/7] drm/exynos/hdmi: refactoring/cleanup patches

2015-07-13 Thread Andrzej Hajda
Hi Tobias,

On 07/12/2015 06:06 PM, Tobias Jakobi wrote:
 Hello Andrzej!

 Just some small comments.

 It seems like linux-samsung-soc wasn't put into Cc for '[PATCH RESEND
 0/6] drm/exynos: HDMI related fixes' (even though this series was),
 maybe you should also forward the other series to this list.

Yes, I forgot about it.


 This series doesn't apply cleanly when 'drm/exynos: HDMI related fixes'
 is applied. E.g. the 'powered' boolean was removed by that series, but
 here in patch 2/7 ('drm/exynos/hdmi: Simplify HPD gpio handling') it's
 still there.

'drm/exynos: HDMI related fixes' removes powered field from
mixer driver, and powered field in the patch 2/7 is from hdmi driver.
So they should not interfere and for sure they do not interfere in my local git 
:)
Have you any warning when you tried to apply those patches.


 I also noticed that some of the patches ('drm/exynos/hdmi: remove
 private lock code') clash with Gustavo's latest cleanup series [1]. E.g.
 your patch 3/7 ('drm/exynos/hdmi: remove private lock code') touches
 hdmi_commit() which was removed by Gustavo. Maybe you should coordinate
 things with him?

This is always problematic :) I can try to rebase my patches on Gustavo's
if necessary. Gustavo, Inki what is your opinion?

Regards
Andrzej



 With best wishes,
 Tobias


 [1] http://www.spinics.net/lists/linux-samsung-soc/msg45787.html


 Andrzej Hajda wrote:
 Hi Inki, Joonyoung,

 These patches removes obsolete and old structures, to simplify further
 development. They should not change behavior of the driver.

 The patchset is based on exynos-drm-next plus my HDMI related fixes [1].

 The patchset was tested on Universal and Odroid U3.

 [1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/132348

 Regards
 Andrzej


 Andrzej Hajda (7):
   drm/exynos/hdmi: remove old platform data code
   drm/exynos/hdmi: Simplify HPD gpio handling
   drm/exynos/hdmi: remove private lock code
   drm/exynos/hdmi: add driver data pointer to private context
   drm/exynos/hdmi: remove redundant configuration fields
   drm/exynos/hdmi: remove hdmi_v13_conf struct
   drm/exynos/hdmi: remove hdmi_v14_conf struct

  drivers/gpu/drm/exynos/exynos_hdmi.c | 860 
 ++-
  1 file changed, 245 insertions(+), 615 deletions(-)



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[PATCH 3/7] drm/exynos/hdmi: remove private lock code

2015-07-09 Thread Andrzej Hajda
Most of the code is called by drm core framework, so it is already synchronized.
The only async function is irq routine which only calls drm framework so it
does not need to be synchronized.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 27 +++
 1 file changed, 3 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 1d07bdf..f2e909d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -22,7 +22,6 @@
 #include regs-hdmi.h
 
 #include linux/kernel.h
-#include linux/spinlock.h
 #include linux/wait.h
 #include linux/i2c.h
 #include linux/platform_device.h
@@ -188,7 +187,6 @@ struct hdmi_context {
struct drm_encoder  *encoder;
boolpowered;
booldvi_mode;
-   struct mutexhdmi_mutex;
 
void __iomem*regs;
int irq;
@@ -1774,10 +1772,8 @@ static void hdmi_conf_apply(struct hdmi_context *hdata)
hdmiphy_conf_reset(hdata);
hdmiphy_conf_apply(hdata);
 
-   mutex_lock(hdata-hdmi_mutex);
hdmi_start(hdata, false);
hdmi_conf_init(hdata);
-   mutex_unlock(hdata-hdmi_mutex);
 
hdmi_audio_init(hdata);
 
@@ -2029,12 +2025,8 @@ static void hdmi_commit(struct exynos_drm_display 
*display)
 {
struct hdmi_context *hdata = display_to_hdmi(display);
 
-   mutex_lock(hdata-hdmi_mutex);
-   if (!hdata-powered) {
-   mutex_unlock(hdata-hdmi_mutex);
+   if (!hdata-powered)
return;
-   }
-   mutex_unlock(hdata-hdmi_mutex);
 
hdmi_conf_apply(hdata);
 }
@@ -2043,16 +2035,11 @@ static void hdmi_poweron(struct hdmi_context *hdata)
 {
struct hdmi_resources *res = hdata-res;
 
-   mutex_lock(hdata-hdmi_mutex);
-   if (hdata-powered) {
-   mutex_unlock(hdata-hdmi_mutex);
+   if (hdata-powered)
return;
-   }
 
hdata-powered = true;
 
-   mutex_unlock(hdata-hdmi_mutex);
-
pm_runtime_get_sync(hdata-dev);
 
if (regulator_bulk_enable(res-regul_count, res-regul_bulk))
@@ -2073,10 +2060,8 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
 {
struct hdmi_resources *res = hdata-res;
 
-   mutex_lock(hdata-hdmi_mutex);
if (!hdata-powered)
-   goto out;
-   mutex_unlock(hdata-hdmi_mutex);
+   return;
 
/* HDMI System Disable */
hdmi_reg_writemask(hdata, HDMI_CON_0, 0, HDMI_EN);
@@ -2096,11 +2081,7 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
 
pm_runtime_put_sync(hdata-dev);
 
-   mutex_lock(hdata-hdmi_mutex);
hdata-powered = false;
-
-out:
-   mutex_unlock(hdata-hdmi_mutex);
 }
 
 static void hdmi_dpms(struct exynos_drm_display *display, int mode)
@@ -2330,8 +2311,6 @@ static int hdmi_probe(struct platform_device *pdev)
hdata-display.type = EXYNOS_DISPLAY_TYPE_HDMI;
hdata-display.ops = hdmi_display_ops;
 
-   mutex_init(hdata-hdmi_mutex);
-
platform_set_drvdata(pdev, hdata);
 
match = of_match_node(hdmi_match_types, dev-of_node);
-- 
1.9.1

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[PATCH 7/7] drm/exynos/hdmi: remove hdmi_v14_conf struct

2015-07-09 Thread Andrzej Hajda
The patch removes intermediate struct for HDMIv14 register configuration,
instead registry values are calculated on the fly.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 427 +--
 1 file changed, 109 insertions(+), 318 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 60663ad..448f534 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -86,71 +86,6 @@ struct hdmi_resources {
int regul_count;
 };
 
-struct hdmi_tg_regs {
-   u8 cmd[1];
-   u8 h_fsz[2];
-   u8 hact_st[2];
-   u8 hact_sz[2];
-   u8 v_fsz[2];
-   u8 vsync[2];
-   u8 vsync2[2];
-   u8 vact_st[2];
-   u8 vact_sz[2];
-   u8 field_chg[2];
-   u8 vact_st2[2];
-   u8 vact_st3[2];
-   u8 vact_st4[2];
-   u8 vsync_top_hdmi[2];
-   u8 vsync_bot_hdmi[2];
-   u8 field_top_hdmi[2];
-   u8 field_bot_hdmi[2];
-   u8 tg_3d[1];
-};
-
-struct hdmi_v14_core_regs {
-   u8 h_blank[2];
-   u8 v2_blank[2];
-   u8 v1_blank[2];
-   u8 v_line[2];
-   u8 h_line[2];
-   u8 hsync_pol[1];
-   u8 vsync_pol[1];
-   u8 int_pro_mode[1];
-   u8 v_blank_f0[2];
-   u8 v_blank_f1[2];
-   u8 h_sync_start[2];
-   u8 h_sync_end[2];
-   u8 v_sync_line_bef_2[2];
-   u8 v_sync_line_bef_1[2];
-   u8 v_sync_line_aft_2[2];
-   u8 v_sync_line_aft_1[2];
-   u8 v_sync_line_aft_pxl_2[2];
-   u8 v_sync_line_aft_pxl_1[2];
-   u8 v_blank_f2[2]; /* for 3D mode */
-   u8 v_blank_f3[2]; /* for 3D mode */
-   u8 v_blank_f4[2]; /* for 3D mode */
-   u8 v_blank_f5[2]; /* for 3D mode */
-   u8 v_sync_line_aft_3[2];
-   u8 v_sync_line_aft_4[2];
-   u8 v_sync_line_aft_5[2];
-   u8 v_sync_line_aft_6[2];
-   u8 v_sync_line_aft_pxl_3[2];
-   u8 v_sync_line_aft_pxl_4[2];
-   u8 v_sync_line_aft_pxl_5[2];
-   u8 v_sync_line_aft_pxl_6[2];
-   u8 vact_space_1[2];
-   u8 vact_space_2[2];
-   u8 vact_space_3[2];
-   u8 vact_space_4[2];
-   u8 vact_space_5[2];
-   u8 vact_space_6[2];
-};
-
-struct hdmi_v14_conf {
-   struct hdmi_v14_core_regs core;
-   struct hdmi_tg_regs tg;
-};
-
 struct hdmi_context {
struct exynos_drm_display   display;
struct device   *dev;
@@ -170,7 +105,6 @@ struct hdmi_context {
/* current hdmiphy conf regs */
struct drm_display_mode current_mode;
u8  cea_video_id;
-   struct hdmi_v14_confmode_conf;
 
struct hdmi_resources   res;
const struct hdmi_driver_data   *drv_data;
@@ -1508,143 +1442,119 @@ static void hdmi_v13_mode_apply(struct hdmi_context 
*hdata)
 
 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
 {
-   const struct hdmi_tg_regs *tg = hdata-mode_conf.tg;
-   const struct hdmi_v14_core_regs *core = hdata-mode_conf.core;
+   struct drm_display_mode *m = hdata-current_mode;
int tries;
 
-   /* setting core registers */
-   hdmi_reg_writeb(hdata, HDMI_H_BLANK_0, core-h_blank[0]);
-   hdmi_reg_writeb(hdata, HDMI_H_BLANK_1, core-h_blank[1]);
-   hdmi_reg_writeb(hdata, HDMI_V2_BLANK_0, core-v2_blank[0]);
-   hdmi_reg_writeb(hdata, HDMI_V2_BLANK_1, core-v2_blank[1]);
-   hdmi_reg_writeb(hdata, HDMI_V1_BLANK_0, core-v1_blank[0]);
-   hdmi_reg_writeb(hdata, HDMI_V1_BLANK_1, core-v1_blank[1]);
-   hdmi_reg_writeb(hdata, HDMI_V_LINE_0, core-v_line[0]);
-   hdmi_reg_writeb(hdata, HDMI_V_LINE_1, core-v_line[1]);
-   hdmi_reg_writeb(hdata, HDMI_H_LINE_0, core-h_line[0]);
-   hdmi_reg_writeb(hdata, HDMI_H_LINE_1, core-h_line[1]);
-   hdmi_reg_writeb(hdata, HDMI_HSYNC_POL, core-hsync_pol[0]);
-   hdmi_reg_writeb(hdata, HDMI_VSYNC_POL, core-vsync_pol[0]);
-   hdmi_reg_writeb(hdata, HDMI_INT_PRO_MODE, core-int_pro_mode[0]);
-   hdmi_reg_writeb(hdata, HDMI_V_BLANK_F0_0, core-v_blank_f0[0]);
-   hdmi_reg_writeb(hdata, HDMI_V_BLANK_F0_1, core-v_blank_f0[1]);
-   hdmi_reg_writeb(hdata, HDMI_V_BLANK_F1_0, core-v_blank_f1[0]);
-   hdmi_reg_writeb(hdata, HDMI_V_BLANK_F1_1, core-v_blank_f1[1]);
-   hdmi_reg_writeb(hdata, HDMI_H_SYNC_START_0, core-h_sync_start[0]);
-   hdmi_reg_writeb(hdata, HDMI_H_SYNC_START_1, core-h_sync_start[1]);
-   hdmi_reg_writeb(hdata, HDMI_H_SYNC_END_0, core-h_sync_end[0]);
-   hdmi_reg_writeb(hdata, HDMI_H_SYNC_END_1, core-h_sync_end[1]);
-   hdmi_reg_writeb(hdata, HDMI_V_SYNC_LINE_BEF_2_0,
-   core-v_sync_line_bef_2[0]);
-   hdmi_reg_writeb(hdata, HDMI_V_SYNC_LINE_BEF_2_1,
-   core-v_sync_line_bef_2[1]);
-   hdmi_reg_writeb(hdata, HDMI_V_SYNC_LINE_BEF_1_0,
-   core-v_sync_line_bef_1[0]);
-   hdmi_reg_writeb(hdata

[PATCH 1/7] drm/exynos/hdmi: remove old platform data code

2015-07-09 Thread Andrzej Hajda
s5p_hdmi_platform_data were used before device tree introduction.
As HDMI driver is DT only we can drop this struct completely.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 36 +---
 1 file changed, 5 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 4a00990..3cf09bb 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -48,7 +48,6 @@
 #include exynos_mixer.h
 
 #include linux/gpio.h
-#include media/s5p_hdmi.h
 
 #define ctx_from_connector(c)  container_of(c, struct hdmi_context, connector)
 
@@ -2259,30 +2258,6 @@ fail:
return ret;
 }
 
-static struct s5p_hdmi_platform_data *drm_hdmi_dt_parse_pdata
-   (struct device *dev)
-{
-   struct device_node *np = dev-of_node;
-   struct s5p_hdmi_platform_data *pd;
-   u32 value;
-
-   pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
-   if (!pd)
-   goto err_data;
-
-   if (!of_find_property(np, hpd-gpio, value)) {
-   DRM_ERROR(no hpd gpio property found\n);
-   goto err_data;
-   }
-
-   pd-hpd_gpio = of_get_named_gpio(np, hpd-gpio, 0);
-
-   return pd;
-
-err_data:
-   return NULL;
-}
-
 static struct of_device_id hdmi_match_types[] = {
{
.compatible = samsung,exynos5-hdmi,
@@ -2343,7 +2318,6 @@ static struct device_node 
*hdmi_legacy_phy_dt_binding(struct device *dev)
 static int hdmi_probe(struct platform_device *pdev)
 {
struct device_node *ddc_node, *phy_node;
-   struct s5p_hdmi_platform_data *pdata;
struct hdmi_driver_data *drv_data;
const struct of_device_id *match;
struct device *dev = pdev-dev;
@@ -2354,10 +2328,6 @@ static int hdmi_probe(struct platform_device *pdev)
if (!dev-of_node)
return -ENODEV;
 
-   pdata = drm_hdmi_dt_parse_pdata(dev);
-   if (!pdata)
-   return -EINVAL;
-
hdata = devm_kzalloc(dev, sizeof(struct hdmi_context), GFP_KERNEL);
if (!hdata)
return -ENOMEM;
@@ -2378,8 +2348,12 @@ static int hdmi_probe(struct platform_device *pdev)
hdata-phy_confs = drv_data-phy_confs;
hdata-phy_conf_count = drv_data-phy_conf_count;
 
-   hdata-hpd_gpio = pdata-hpd_gpio;
hdata-dev = dev;
+   hdata-hpd_gpio = of_get_named_gpio(dev-of_node, hpd-gpio, 0);
+   if (hdata-hpd_gpio  0) {
+   DRM_ERROR(cannot get hpd gpio property\n);
+   return hdata-hpd_gpio;
+   }
 
ret = hdmi_resources_init(hdata);
if (ret) {
-- 
1.9.1

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[PATCH 6/7] drm/exynos/hdmi: remove hdmi_v13_conf struct

2015-07-09 Thread Andrzej Hajda
The patch removes intermediate struct for HDMIv13 register configuration,
instead registry values are calculated on the fly.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 280 +--
 1 file changed, 101 insertions(+), 179 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index a3fe2f0..60663ad 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -107,19 +107,6 @@ struct hdmi_tg_regs {
u8 tg_3d[1];
 };
 
-struct hdmi_v13_core_regs {
-   u8 h_blank[2];
-   u8 v_blank[3];
-   u8 h_v_line[3];
-   u8 vsync_pol[1];
-   u8 int_pro_mode[1];
-   u8 v_blank_f[3];
-   u8 h_sync_gen[3];
-   u8 v_sync_gen1[3];
-   u8 v_sync_gen2[3];
-   u8 v_sync_gen3[3];
-};
-
 struct hdmi_v14_core_regs {
u8 h_blank[2];
u8 v2_blank[2];
@@ -159,21 +146,11 @@ struct hdmi_v14_core_regs {
u8 vact_space_6[2];
 };
 
-struct hdmi_v13_conf {
-   struct hdmi_v13_core_regs core;
-   struct hdmi_tg_regs tg;
-};
-
 struct hdmi_v14_conf {
struct hdmi_v14_core_regs core;
struct hdmi_tg_regs tg;
 };
 
-union hdmi_conf_regs {
-   struct hdmi_v13_conf v13_conf;
-   struct hdmi_v14_conf v14_conf;
-};
-
 struct hdmi_context {
struct exynos_drm_display   display;
struct device   *dev;
@@ -193,7 +170,7 @@ struct hdmi_context {
/* current hdmiphy conf regs */
struct drm_display_mode current_mode;
u8  cea_video_id;
-   union hdmi_conf_regsmode_conf;
+   struct hdmi_v14_confmode_conf;
 
struct hdmi_resources   res;
const struct hdmi_driver_data   *drv_data;
@@ -614,6 +591,16 @@ static inline void hdmi_reg_writeb(struct hdmi_context 
*hdata,
writeb(value, hdata-regs + reg_id);
 }
 
+static inline void hdmi_reg_writev(struct hdmi_context *hdata, u32 reg_id,
+  int bytes, u32 val)
+{
+   while (--bytes = 0) {
+   writeb(val  0xff, hdata-regs + reg_id);
+   val = 8;
+   reg_id += 4;
+   }
+}
+
 static inline void hdmi_reg_writemask(struct hdmi_context *hdata,
 u32 reg_id, u32 value, u32 mask)
 {
@@ -1409,65 +1396,94 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
 
 static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
 {
-   const struct hdmi_tg_regs *tg = hdata-mode_conf.v13_conf.tg;
-   const struct hdmi_v13_core_regs *core = hdata-mode_conf.v13_conf.core;
+   struct drm_display_mode *m = hdata-current_mode;
+   unsigned int val;
int tries;
 
-   /* setting core registers */
-   hdmi_reg_writeb(hdata, HDMI_H_BLANK_0, core-h_blank[0]);
-   hdmi_reg_writeb(hdata, HDMI_H_BLANK_1, core-h_blank[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_0, core-v_blank[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_1, core-v_blank[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_2, core-v_blank[2]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_V_LINE_0, core-h_v_line[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_V_LINE_1, core-h_v_line[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_V_LINE_2, core-h_v_line[2]);
-   hdmi_reg_writeb(hdata, HDMI_VSYNC_POL, core-vsync_pol[0]);
-   hdmi_reg_writeb(hdata, HDMI_INT_PRO_MODE, core-int_pro_mode[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_F_0, core-v_blank_f[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_F_1, core-v_blank_f[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_BLANK_F_2, core-v_blank_f[2]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_SYNC_GEN_0, core-h_sync_gen[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_SYNC_GEN_1, core-h_sync_gen[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_H_SYNC_GEN_2, core-h_sync_gen[2]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_1_0, core-v_sync_gen1[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_1_1, core-v_sync_gen1[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_1_2, core-v_sync_gen1[2]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_2_0, core-v_sync_gen2[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_2_1, core-v_sync_gen2[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_2_2, core-v_sync_gen2[2]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_3_0, core-v_sync_gen3[0]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_3_1, core-v_sync_gen3[1]);
-   hdmi_reg_writeb(hdata, HDMI_V13_V_SYNC_GEN_3_2, core-v_sync_gen3[2]);
+   hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m-htotal - m-hdisplay);
+   hdmi_reg_writev(hdata, HDMI_V13_H_V_LINE_0, 3,
+   (m-htotal  12) | m-vtotal);
+
+   val = (m-flags  DRM_MODE_FLAG_NVSYNC) ? 1 : 0;
+   hdmi_reg_writev(hdata, HDMI_VSYNC_POL, 1, val);
+
+   val

[PATCH 5/7] drm/exynos/hdmi: remove redundant configuration fields

2015-07-09 Thread Andrzej Hajda
The patch removes redundant fields from hdmi_conf_regs. Their values
can be calculated from current_mode. This patch is the first step to remove
whole hdmi_conf_regs structure.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 68 +---
 1 file changed, 24 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index f9c4de1..a3fe2f0 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -169,14 +169,9 @@ struct hdmi_v14_conf {
struct hdmi_tg_regs tg;
 };
 
-struct hdmi_conf_regs {
-   int pixel_clock;
-   int cea_video_id;
-   enum hdmi_picture_aspect aspect_ratio;
-   union {
-   struct hdmi_v13_conf v13_conf;
-   struct hdmi_v14_conf v14_conf;
-   } conf;
+union hdmi_conf_regs {
+   struct hdmi_v13_conf v13_conf;
+   struct hdmi_v14_conf v14_conf;
 };
 
 struct hdmi_context {
@@ -197,7 +192,8 @@ struct hdmi_context {
 
/* current hdmiphy conf regs */
struct drm_display_mode current_mode;
-   struct hdmi_conf_regs   mode_conf;
+   u8  cea_video_id;
+   union hdmi_conf_regsmode_conf;
 
struct hdmi_resources   res;
const struct hdmi_driver_data   *drv_data;
@@ -951,7 +947,7 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata,
u32 hdr_sum;
u8 chksum;
u32 mod;
-   u32 vic;
+   u8 ar;
 
mod = hdmi_reg_read(hdata, HDMI_MODE_SEL);
if (hdata-dvi_mode) {
@@ -982,27 +978,22 @@ static void hdmi_reg_infoframe(struct hdmi_context *hdata,
 * Set the aspect ratio as per the mode, mentioned in
 * Table 9 AVI InfoFrame Data Byte 2 of CEA-861-D Standard
 */
-   switch (hdata-mode_conf.aspect_ratio) {
+   ar = hdata-current_mode.picture_aspect_ratio;
+   switch (ar) {
case HDMI_PICTURE_ASPECT_4_3:
-   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2),
-   hdata-mode_conf.aspect_ratio |
-   AVI_4_3_CENTER_RATIO);
+   ar |= AVI_4_3_CENTER_RATIO;
break;
case HDMI_PICTURE_ASPECT_16_9:
-   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2),
-   hdata-mode_conf.aspect_ratio |
-   AVI_16_9_CENTER_RATIO);
+   ar |= AVI_16_9_CENTER_RATIO;
break;
case HDMI_PICTURE_ASPECT_NONE:
default:
-   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2),
-   hdata-mode_conf.aspect_ratio |
-   AVI_SAME_AS_PIC_ASPECT_RATIO);
+   ar |= AVI_SAME_AS_PIC_ASPECT_RATIO;
break;
}
+   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(2), ar);
 
-   vic = hdata-mode_conf.cea_video_id;
-   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(4), vic);
+   hdmi_reg_writeb(hdata, HDMI_AVI_BYTE(4), hdata-cea_video_id);
 
chksum = hdmi_chksum(hdata, HDMI_AVI_BYTE(1),
infoframe-any.length, hdr_sum);
@@ -1418,9 +1409,8 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
 
 static void hdmi_v13_mode_apply(struct hdmi_context *hdata)
 {
-   const struct hdmi_tg_regs *tg = hdata-mode_conf.conf.v13_conf.tg;
-   const struct hdmi_v13_core_regs *core =
-   hdata-mode_conf.conf.v13_conf.core;
+   const struct hdmi_tg_regs *tg = hdata-mode_conf.v13_conf.tg;
+   const struct hdmi_v13_core_regs *core = hdata-mode_conf.v13_conf.core;
int tries;
 
/* setting core registers */
@@ -1502,9 +1492,8 @@ static void hdmi_v13_mode_apply(struct hdmi_context 
*hdata)
 
 static void hdmi_v14_mode_apply(struct hdmi_context *hdata)
 {
-   const struct hdmi_tg_regs *tg = hdata-mode_conf.conf.v14_conf.tg;
-   const struct hdmi_v14_core_regs *core =
-   hdata-mode_conf.conf.v14_conf.core;
+   const struct hdmi_tg_regs *tg = hdata-mode_conf.v14_conf.tg;
+   const struct hdmi_v14_core_regs *core = hdata-mode_conf.v14_conf.core;
int tries;
 
/* setting core registers */
@@ -1742,7 +1731,7 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)
int i;
 
/* pixel clock */
-   i = hdmi_find_phy_conf(hdata, hdata-mode_conf.pixel_clock);
+   i = hdmi_find_phy_conf(hdata, hdata-current_mode.clock * 1000);
if (i  0) {
DRM_ERROR(failed to find hdmiphy conf\n);
return;
@@ -1794,15 +1783,10 @@ static void hdmi_set_reg(u8 *reg_pair, int

[PATCH 0/7] drm/exynos/hdmi: refactoring/cleanup patches

2015-07-09 Thread Andrzej Hajda
Hi Inki, Joonyoung,

These patches removes obsolete and old structures, to simplify further
development. They should not change behavior of the driver.

The patchset is based on exynos-drm-next plus my HDMI related fixes [1].

The patchset was tested on Universal and Odroid U3.

[1]: http://permalink.gmane.org/gmane.comp.video.dri.devel/132348

Regards
Andrzej


Andrzej Hajda (7):
  drm/exynos/hdmi: remove old platform data code
  drm/exynos/hdmi: Simplify HPD gpio handling
  drm/exynos/hdmi: remove private lock code
  drm/exynos/hdmi: add driver data pointer to private context
  drm/exynos/hdmi: remove redundant configuration fields
  drm/exynos/hdmi: remove hdmi_v13_conf struct
  drm/exynos/hdmi: remove hdmi_v14_conf struct

 drivers/gpu/drm/exynos/exynos_hdmi.c | 860 ++-
 1 file changed, 245 insertions(+), 615 deletions(-)

-- 
1.9.1

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[PATCH 4/7] drm/exynos/hdmi: add driver data pointer to private context

2015-07-09 Thread Andrzej Hajda
The patch replaces duplicated driver data fields in private context with
pointer to driver data. It also simplifies driver data lookup code.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 49 +++-
 1 file changed, 20 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index f2e909d..f9c4de1 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -32,8 +32,8 @@
 #include linux/clk.h
 #include linux/regulator/consumer.h
 #include linux/io.h
-#include linux/of.h
 #include linux/of_address.h
+#include linux/of_device.h
 #include linux/of_gpio.h
 #include linux/hdmi.h
 #include linux/component.h
@@ -200,14 +200,12 @@ struct hdmi_context {
struct hdmi_conf_regs   mode_conf;
 
struct hdmi_resources   res;
+   const struct hdmi_driver_data   *drv_data;
 
int hpd_gpio;
void __iomem*regs_hdmiphy;
-   const struct hdmiphy_config *phy_confs;
-   unsigned intphy_conf_count;
 
struct regmap   *pmureg;
-   enum hdmi_type  type;
 };
 
 static inline struct hdmi_context *display_to_hdmi(struct exynos_drm_display 
*d)
@@ -926,7 +924,7 @@ static void hdmi_v14_regs_dump(struct hdmi_context *hdata, 
char *prefix)
 
 static void hdmi_regs_dump(struct hdmi_context *hdata, char *prefix)
 {
-   if (hdata-type == HDMI_TYPE13)
+   if (hdata-drv_data-type == HDMI_TYPE13)
hdmi_v13_regs_dump(hdata, prefix);
else
hdmi_v14_regs_dump(hdata, prefix);
@@ -1087,8 +1085,8 @@ static int hdmi_find_phy_conf(struct hdmi_context *hdata, 
u32 pixel_clock)
 {
int i;
 
-   for (i = 0; i  hdata-phy_conf_count; i++)
-   if (hdata-phy_confs[i].pixel_clock == pixel_clock)
+   for (i = 0; i  hdata-drv_data-phy_conf_count; i++)
+   if (hdata-drv_data-phy_confs[i].pixel_clock == pixel_clock)
return i;
 
DRM_DEBUG_KMS(Could not find phy config for %d\n, pixel_clock);
@@ -1253,7 +1251,7 @@ static void hdmi_reg_acr(struct hdmi_context *hdata, u8 
*acr)
hdmi_reg_writeb(hdata, HDMI_ACR_CTS1, acr[2]);
hdmi_reg_writeb(hdata, HDMI_ACR_CTS2, acr[1]);
 
-   if (hdata-type == HDMI_TYPE13)
+   if (hdata-drv_data-type == HDMI_TYPE13)
hdmi_reg_writeb(hdata, HDMI_V13_ACR_CON, 4);
else
hdmi_reg_writeb(hdata, HDMI_ACR_CON, 4);
@@ -1387,7 +1385,7 @@ static void hdmi_conf_init(struct hdmi_context *hdata)
HDMI_VID_PREAMBLE_DIS | HDMI_GUARD_BAND_DIS);
}
 
-   if (hdata-type == HDMI_TYPE13) {
+   if (hdata-drv_data-type == HDMI_TYPE13) {
/* choose bluescreen (fecal) color */
hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_0, 0x12);
hdmi_reg_writeb(hdata, HDMI_V13_BLUE_SCREEN_1, 0x34);
@@ -1666,7 +1664,7 @@ static void hdmi_v14_mode_apply(struct hdmi_context 
*hdata)
 
 static void hdmi_mode_apply(struct hdmi_context *hdata)
 {
-   if (hdata-type == HDMI_TYPE13)
+   if (hdata-drv_data-type == HDMI_TYPE13)
hdmi_v13_mode_apply(hdata);
else
hdmi_v14_mode_apply(hdata);
@@ -1684,7 +1682,7 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
HDMI_PHY_ENABLE_MODE_SET);
 
-   if (hdata-type == HDMI_TYPE13)
+   if (hdata-drv_data-type == HDMI_TYPE13)
reg = HDMI_V13_PHY_RSTOUT;
else
reg = HDMI_PHY_RSTOUT;
@@ -1698,7 +1696,7 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 
 static void hdmiphy_poweron(struct hdmi_context *hdata)
 {
-   if (hdata-type != HDMI_TYPE14)
+   if (hdata-drv_data-type != HDMI_TYPE14)
return;
 
DRM_DEBUG_KMS(\n);
@@ -1718,7 +1716,7 @@ static void hdmiphy_poweron(struct hdmi_context *hdata)
 
 static void hdmiphy_poweroff(struct hdmi_context *hdata)
 {
-   if (hdata-type != HDMI_TYPE14)
+   if (hdata-drv_data-type != HDMI_TYPE14)
return;
 
DRM_DEBUG_KMS(\n);
@@ -1750,7 +1748,8 @@ static void hdmiphy_conf_apply(struct hdmi_context *hdata)
return;
}
 
-   ret = hdmiphy_reg_write_buf(hdata, 0, hdata-phy_confs[i].conf, 32);
+   ret = hdmiphy_reg_write_buf(hdata, 0,
+   hdata-drv_data-phy_confs[i].conf, 32);
if (ret) {
DRM_ERROR(failed to configure hdmiphy\n);
return;
@@ -2015,7 +2014,7 @@ static void hdmi_mode_set(struct exynos_drm_display 
*display,
/* preserve mode information for later use. */
drm_mode_copy(hdata-current_mode, mode);
 
-   if (hdata-type

[PATCH 2/7] drm/exynos/hdmi: Simplify HPD gpio handling

2015-07-09 Thread Andrzej Hajda
GPIO is tested only in hdmi_detect, so there is no reason to set it in
other places and to preserve its value in context.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_hdmi.c | 13 +++--
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 3cf09bb..1d07bdf 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -186,7 +186,6 @@ struct hdmi_context {
struct drm_device   *drm_dev;
struct drm_connectorconnector;
struct drm_encoder  *encoder;
-   boolhpd;
boolpowered;
booldvi_mode;
struct mutexhdmi_mutex;
@@ -1037,10 +1036,10 @@ static enum drm_connector_status hdmi_detect(struct 
drm_connector *connector,
 {
struct hdmi_context *hdata = ctx_from_connector(connector);
 
-   hdata-hpd = gpio_get_value(hdata-hpd_gpio);
+   if (gpio_get_value(hdata-hpd_gpio))
+   return connector_status_connected;
 
-   return hdata-hpd ? connector_status_connected :
-   connector_status_disconnected;
+   return connector_status_disconnected;
 }
 
 static void hdmi_connector_destroy(struct drm_connector *connector)
@@ -2156,10 +2155,6 @@ static void hdmi_hotplug_work_func(struct work_struct 
*work)
 
hdata = container_of(work, struct hdmi_context, hotplug_work.work);
 
-   mutex_lock(hdata-hdmi_mutex);
-   hdata-hpd = gpio_get_value(hdata-hpd_gpio);
-   mutex_unlock(hdata-hdmi_mutex);
-
if (hdata-drm_dev)
drm_helper_hpd_irq_event(hdata-drm_dev);
 }
@@ -2428,8 +2423,6 @@ out_get_phy_port:
goto err_hdmiphy;
}
 
-   hdata-hpd = gpio_get_value(hdata-hpd_gpio);
-
INIT_DELAYED_WORK(hdata-hotplug_work, hdmi_hotplug_work_func);
 
ret = devm_request_threaded_irq(dev, hdata-irq, NULL,
-- 
1.9.1

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Re: [PATCH 05/23] drm/exynos: Kconfig: select DP if FIMD or DECON are selected

2015-06-24 Thread Andrzej Hajda
Hi Gustavo,

On 06/23/2015 11:35 PM, Gustavo Padovan wrote:
 From: Gustavo Padovan gustavo.pado...@collabora.co.uk
 
 DP is required if either FIMD or DECON are selected so select it
 automatically.

It is not true, there are even SoCs with FIMD/DECON and without DP.

Regards
Andrzej

 
 Signed-off-by: Gustavo Padovan gustavo.pado...@collabora.co.uk
 ---
  drivers/gpu/drm/exynos/Kconfig | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
 index 8203283..2d86304 100644
 --- a/drivers/gpu/drm/exynos/Kconfig
 +++ b/drivers/gpu/drm/exynos/Kconfig
 @@ -20,6 +20,7 @@ config DRM_EXYNOS_FIMD
   bool Exynos DRM FIMD
   depends on DRM_EXYNOS  !FB_S3C
   select FB_MODE_HELPERS
 + select DRM_EXYNOS_DP
   select MFD_SYSCON
   help
 Choose this option if you want to use Exynos FIMD for DRM.
 @@ -28,6 +29,7 @@ config DRM_EXYNOS7_DECON
   bool Exynos DRM DECON
   depends on DRM_EXYNOS  !FB_S3C
   select FB_MODE_HELPERS
 + select DRM_EXYNOS_DP
   help
 Choose this option if you want to use Exynos DECON for DRM.
  
 @@ -50,7 +52,7 @@ config DRM_EXYNOS_DSI
  
  config DRM_EXYNOS_DP
   bool EXYNOS DRM DP driver support
 - depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)  ARCH_EXYNOS  
 (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS)
 + depends on ARCH_EXYNOS  (DRM_PTN3460=n || DRM_PTN3460=y || 
 DRM_PTN3460=DRM_EXYNOS)
   default DRM_EXYNOS
   select DRM_PANEL
   help
 

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Re: [PATCH 00/21] On-demand device registration

2015-06-10 Thread Andrzej Hajda
On 06/10/2015 12:19 PM, Tomeu Vizoso wrote:
 On 10 June 2015 at 09:30, Linus Walleij linus.wall...@linaro.org wrote:
 On Tue, Jun 2, 2015 at 12:14 PM, Tomeu Vizoso
 tomeu.viz...@collabora.com wrote:
 On 2 June 2015 at 10:48, Linus Walleij linus.wall...@linaro.org wrote:

 This is what systemd is doing in userspace for starting services:
 ask for your dependencies and wait for them if they are not
 there. So drivers ask for resources and wait for them. It also
 needs to be abstract, so for example we need to be able to
 hang on regulator_get() until the driver is up and providing that
 regulator, and as long as everything is in slowpath it should
 be OK. (And vice versa mutatis mutandis for clk, gpio, pin
 control, interrupts (!) and DMA channels for example.)

 I understood above that you propose probing devices in order, but now
 you mention that resource getters would block until the dependency is
 fulfilled which confuses me because if we are probing in order then
 all dependencies would be fulfilled before the device in question gets
 probed.

 Sorry, the problem space is a bit convoluted so the answers
 get a bit convoluted. Maybe I'm thinking aloud and altering the course
 of my thoughts as I type...

 I guess there can be explicit dependencies for resources like this
 patch does, but another way would be for all resource fetch functions
 to be instrumented, so that you do not block until you try to take
 a resource that is not yet there, e.g.:

 regulator_get(...) - not available, so:
 - identify target regulator provider - this will need instrumentation
 - probe it

 It then turns out the regulator driver is on the i2c bus, so we
 need to probe the i2c driver:
 - identify target i2c host for the regulator driver - this will need
   instrumentation
 - probe the i2c host driver

 i2c host comes out, probes the regulator driver, regulator driver
 probes and then the regulator_get() call returns.
 
 Hmm, if I understand correctly what you say, this is exactly what this
 particular series does:
 
 regulator_get - of_platform_device_ensure - probe() on the platform
 device that encloses the requested device node (i2c host) - i2c slave
 gets probed and the regulator registered - regulator_get returns the
 requested resource

The downside of this solution is that it will not work without device
tree or even without device dependencies not explicitly specified in
device tree.

 
 The downside I'm currently looking at is that an explicit dependency
 graph would be useful to have for other purposes. For example to print
 a neat warning when a dependency cannot be fulfilled. Or to refuse to
 unbind a device which other devices depend on,

As I understand Greg you cannot prevent unbinding by design, see [1].

[1]: http://thread.gmane.org/gmane.linux.kernel/1154308/focus=1154648

 or to automatically
 unbind the devices that depend on it,

What about devices that have weak dependency? They should not be unbound
but they should be somehow noticed about unbinding.

In general many kernel frameworks are broken in handling hot-unbinding
of drivers, consumers are not noticed about unbinding of their resource
providers and usually they stay with broken handles or handles to dummy
resources.

I suspect the only proper solution for handling resources that can
dynamically appear/disappear is to provide notification to their
consumers about appearance change of the resource.

I have proposed some times ago solution for above problems based on the
statement above, cover letter explains it in more detail [2].
In short it solves following issues:
- consumer receives resource as soon as it becomes available,
- consumer is notified just before resource removal,
- it can properly handle provider unbind/re-bind,
- it avoids late init due to deferred probing,
- it allows to track optional resources.

[2]: http://thread.gmane.org/gmane.linux.kernel.gpio/5201

Regards
Andrzej

 or to print a warning if a
 device is hotplugged off and other devices depend on it.
 
 This requires instrumentation on anything providing a resource
 to another driver like those I mentioned and a lot of overhead
 infrastructure, but I think it's the right approach. However I don't
 know if I would ever be able to pull that off myself, I know talk
 is cheap and I should show the code instead.
 
 Yeah, if you can give it a second look and say if it matches what you
 wrote above, it would be very much appreciated.
 
 Deepest respect for your efforts!
 
 Thanks!
 
 Tomeu
 
 Yours,
 Linus Walleij
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[PATCH v2 2/3] drm/exynos: fix broken component binding in case of multiple pipelines

2015-06-10 Thread Andrzej Hajda
In case there are multiple pipelines and deferred probe occurs, only components
of the first pipeline were bound. As a result only one pipeline was available.
The main cause of this issue was dynamic generation of component match table -
every component driver during probe registered itself on helper list, if there
was at least one pipeline present on this list component match table were
created without deferred components.
This patch removes this helper list, instead it creates match table from
existing devices requiring exynos_drm KMS drivers. This way match table do not
depend on probe/deferral order and contains all KMS components.
As a side effect patch makes the code cleaner and significantly smaller.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
v2:
- removed unused types (as pointed out by Gustavo) and variables,
- fixed two gotos to removed label in dsi driver.
---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c |  14 +-
 drivers/gpu/drm/exynos/exynos_dp_core.c|  14 +-
 drivers/gpu/drm/exynos/exynos_drm_dpi.c|  20 +-
 drivers/gpu/drm/exynos/exynos_drm_drv.c| 283 -
 drivers/gpu/drm/exynos/exynos_drm_drv.h|  14 --
 drivers/gpu/drm/exynos/exynos_drm_dsi.c|  35 +---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |  28 +--
 drivers/gpu/drm/exynos/exynos_drm_vidi.c   |  18 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c   |  22 +--
 drivers/gpu/drm/exynos/exynos_mixer.c  |  14 +-
 10 files changed, 101 insertions(+), 361 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index d659ba2..22cb067 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -769,11 +769,6 @@ static int decon_probe(struct platform_device *pdev)
if (!ctx)
return -ENOMEM;
 
-   ret = exynos_drm_component_add(dev, EXYNOS_DEVICE_TYPE_CRTC,
-   EXYNOS_DISPLAY_TYPE_LCD);
-   if (ret)
-   return ret;
-
ctx-dev = dev;
ctx-suspended = true;
 
@@ -783,10 +778,8 @@ static int decon_probe(struct platform_device *pdev)
of_node_put(i80_if_timings);
 
ctx-regs = of_iomap(dev-of_node, 0);
-   if (!ctx-regs) {
-   ret = -ENOMEM;
-   goto err_del_component;
-   }
+   if (!ctx-regs)
+   return -ENOMEM;
 
ctx-pclk = devm_clk_get(dev, pclk_decon0);
if (IS_ERR(ctx-pclk)) {
@@ -856,8 +849,6 @@ err_disable_pm_runtime:
 err_iounmap:
iounmap(ctx-regs);
 
-err_del_component:
-   exynos_drm_component_del(dev, EXYNOS_DEVICE_TYPE_CRTC);
return ret;
 }
 
@@ -870,7 +861,6 @@ static int decon_remove(struct platform_device *pdev)
iounmap(ctx-regs);
 
component_del(pdev-dev, decon_component_ops);
-   exynos_drm_component_del(pdev-dev, EXYNOS_DEVICE_TYPE_CRTC);
 
return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index c9995b1..1057cc2 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1333,7 +1333,6 @@ static int exynos_dp_probe(struct platform_device *pdev)
struct device *dev = pdev-dev;
struct device_node *panel_node, *bridge_node, *endpoint;
struct exynos_dp_device *dp;
-   int ret;
 
dp = devm_kzalloc(pdev-dev, sizeof(struct exynos_dp_device),
GFP_KERNEL);
@@ -1344,11 +1343,6 @@ static int exynos_dp_probe(struct platform_device *pdev)
dp-display.ops = exynos_dp_display_ops;
platform_set_drvdata(pdev, dp);
 
-   ret = exynos_drm_component_add(pdev-dev, EXYNOS_DEVICE_TYPE_CONNECTOR,
-   dp-display.type);
-   if (ret)
-   return ret;
-
panel_node = of_parse_phandle(dev-of_node, panel, 0);
if (panel_node) {
dp-panel = of_drm_find_panel(panel_node);
@@ -1369,18 +1363,12 @@ static int exynos_dp_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
}
 
-   ret = component_add(pdev-dev, exynos_dp_ops);
-   if (ret)
-   exynos_drm_component_del(pdev-dev,
-   EXYNOS_DEVICE_TYPE_CONNECTOR);
-
-   return ret;
+   return component_add(pdev-dev, exynos_dp_ops);
 }
 
 static int exynos_dp_remove(struct platform_device *pdev)
 {
component_del(pdev-dev, exynos_dp_ops);
-   exynos_drm_component_del(pdev-dev, EXYNOS_DEVICE_TYPE_CONNECTOR);
 
return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
index 6dc328e..7cb6595 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
@@ -313,33 +313,19 @@ struct exynos_drm_display *exynos_dpi_probe(struct device 
*dev)
ctx-dev = dev;
ctx

[PATCH 2/3] drm/exynos: fix broken component binding in case of multiple pipelines

2015-06-08 Thread Andrzej Hajda
In case there are multiple pipelines and deferred probe occurs, only components
of the first pipeline were bound. As a result only one pipeline was available.
The main cause of this issue was dynamic generation of component match table -
every component driver during probe registered itself on helper list, if there
was at least one pipeline present on this list component match table were
created without deferred components.
This patch removes this helper list, instead it creates match table from
existing devices requiring exynos_drm KMS drivers. This way match table do not
depend on probe/deferral order and contains all KMS components.
As a side effect patch makes the code cleaner and significantly smaller.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos7_drm_decon.c |  14 +-
 drivers/gpu/drm/exynos/exynos_dp_core.c|  13 +-
 drivers/gpu/drm/exynos/exynos_drm_dpi.c|  20 +-
 drivers/gpu/drm/exynos/exynos_drm_drv.c| 283 -
 drivers/gpu/drm/exynos/exynos_drm_dsi.c|  29 +--
 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |  28 +--
 drivers/gpu/drm/exynos/exynos_drm_vidi.c   |  18 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c   |  22 +--
 drivers/gpu/drm/exynos/exynos_mixer.c  |  14 +-
 9 files changed, 99 insertions(+), 342 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index d659ba2..22cb067 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -769,11 +769,6 @@ static int decon_probe(struct platform_device *pdev)
if (!ctx)
return -ENOMEM;
 
-   ret = exynos_drm_component_add(dev, EXYNOS_DEVICE_TYPE_CRTC,
-   EXYNOS_DISPLAY_TYPE_LCD);
-   if (ret)
-   return ret;
-
ctx-dev = dev;
ctx-suspended = true;
 
@@ -783,10 +778,8 @@ static int decon_probe(struct platform_device *pdev)
of_node_put(i80_if_timings);
 
ctx-regs = of_iomap(dev-of_node, 0);
-   if (!ctx-regs) {
-   ret = -ENOMEM;
-   goto err_del_component;
-   }
+   if (!ctx-regs)
+   return -ENOMEM;
 
ctx-pclk = devm_clk_get(dev, pclk_decon0);
if (IS_ERR(ctx-pclk)) {
@@ -856,8 +849,6 @@ err_disable_pm_runtime:
 err_iounmap:
iounmap(ctx-regs);
 
-err_del_component:
-   exynos_drm_component_del(dev, EXYNOS_DEVICE_TYPE_CRTC);
return ret;
 }
 
@@ -870,7 +861,6 @@ static int decon_remove(struct platform_device *pdev)
iounmap(ctx-regs);
 
component_del(pdev-dev, decon_component_ops);
-   exynos_drm_component_del(pdev-dev, EXYNOS_DEVICE_TYPE_CRTC);
 
return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c 
b/drivers/gpu/drm/exynos/exynos_dp_core.c
index c9995b1..bf1fce2 100644
--- a/drivers/gpu/drm/exynos/exynos_dp_core.c
+++ b/drivers/gpu/drm/exynos/exynos_dp_core.c
@@ -1344,11 +1344,6 @@ static int exynos_dp_probe(struct platform_device *pdev)
dp-display.ops = exynos_dp_display_ops;
platform_set_drvdata(pdev, dp);
 
-   ret = exynos_drm_component_add(pdev-dev, EXYNOS_DEVICE_TYPE_CONNECTOR,
-   dp-display.type);
-   if (ret)
-   return ret;
-
panel_node = of_parse_phandle(dev-of_node, panel, 0);
if (panel_node) {
dp-panel = of_drm_find_panel(panel_node);
@@ -1369,18 +1364,12 @@ static int exynos_dp_probe(struct platform_device *pdev)
return -EPROBE_DEFER;
}
 
-   ret = component_add(pdev-dev, exynos_dp_ops);
-   if (ret)
-   exynos_drm_component_del(pdev-dev,
-   EXYNOS_DEVICE_TYPE_CONNECTOR);
-
-   return ret;
+   return component_add(pdev-dev, exynos_dp_ops);
 }
 
 static int exynos_dp_remove(struct platform_device *pdev)
 {
component_del(pdev-dev, exynos_dp_ops);
-   exynos_drm_component_del(pdev-dev, EXYNOS_DEVICE_TYPE_CONNECTOR);
 
return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
index 6dc328e..7cb6595 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
@@ -313,33 +313,19 @@ struct exynos_drm_display *exynos_dpi_probe(struct device 
*dev)
ctx-dev = dev;
ctx-dpms_mode = DRM_MODE_DPMS_OFF;
 
-   ret = exynos_drm_component_add(dev,
-   EXYNOS_DEVICE_TYPE_CONNECTOR,
-   ctx-display.type);
-   if (ret)
-   return ERR_PTR(ret);
-
ret = exynos_dpi_parse_dt(ctx);
if (ret  0) {
devm_kfree(dev, ctx);
-   goto err_del_component;
+   return NULL;
}
 
if (ctx-panel_node) {
ctx-panel = of_drm_find_panel(ctx-panel_node

[PATCH 0/3] exynos_drm initialization fix

2015-06-08 Thread Andrzej Hajda
Hi Inki,

Those patches fixes issue of exynos_drm initialization with more than one 
pipeline,
which is present in exynos_drm drivers for long time.
On most platforms at least two of three following pipelines are present:
1. VIDI.
2. FIMD/DECON - DSI/DPI - Panel.
3. MIXER/DECON - HDMI - TV.
In case we want use two or three pipelines simultaneously and one of KMS drivers
defers probing only some drivers will be bound to drm driver and usually only 
one
pipeline will be available. This patchset fixes it.

Beside bugfixing the patchset significantly simplifies and clears the code - 
about
300 lines removed.

The patchset is based on exynos-drm-next branch.
The patchset was tested on universal_c210 board.

Regards
Andrzej


Andrzej Hajda (3):
  drm/exynos: consolidate driver/device initialization code
  drm/exynos: fix broken component binding in case of multiple pipelines
  drm/exynos: remove SoC checking code

 drivers/gpu/drm/exynos/exynos7_drm_decon.c |  14 +-
 drivers/gpu/drm/exynos/exynos_dp_core.c|  13 +-
 drivers/gpu/drm/exynos/exynos_drm_dpi.c|  20 +-
 drivers/gpu/drm/exynos/exynos_drm_drv.c| 427 +++--
 drivers/gpu/drm/exynos/exynos_drm_drv.h|  17 --
 drivers/gpu/drm/exynos/exynos_drm_dsi.c|  29 +-
 drivers/gpu/drm/exynos/exynos_drm_fimd.c   |  28 +-
 drivers/gpu/drm/exynos/exynos_drm_ipp.c|  27 --
 drivers/gpu/drm/exynos/exynos_drm_vidi.c   |  53 +---
 drivers/gpu/drm/exynos/exynos_hdmi.c   |  22 +-
 drivers/gpu/drm/exynos/exynos_mixer.c  |  14 +-
 11 files changed, 187 insertions(+), 477 deletions(-)

-- 
1.9.1

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[PATCH 3/3] drm/exynos: remove SoC checking code

2015-06-08 Thread Andrzej Hajda
SoC checking code is not necessary anymore, as exynos_drm_match_add and
exynos_drm_platform_probe already properly handles situation when there are
no Exynos DRM components.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_drm_drv.c | 27 +--
 1 file changed, 1 insertion(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index cfbfb6c..9ec4027 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -560,34 +560,9 @@ static inline void 
exynos_drm_unregister_non_kms_drivers(void)
ARRAY_SIZE(exynos_drm_non_kms_drivers));
 }
 
-static const char * const strings[] = {
-   samsung,exynos3,
-   samsung,exynos4,
-   samsung,exynos5,
-   samsung,exynos7,
-};
-
 static int exynos_drm_init(void)
 {
-   bool is_exynos = false;
-   int ret, i;
-
-   /*
-* Register device object only in case of Exynos SoC.
-*
-* Below codes resolves temporarily infinite loop issue incurred
-* by Exynos drm driver when using multi-platform kernel.
-* So these codes will be replaced with more generic way later.
-*/
-   for (i = 0; i  ARRAY_SIZE(strings); i++) {
-   if (of_machine_is_compatible(strings[i])) {
-   is_exynos = true;
-   break;
-   }
-   }
-
-   if (!is_exynos)
-   return -ENODEV;
+   int ret;
 
ret = exynos_drm_register_devices();
if (ret)
-- 
1.9.1

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[PATCH 1/3] drm/exynos: consolidate driver/device initialization code

2015-06-08 Thread Andrzej Hajda
Code registering different drivers and simple platform devices was dispersed
across multiple sub-modules. This patch moves it to one place. As a result
initialization code is shorter and cleaner and should simplify further
development.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 drivers/gpu/drm/exynos/exynos_drm_drv.c  | 221 +++
 drivers/gpu/drm/exynos/exynos_drm_drv.h  |  17 ---
 drivers/gpu/drm/exynos/exynos_drm_ipp.c  |  27 
 drivers/gpu/drm/exynos/exynos_drm_vidi.c |  35 -
 4 files changed, 139 insertions(+), 161 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 08b9a8c..5c5a72a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -38,8 +38,6 @@
 #define DRIVER_MAJOR   1
 #define DRIVER_MINOR   0
 
-static struct platform_device *exynos_drm_pdev;
-
 static DEFINE_MUTEX(drm_component_lock);
 static LIST_HEAD(drm_component_list);
 
@@ -527,7 +525,41 @@ static const struct component_master_ops exynos_drm_ops = {
.unbind = exynos_drm_unbind,
 };
 
+static int exynos_drm_platform_probe(struct platform_device *pdev)
+{
+   struct component_match *match;
+
+   pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
+   exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
+
+   match = exynos_drm_match_add(pdev-dev);
+   if (IS_ERR(match)) {
+   return PTR_ERR(match);
+   }
+
+   return component_master_add_with_match(pdev-dev, exynos_drm_ops,
+  match);
+}
+
+static int exynos_drm_platform_remove(struct platform_device *pdev)
+{
+   component_master_del(pdev-dev, exynos_drm_ops);
+   return 0;
+}
+
+static struct platform_driver exynos_drm_platform_driver = {
+   .probe  = exynos_drm_platform_probe,
+   .remove = exynos_drm_platform_remove,
+   .driver = {
+   .name   = exynos-drm,
+   .pm = exynos_drm_pm_ops,
+   },
+};
+
 static struct platform_driver *const exynos_drm_kms_drivers[] = {
+#ifdef CONFIG_DRM_EXYNOS_VIDI
+   vidi_driver,
+#endif
 #ifdef CONFIG_DRM_EXYNOS_FIMD
fimd_driver,
 #endif
@@ -562,30 +594,109 @@ static struct platform_driver *const 
exynos_drm_non_kms_drivers[] = {
 #ifdef CONFIG_DRM_EXYNOS_IPP
ipp_driver,
 #endif
+   exynos_drm_platform_driver,
 };
 
-static int exynos_drm_platform_probe(struct platform_device *pdev)
+
+static struct platform_driver *const exynos_drm_drv_with_simple_dev[] = {
+#ifdef CONFIG_DRM_EXYNOS_VIDI
+   vidi_driver,
+#endif
+#ifdef CONFIG_DRM_EXYNOS_IPP
+   ipp_driver,
+#endif
+   exynos_drm_platform_driver,
+};
+
+#define PDEV_COUNT ARRAY_SIZE(exynos_drm_drv_with_simple_dev)
+
+static struct platform_device *exynos_drm_pdevs[PDEV_COUNT];
+
+static void exynos_drm_unregister_devices(void)
 {
-   struct component_match *match;
+   int i = PDEV_COUNT;
 
-   pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
-   exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
+   while (--i = 0) {
+   platform_device_unregister(exynos_drm_pdevs[i]);
+   exynos_drm_pdevs[i] = NULL;
+   }
+}
 
-   match = exynos_drm_match_add(pdev-dev);
-   if (IS_ERR(match)) {
-   return PTR_ERR(match);
+static int exynos_drm_register_devices(void)
+{
+   int i;
+
+   for (i = 0; i  PDEV_COUNT; ++i) {
+   struct platform_driver *d = exynos_drm_drv_with_simple_dev[i];
+   struct platform_device *pdev =
+   platform_device_register_simple(d-driver.name,-1, NULL,
+   0);
+
+   if (!IS_ERR(pdev)) {
+   exynos_drm_pdevs[i] = pdev;
+   continue;
+   }
+   while (--i = 0) {
+   platform_device_unregister(exynos_drm_pdevs[i]);
+   exynos_drm_pdevs[i] = NULL;
+   }
+
+   return PTR_ERR(pdev);
}
 
-   return component_master_add_with_match(pdev-dev, exynos_drm_ops,
-  match);
+   return 0;
 }
 
-static int exynos_drm_platform_remove(struct platform_device *pdev)
+static void exynos_drm_unregister_drivers(struct platform_driver * const *drv,
+ int count)
 {
-   component_master_del(pdev-dev, exynos_drm_ops);
+   while (--count = 0)
+   platform_driver_unregister(drv[count]);
+}
+
+static int exynos_drm_register_drivers(struct platform_driver * const *drv,
+  int count)
+{
+   int i, ret;
+
+   for (i = 0; i  count; ++i) {
+   ret = platform_driver_register(drv[i]);
+   if (!ret)
+   continue;
+
+   while (--i = 0

Re: [PATCH 1/2] ARM: EXYNOS: Get current parent clock for power domain on/off

2015-04-03 Thread Andrzej Hajda
On 04/02/2015 02:44 PM, Krzysztof Kozlowski wrote:
 2015-04-02 14:29 GMT+02:00 Javier Martinez Canillas
 javier.marti...@collabora.co.uk:
 Hello Krzysztof,

 On 04/02/2015 10:06 AM, Krzysztof Kozlowski wrote:
 Using a fixed (by DTS) parent for clocks when turning on the power domain
 may introduce issues in other drivers. For example when such driver
 changes the parent during runtime and expects that he is the only place
 of such change.

 Do not rely entirely on DTS providing the fixed parent for such clocks.
 Instead if pclkN clock name is missing, grab a current parent of clock
 with clk_get_parent().

Hi Krzysztof,

I wonder if it wouldn't be better to drop entirely pclks. Power domains
should save/restore its previous state, setting fixed parents on domain
resume can fool drivers as you described earlier.

Regards
Andrzej


 Signed-off-by: Krzysztof Kozlowski k.kozlow...@samsung.com
 ---
  Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 8 +---
  arch/arm/mach-exynos/pm_domains.c | 9 ++---
  2 files changed, 11 insertions(+), 6 deletions(-)

 diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
 b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 index 5da38c5ed476..0fc1312f6fd5 100644
 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
 @@ -19,9 +19,11 @@ Optional Properties:
   domains.
  - clock-names: The following clocks can be specified:
   - oscclk: Oscillator clock.
 - - pclkN, clkN: Pairs of parent of input clock and input clock to the
 - devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
 - are supported currently.
 + - pclkN, clkN: Input clocks (clkN) to the devices in this power 
 domain.
 + Optionally with parrents (pclkN). If such parent is provided
 + it will be used for reparenting the given clock when domain
 + is turned on. Otherwise the parent before power down will be
 + used. Maximum of 4 pairs (N = 0 to 3) are supported currently.
   - asbN: Clocks required by asynchronous bridges (ASB) present in
   the power domain. These clock should be enabled during power
   domain on/off operations.
 diff --git a/arch/arm/mach-exynos/pm_domains.c 
 b/arch/arm/mach-exynos/pm_domains.c
 index cbe56b35aea0..c55bcf52a6ad 100644
 --- a/arch/arm/mach-exynos/pm_domains.c
 +++ b/arch/arm/mach-exynos/pm_domains.c
 @@ -37,6 +37,7 @@ struct exynos_pm_domain {
   struct clk *oscclk;
   struct clk *clk[MAX_CLK_PER_DOMAIN];
   struct clk *pclk[MAX_CLK_PER_DOMAIN];
 + unsigned int pclk_dynamic:MAX_CLK_PER_DOMAIN;
   struct clk *asb_clk[MAX_CLK_PER_DOMAIN];
  };

 @@ -62,6 +63,9 @@ static int exynos_pd_power(struct generic_pm_domain 
 *domain, bool power_on)
   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
   if (IS_ERR(pd-clk[i]))
   break;
 + /* If parent was not set in DT, save current parent */
 + if (pd-pclk_dynamic  (1  i))

 Small nit: I personally think that using the BIT(i) macro for shifting bits
 is more readable but I guess is a matter of personal taste.
 
 Right, it seems I always forget about BIT macro.
 I'll respin with BIT() and your review/tested tags.
 
 Thanks for feedback and testing!
 
 Best regards,
 Krzysztof
 

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[PATCH v2 RESEND 3/4] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain

2015-03-12 Thread Andrzej Hajda
FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER),
therefore their clocks should be enabled during power domain switch.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/boot/dts/exynos5420.dtsi | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index c0e98cf..55e3887 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -283,9 +283,11 @@
 clock CLK_MOUT_SW_ACLK300,
 clock CLK_MOUT_USER_ACLK300_DISP1,
 clock CLK_MOUT_SW_ACLK400,
-clock CLK_MOUT_USER_ACLK400_DISP1;
+clock CLK_MOUT_USER_ACLK400_DISP1,
+clock CLK_FIMD1, clock CLK_MIXER;
clock-names = oscclk, pclk0, clk0,
- pclk1, clk1, pclk2, clk2;
+ pclk1, clk1, pclk2, clk2,
+ asb0, asb1;
};
 
pinctrl_0: pinctrl@1340 {
-- 
1.9.1

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[PATCH v2 RESEND 4/4] ARM: dts: exynos5420: add async-bridge clocks to gsc power domain

2015-03-12 Thread Andrzej Hajda
Both GSCALER IPs in gsc power domain have async-bridges (to FIMD and MIXER),
therefore their clocks should be enabled during power domain switch.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
 arch/arm/boot/dts/exynos5420.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 55e3887..4eaeabe 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -251,6 +251,8 @@
compatible = samsung,exynos4210-pd;
reg = 0x10044000 0x20;
#power-domain-cells = 0;
+   clocks = clock CLK_GSCL0, clock CLK_GSCL1;
+   clock-names = asb0, asb1;
};
 
isp_pd: power-domain@10044020 {
-- 
1.9.1

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[PATCH v2 RESEND 1/4] arm/exynos: add asynchronous bridge clock bindings

2015-03-12 Thread Andrzej Hajda
The patch adds bindings for clocks required by async-bridges
present in the particular power domain.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
 Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 1e09703..5da38c5 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,9 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+   - asbN: Clocks required by asynchronous bridges (ASB) present in
+   the power domain. These clock should be enabled during power
+   domain on/off operations.
 - power-domains: phandle pointing to the parent power domain, for more details
 see Documentation/devicetree/bindings/power/power_domain.txt
 
-- 
1.9.1

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[PATCH v2 RESEND 2/4] arm/exynos/pm_domains: add support for async-bridge clocks

2015-03-12 Thread Andrzej Hajda
Since Exynos5420 there are async-bridges (ASB) between different IPs. These
bridges must be operational during power domain on/off, ie. clocks used
by these bridges should be enabled.
This patch enabled these clocks during domain on/off.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
Reviewed-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
 arch/arm/mach-exynos/pm_domains.c | 27 +++
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index 37266a8..507dad0 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -37,6 +37,7 @@ struct exynos_pm_domain {
struct clk *oscclk;
struct clk *clk[MAX_CLK_PER_DOMAIN];
struct clk *pclk[MAX_CLK_PER_DOMAIN];
+   struct clk *asb_clk[MAX_CLK_PER_DOMAIN];
 };
 
 static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
@@ -45,14 +46,19 @@ static int exynos_pd_power(struct generic_pm_domain 
*domain, bool power_on)
void __iomem *base;
u32 timeout, pwr;
char *op;
+   int i;
 
pd = container_of(domain, struct exynos_pm_domain, pd);
base = pd-base;
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   clk_prepare_enable(pd-asb_clk[i]);
+   }
+
/* Set oscclk before powering off a domain*/
if (!power_on) {
-   int i;
-
for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
if (IS_ERR(pd-clk[i]))
break;
@@ -81,8 +87,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, 
bool power_on)
 
/* Restore clocks after powering on a domain*/
if (power_on) {
-   int i;
-
for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
if (IS_ERR(pd-clk[i]))
break;
@@ -92,6 +96,12 @@ static int exynos_pd_power(struct generic_pm_domain *domain, 
bool power_on)
}
}
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   clk_disable_unprepare(pd-asb_clk[i]);
+   }
+
return 0;
 }
 
@@ -131,6 +141,15 @@ static __init int exynos4_pm_init_power_domain(void)
pd-pd.power_off = exynos_pd_power_off;
pd-pd.power_on = exynos_pd_power_on;
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   char clk_name[8];
+
+   snprintf(clk_name, sizeof(clk_name), asb%d, i);
+   pd-asb_clk[i] = clk_get(dev, clk_name);
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   }
+
pd-oscclk = clk_get(dev, oscclk);
if (IS_ERR(pd-oscclk))
goto no_clk;
-- 
1.9.1

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[PATCH v2 RESEND 0/4] Fix power domains handling on exynos542x

2015-03-12 Thread Andrzej Hajda
Hi Kukjin,

This is resend of my patchset with added (Reviewed|Tested)-by tags and removed 
RFC
prefix.

Exynos chipsets since 542x have asynchronous bridges connecting different IPs.
These bridges should be operational during power domain switching, ie associated
clocks cannot be gated.
This patchset adds binding to provide such clocks per power domain and adds code
which enables them during domain on/off operation.

This patchset fixes power domain issues with disp1 domain and HDMI (some of 
them)
on Odroid XU3:
- disp1 power domain can be turned off,
- no more imprecise external abort faults.

The patchset is based on samsung-fixes-dt tag from kgene/linux-samsung.

It was successfully tested on OdroidXU3.

Regards
Andrzej


Andrzej Hajda (4):
  arm/exynos: add asynchronous bridge clock bindings
  arm/exynos/pm_domains: add support for async-bridge clocks
  ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain
  ARM: dts: exynos5420: add async-bridge clocks to gsc power domain

 .../bindings/arm/exynos/power_domain.txt   |  3 +++
 arch/arm/boot/dts/exynos5420.dtsi  |  8 +--
 arch/arm/mach-exynos/pm_domains.c  | 27 ++
 3 files changed, 32 insertions(+), 6 deletions(-)

-- 
1.9.1

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Re: [PATCH 1/2] drm/exynos: hdmi: Add support for Exynos7 HDMI

2015-03-04 Thread Andrzej Hajda
On 03/04/2015 10:54 AM, Ajay kumar wrote:
 On Wed, Mar 4, 2015 at 2:30 PM, Andrzej Hajda a.ha...@samsung.com wrote:
 On 03/02/2015 09:40 AM, Ajay kumar wrote:
 Hi Andrej,

 On Fri, Feb 27, 2015 at 4:18 PM, Andrzej Hajda a.ha...@samsung.com wrote:
 Hi Ajay,

 Thanks for the patch.
 Thanks for reviewing the patch.

 On 02/26/2015 04:24 PM, Ajay Kumar wrote:
 Modify the exynos HDMI driver to support Exynos7 HDMI 1.4.
 * Add phy configs for Exynos7.
 * Exynos7 has a different clock structure for HDMI,
   so introduce the new clocks.
 * Add sysreg support to enable HDMI SYSREG on Exynos7.
 * Exynos7 based boards need a DCDC_EN and LS_EN pins
   for powering up HDMI. Add support for that too.

 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos_hdmi.txt  |   21 +-
  drivers/gpu/drm/exynos/exynos_hdmi.c   |  252 
 
  drivers/gpu/drm/exynos/regs-hdmi.h |4 +
  3 files changed, 231 insertions(+), 46 deletions(-)

 diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt 
 b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 index 1fd8cf9..bb22a60 100644
 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 @@ -6,6 +6,7 @@ Required properties:
   2) samsung,exynos4210-hdmi
   3) samsung,exynos4212-hdmi
   4) samsung,exynos5420-hdmi
 + 5) samsung,exynos7-hdmi
 Why not samsung,exynos7420-hdmi ?
 What compatible will you use for Exynos7430 or higher chip number?
 I will leave this decision to Inki Dae or Kukjin.

  - reg: physical base address of the hdmi and length of memory mapped
   region.
  - interrupts: interrupt number to the cpu.
 @@ -15,21 +16,33 @@ Required properties:
   c) optional flags and pull up/down.
  - clocks: list of clock IDs from SoC clock driver.
   a) hdmi: Gate of HDMI IP bus clock.
 - b) sclk_hdmi: Gate of HDMI special clock.
 - c) sclk_pixel: Pixel special clock, one of the two possible inputs 
 of
 + HDMI clocks necessary for non exynos7:
 +  b) sclk_hdmi: Gate of HDMI special clock.
 +  c) sclk_pixel: Pixel special clock, one of the two possible inputs 
 of
   HDMI clock mux.
 - d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs 
 of
 +  d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs 
 of
   HDMI clock mux.
 - e) mout_hdmi: It is required by the driver to switch between the 2
 +  e) mout_hdmi: It is required by the driver to switch between the 2
   parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is 
 stable
   after configuration, parent is set to sclk_hdmiphy else
   sclk_pixel.
 + HDMI clocks necessary for Exynos7:
 +  b) pclk_hdmiphy: Gate to HDMIPHY clock.
 According to specs there is also pclk_hdmi, why do you specify only this
 one?
 Right, I have reused hdmi gating clock for pclk_hdmi. That is why I have
 left hdmi clock as common for exynos7 and non-exynos7.
 IMO it would be better to use separate entry for pclk_hdmi.
 Ok.

 +  c) hdmi_pixel: Gate clock of MUX output for I_PIXEL_CLK.
 +  d) hdmi_tmds: Gate clock of MUX output for I_TMDS_CLK.
 According to specs these clocks should be named i_pixel_clk and
 i_tmds_clk, shouldn't they?
 I actually took these changes from an internal code(non-DRM).
 The original author used these names, and I just carried the same names. :)

  - clock-names: aliases as per driver requirements for above clock IDs:
   hdmi, sclk_hdmi, sclk_pixel, sclk_hdmiphy and mout_hdmi.
  - ddc: phandle to the hdmi ddc node
  - phy: phandle to the hdmi phy node
  - samsung,syscon-phandle: phandle for system controller node for PMU.

 +Only for Exynos7(when compatible = samsung,exynos7-hdmi):
 +- samsung,sysreg-phandle: phandle for system controller node for SYSREG 
 block.
 +
 +Optional properties:
 +- dcdc-gpios: OF device-tree gpio specification for HDMI_DCDC_EN pin.
 +- lsen-gpios: OF device-tree gpio specification for HDMI_LS_EN pin.
 What is purpose of these gpios?
 These 2 GPIOs need to be enabled to powerup HDMI on exynos7-espresso board.
 Other boards need not provide the GPIO.
 HDMI is internal IP of SoC, so it is rather not configurable via pins.
 Pin names suggests they are for DC-DC converter and level shifter, I guess
 these are for HDMI connector, not the HDMI IP, am I right?
 Right, this is for HDMI connector.

 Maybe better option is to use pinctrl for these gpios, or use gpio
 regulator, hard
 to guess without documentation.
 Why should I not use devm_gpiod_get_optional for these GPIOs?

Because these gpios are board specific so they should not be handled by
hdmi driver.

I still do not know what exactly are they for.
If they only drive power for pin18 of hdmi connector the best solution
is to create
gpio regulator and point to it hdmi-en-supply property in hdmi node

Re: [PATCH 1/2] drm/exynos: hdmi: Add support for Exynos7 HDMI

2015-03-04 Thread Andrzej Hajda
On 03/02/2015 09:40 AM, Ajay kumar wrote:
 Hi Andrej,

 On Fri, Feb 27, 2015 at 4:18 PM, Andrzej Hajda a.ha...@samsung.com wrote:
 Hi Ajay,

 Thanks for the patch.
 Thanks for reviewing the patch.

 On 02/26/2015 04:24 PM, Ajay Kumar wrote:
 Modify the exynos HDMI driver to support Exynos7 HDMI 1.4.
 * Add phy configs for Exynos7.
 * Exynos7 has a different clock structure for HDMI,
   so introduce the new clocks.
 * Add sysreg support to enable HDMI SYSREG on Exynos7.
 * Exynos7 based boards need a DCDC_EN and LS_EN pins
   for powering up HDMI. Add support for that too.

 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos_hdmi.txt  |   21 +-
  drivers/gpu/drm/exynos/exynos_hdmi.c   |  252 
 
  drivers/gpu/drm/exynos/regs-hdmi.h |4 +
  3 files changed, 231 insertions(+), 46 deletions(-)

 diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt 
 b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 index 1fd8cf9..bb22a60 100644
 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 @@ -6,6 +6,7 @@ Required properties:
   2) samsung,exynos4210-hdmi
   3) samsung,exynos4212-hdmi
   4) samsung,exynos5420-hdmi
 + 5) samsung,exynos7-hdmi
 Why not samsung,exynos7420-hdmi ?
 What compatible will you use for Exynos7430 or higher chip number?
 I will leave this decision to Inki Dae or Kukjin.

  - reg: physical base address of the hdmi and length of memory mapped
   region.
  - interrupts: interrupt number to the cpu.
 @@ -15,21 +16,33 @@ Required properties:
   c) optional flags and pull up/down.
  - clocks: list of clock IDs from SoC clock driver.
   a) hdmi: Gate of HDMI IP bus clock.
 - b) sclk_hdmi: Gate of HDMI special clock.
 - c) sclk_pixel: Pixel special clock, one of the two possible inputs of
 + HDMI clocks necessary for non exynos7:
 +  b) sclk_hdmi: Gate of HDMI special clock.
 +  c) sclk_pixel: Pixel special clock, one of the two possible inputs of
   HDMI clock mux.
 - d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
 +  d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
   HDMI clock mux.
 - e) mout_hdmi: It is required by the driver to switch between the 2
 +  e) mout_hdmi: It is required by the driver to switch between the 2
   parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
   after configuration, parent is set to sclk_hdmiphy else
   sclk_pixel.
 + HDMI clocks necessary for Exynos7:
 +  b) pclk_hdmiphy: Gate to HDMIPHY clock.
 According to specs there is also pclk_hdmi, why do you specify only this
 one?
 Right, I have reused hdmi gating clock for pclk_hdmi. That is why I have
 left hdmi clock as common for exynos7 and non-exynos7.

IMO it would be better to use separate entry for pclk_hdmi.

 +  c) hdmi_pixel: Gate clock of MUX output for I_PIXEL_CLK.
 +  d) hdmi_tmds: Gate clock of MUX output for I_TMDS_CLK.
 According to specs these clocks should be named i_pixel_clk and
 i_tmds_clk, shouldn't they?
 I actually took these changes from an internal code(non-DRM).
 The original author used these names, and I just carried the same names. :)

  - clock-names: aliases as per driver requirements for above clock IDs:
   hdmi, sclk_hdmi, sclk_pixel, sclk_hdmiphy and mout_hdmi.
  - ddc: phandle to the hdmi ddc node
  - phy: phandle to the hdmi phy node
  - samsung,syscon-phandle: phandle for system controller node for PMU.

 +Only for Exynos7(when compatible = samsung,exynos7-hdmi):
 +- samsung,sysreg-phandle: phandle for system controller node for SYSREG 
 block.
 +
 +Optional properties:
 +- dcdc-gpios: OF device-tree gpio specification for HDMI_DCDC_EN pin.
 +- lsen-gpios: OF device-tree gpio specification for HDMI_LS_EN pin.
 What is purpose of these gpios?
 These 2 GPIOs need to be enabled to powerup HDMI on exynos7-espresso board.
 Other boards need not provide the GPIO.

HDMI is internal IP of SoC, so it is rather not configurable via pins.
Pin names suggests they are for DC-DC converter and level shifter, I guess
these are for HDMI connector, not the HDMI IP, am I right?

Maybe better option is to use pinctrl for these gpios, or use gpio
regulator, hard
to guess without documentation.

Regards
Andrzej

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Re: [PATCH 2/2] drm/exynos: decon: Add support for DECON-EXT

2015-03-04 Thread Andrzej Hajda
On 03/02/2015 11:57 AM, Ajay kumar wrote:
 On Mon, Mar 2, 2015 at 1:38 PM, Andrzej Hajda a.ha...@samsung.com wrote:
 On 02/26/2015 04:24 PM, Ajay Kumar wrote:
 * Modify DECON-INT driver to support DECON-EXT.
 * Add a table of porch values needed to set timing registers of DECON-EXT.
 * DECON-EXT supports only H/w Triggered COMMAND mode.
 * DECON-EXT supports only one DMA window(window 1), so modify
   all window management routines to support 2 windows of DECON-INT
   and 1 window of DECON-EXT.

 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos7-decon.txt|8 +-
  drivers/gpu/drm/exynos/exynos7_drm_decon.c |  229 
 ++--
  include/video/exynos7_decon.h  |   13 ++
  3 files changed, 230 insertions(+), 20 deletions(-)

 diff --git a/Documentation/devicetree/bindings/video/exynos7-decon.txt 
 b/Documentation/devicetree/bindings/video/exynos7-decon.txt
 index f5f9c8d..87350c0 100644
 --- a/Documentation/devicetree/bindings/video/exynos7-decon.txt
 +++ b/Documentation/devicetree/bindings/video/exynos7-decon.txt
 @@ -2,10 +2,14 @@ Device-Tree bindings for Samsung Exynos7 SoC display 
 controller (DECON)

  DECON (Display and Enhancement Controller) is the Display Controller for 
 the
  Exynos7 series of SoCs which transfers the image data from a video memory
 -buffer to an external LCD interface.
 +buffer to an external LCD/HDMI interface.
 +
 +Exynos7 supports DECON-INT for generating video signals for LCD.
 +Exynos7 supports DECON-EXT for generating video signals for HDMI.

  Required properties:
 -- compatible: value should be samsung,exynos7-decon;
 +- compatible: value should be samsung,exynos7-decon-int for DECON-INT;
 +   value should be samsung,exynos7-decon-ext for DECON-EXT;

  - reg: physical base address and length of the DECON registers set.

 diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
 b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 index 63f02e2..9e2d083 100644
 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 @@ -41,6 +41,28 @@

  #define WINDOWS_NR   2
 Maybe it would be better to rename it to MAX_WINDOWS_NR
 Ok.
 +#define DECON_EXT_CH_MAPPING 0x432105
 I am not familiar with decon, could you explain what exactly
 this mapping means and why is it fixed in the driver to this value,
 not default one. By the way my specs says bits 0-3 are reserverd
 and here it seems you are using them.
 I reused the value from the code which hardware team shared with me.
 It tries to map a input hardware channel(IDMA or VPP channel) onto
 a hardware window in DECON.
 Channel_N is mapped onto window_N in case of DECON-INT.
 In case of DECON-EXT, Channel 0 should be mapped to window 1 of DECON-EXT.
 So, basically for the changes I have made, I should ideally set only
 bits [4:6] to 0x1,
 and leave other bits untouched, though modifying other bits wouldn't
 affect in anyway.
 +
 +enum decon_type {
 + DECON_INT,
 + DECON_EXT,
 +} decon_type;
 +
 +struct decon_driver_data {
 + enum decon_type decon_type;
 + unsigned intnr_windows;
 +};
 +
 +static struct decon_driver_data exynos7_decon_int_driver_data = {
 + .decon_type = DECON_INT,
 I wonder if it wouldn't be better to use different fields to describe
 each capability/property instead of decon_type. For example
 .display_type = EXYNOS_DISPLAY_TYPE_LCD,
 .map_channels = 0,
 Ok, let me list down the differences between INT and EXT.
 1) Only h/w triggered command mode for DECON-EXT.
 2) Need to feed modified porch values(decon_ext_timings)
 3) Input channel to H/w window mapping(WINCHMAP)
 4) default_window - 0 for DECON-INT and 1 for DECON-EXT

 Out of the above differences, the first 3 can somehow be converted
 to capability/property and embedded into driver_data.
 But the 4th difference is bothering me.
 I tried using something like start_window, end_window and tried to make
 The code common for DECON-INT and DECON-EXT, and it just doesn't work.
 ex:
 start_window = 0, end_window = 1 for DECON-INT
 start_window = 1, end_window = 1 for DECON-EXT

 When win_commit gets called for window 0 from crtc_commit/plane_commit:
 Configure start_window(0  for DECON-INT and 1 for DECON-EXT)

 When win_commit is called from decon_apply, it is called for window 1 also.
 That time win_commit can skip updating actual window 1.
 How do I take care of this ambiguity? This case happens with
 win_disable routine also!

I think clear distinction where are we using hw windows and where sw
windows should be enough.
For example the loop iterating over all windows can look like:

for (win = 0; win  drv_data-nr_windows; win++) {
int hw_win = get_hw_win(ctx, win);

val = readl(ctx-regs + WINCON(hw_win));
}

Where get_hw_win can look like:

static inline int get_hw_win(ctx, win)
{
return ctx-driver_data

Re: [PATCH 2/2] drm/exynos: decon: Add support for DECON-EXT

2015-03-02 Thread Andrzej Hajda
On 02/26/2015 04:24 PM, Ajay Kumar wrote:
 * Modify DECON-INT driver to support DECON-EXT.
 * Add a table of porch values needed to set timing registers of DECON-EXT.
 * DECON-EXT supports only H/w Triggered COMMAND mode.
 * DECON-EXT supports only one DMA window(window 1), so modify
   all window management routines to support 2 windows of DECON-INT
   and 1 window of DECON-EXT.
 
 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos7-decon.txt|8 +-
  drivers/gpu/drm/exynos/exynos7_drm_decon.c |  229 
 ++--
  include/video/exynos7_decon.h  |   13 ++
  3 files changed, 230 insertions(+), 20 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/video/exynos7-decon.txt 
 b/Documentation/devicetree/bindings/video/exynos7-decon.txt
 index f5f9c8d..87350c0 100644
 --- a/Documentation/devicetree/bindings/video/exynos7-decon.txt
 +++ b/Documentation/devicetree/bindings/video/exynos7-decon.txt
 @@ -2,10 +2,14 @@ Device-Tree bindings for Samsung Exynos7 SoC display 
 controller (DECON)
  
  DECON (Display and Enhancement Controller) is the Display Controller for the
  Exynos7 series of SoCs which transfers the image data from a video memory
 -buffer to an external LCD interface.
 +buffer to an external LCD/HDMI interface.
 +
 +Exynos7 supports DECON-INT for generating video signals for LCD.
 +Exynos7 supports DECON-EXT for generating video signals for HDMI.
  
  Required properties:
 -- compatible: value should be samsung,exynos7-decon;
 +- compatible: value should be samsung,exynos7-decon-int for DECON-INT;
 +   value should be samsung,exynos7-decon-ext for DECON-EXT;
  
  - reg: physical base address and length of the DECON registers set.
  
 diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c 
 b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 index 63f02e2..9e2d083 100644
 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
 @@ -41,6 +41,28 @@
  
  #define WINDOWS_NR   2

Maybe it would be better to rename it to MAX_WINDOWS_NR

  
 +#define DECON_EXT_CH_MAPPING 0x432105

I am not familiar with decon, could you explain what exactly
this mapping means and why is it fixed in the driver to this value,
not default one. By the way my specs says bits 0-3 are reserverd
and here it seems you are using them.


 +
 +enum decon_type {
 + DECON_INT,
 + DECON_EXT,
 +} decon_type;
 +
 +struct decon_driver_data {
 + enum decon_type decon_type;
 + unsigned intnr_windows;
 +};
 +
 +static struct decon_driver_data exynos7_decon_int_driver_data = {
 + .decon_type = DECON_INT,

I wonder if it wouldn't be better to use different fields to describe
each capability/property instead of decon_type. For example
.display_type = EXYNOS_DISPLAY_TYPE_LCD,
.map_channels = 0,

This way the code will be cleaner (less ifs).


 + .nr_windows = 2,
 +};
 +
 +static struct decon_driver_data exynos7_decon_ext_driver_data = {
 + .decon_type = DECON_EXT,
 + .nr_windows = 1,
 +};
 +
  struct decon_win_data {
   unsigned intovl_x;
   unsigned intovl_y;
 @@ -76,15 +98,28 @@ struct decon_context {
   atomic_twait_vsync_event;
  
   struct exynos_drm_panel_info panel;
 + struct decon_driver_data *driver_data;
   struct exynos_drm_display *display;
  };
  
  static const struct of_device_id decon_driver_dt_match[] = {
 - {.compatible = samsung,exynos7-decon},
 + { .compatible = samsung,exynos7-decon-int,
 +   .data = exynos7_decon_int_driver_data },
 + { .compatible = samsung,exynos7-decon-ext,
 +   .data = exynos7_decon_ext_driver_data },
   {},
  };
  MODULE_DEVICE_TABLE(of, decon_driver_dt_match);
  
 +static inline struct decon_driver_data *drm_decon_get_driver_data(
 + struct platform_device *pdev)
 +{
 + const struct of_device_id *of_id =
 + of_match_device(decon_driver_dt_match, pdev-dev);
 +
 + return (struct decon_driver_data *)of_id-data;
 +}
 +
  static void decon_wait_for_vblank(struct exynos_drm_crtc *crtc)
  {
   struct decon_context *ctx = crtc-ctx;
 @@ -106,13 +141,20 @@ static void decon_wait_for_vblank(struct 
 exynos_drm_crtc *crtc)
  
  static void decon_clear_channel(struct decon_context *ctx)
  {
 + struct decon_driver_data *drv_data = ctx-driver_data;
   int win, ch_enabled = 0;
  
   DRM_DEBUG_KMS(%s\n, __FILE__);
  
   /* Check if any channel is enabled. */
 - for (win = 0; win  WINDOWS_NR; win++) {
 - u32 val = readl(ctx-regs + WINCON(win));
 + for (win = 0; win  drv_data-nr_windows; win++) {
 + u32 val;
 + /* DECON EXT sw-hw window mapping */
 + if (drv_data-decon_type == DECON_EXT) {
 + if (win == 0)
 + win = 1;

Changing value of for iterator 

Re: [PATCH 1/2] drm/exynos: hdmi: Add support for Exynos7 HDMI

2015-02-27 Thread Andrzej Hajda
Hi Ajay,

Thanks for the patch.

On 02/26/2015 04:24 PM, Ajay Kumar wrote:
 Modify the exynos HDMI driver to support Exynos7 HDMI 1.4.
 * Add phy configs for Exynos7.
 * Exynos7 has a different clock structure for HDMI,
   so introduce the new clocks.
 * Add sysreg support to enable HDMI SYSREG on Exynos7.
 * Exynos7 based boards need a DCDC_EN and LS_EN pins
   for powering up HDMI. Add support for that too.
 
 Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
 ---
  .../devicetree/bindings/video/exynos_hdmi.txt  |   21 +-
  drivers/gpu/drm/exynos/exynos_hdmi.c   |  252 
 
  drivers/gpu/drm/exynos/regs-hdmi.h |4 +
  3 files changed, 231 insertions(+), 46 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt 
 b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 index 1fd8cf9..bb22a60 100644
 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
 @@ -6,6 +6,7 @@ Required properties:
   2) samsung,exynos4210-hdmi
   3) samsung,exynos4212-hdmi
   4) samsung,exynos5420-hdmi
 + 5) samsung,exynos7-hdmi

Why not samsung,exynos7420-hdmi ?
What compatible will you use for Exynos7430 or higher chip number?

  - reg: physical base address of the hdmi and length of memory mapped
   region.
  - interrupts: interrupt number to the cpu.
 @@ -15,21 +16,33 @@ Required properties:
   c) optional flags and pull up/down.
  - clocks: list of clock IDs from SoC clock driver.
   a) hdmi: Gate of HDMI IP bus clock.
 - b) sclk_hdmi: Gate of HDMI special clock.
 - c) sclk_pixel: Pixel special clock, one of the two possible inputs of
 + HDMI clocks necessary for non exynos7:
 +  b) sclk_hdmi: Gate of HDMI special clock.
 +  c) sclk_pixel: Pixel special clock, one of the two possible inputs of
   HDMI clock mux.
 - d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
 +  d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of
   HDMI clock mux.
 - e) mout_hdmi: It is required by the driver to switch between the 2
 +  e) mout_hdmi: It is required by the driver to switch between the 2
   parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
   after configuration, parent is set to sclk_hdmiphy else
   sclk_pixel.
 + HDMI clocks necessary for Exynos7:
 +  b) pclk_hdmiphy: Gate to HDMIPHY clock.

According to specs there is also pclk_hdmi, why do you specify only this
one?

 +  c) hdmi_pixel: Gate clock of MUX output for I_PIXEL_CLK.
 +  d) hdmi_tmds: Gate clock of MUX output for I_TMDS_CLK.

According to specs these clocks should be named i_pixel_clk and
i_tmds_clk, shouldn't they?

  - clock-names: aliases as per driver requirements for above clock IDs:
   hdmi, sclk_hdmi, sclk_pixel, sclk_hdmiphy and mout_hdmi.
  - ddc: phandle to the hdmi ddc node
  - phy: phandle to the hdmi phy node
  - samsung,syscon-phandle: phandle for system controller node for PMU.
  
 +Only for Exynos7(when compatible = samsung,exynos7-hdmi):
 +- samsung,sysreg-phandle: phandle for system controller node for SYSREG 
 block.
 +
 +Optional properties:
 +- dcdc-gpios: OF device-tree gpio specification for HDMI_DCDC_EN pin.
 +- lsen-gpios: OF device-tree gpio specification for HDMI_LS_EN pin.

What is purpose of these gpios?

 +
  Example:
  
   hdmi {
 diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c 
 b/drivers/gpu/drm/exynos/exynos_hdmi.c
 index 229b361..1b579ea 100644
 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
 +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
 @@ -67,6 +67,7 @@
  enum hdmi_type {
   HDMI_TYPE13,
   HDMI_TYPE14,
 + HDMI_TYPE14_7,
  };
  
  struct hdmi_driver_data {
 @@ -82,6 +83,9 @@ struct hdmi_resources {
   struct clk  *sclk_pixel;
   struct clk  *sclk_hdmiphy;
   struct clk  *mout_hdmi;
 + struct clk  *hdmi_pixel;
 + struct clk  *pclk_hdmiphy;
 + struct clk  *hdmi_tmds;
   struct regulator_bulk_data  *regul_bulk;
   struct regulator*reg_hdmi_en;
   int regul_count;
 @@ -210,6 +214,7 @@ struct hdmi_context {
   unsigned intphy_conf_count;
  
   struct regmap   *pmureg;
 + struct regmap   *sysreg;
   enum hdmi_type  type;
  };
  
 @@ -584,6 +589,61 @@ static const struct hdmiphy_config 
 hdmiphy_5420_configs[] = {
   },
  };
  
 +static const struct hdmiphy_config hdmiphy_7_configs[] = {
 + {
 + .pixel_clock = 2700,
 + .conf = {
 + 0x01, 0xD2, 0x87, 0xB0, 0x01, 0x00, 0x88, 0x02,
 + 0x4F, 0x30, 0x33, 0x65, 0x00, 0xE4, 0x24, 0x80,

[PATCH RESEND] ARM: dts: exynos5422-odroidxu3: add mmc detect gpio

2015-02-12 Thread Andrzej Hajda
The patch adds gpio for detecting presence of MMC card.
It fixes issue with kernel hang due when MMC card is missing.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
Hi,

This is just resend of the patch with added mmc ML and dw-mmc maintainers.

Javier, I have no access to peach-pi(t) schematics, so I do not know if they
have mmc-cd line connected to gpc0-2 gpio, but I guess it could be the case.
You could check if similar patches will fix the issue for them.

Regards
Andrzej

 arch/arm/boot/dts/exynos5422-odroidxu3.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts 
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 47ec9bf..a563811 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -11,6 +11,7 @@
 */
 
 /dts-v1/;
+#include dt-bindings/gpio/gpio.h
 #include exynos5800.dtsi
 
 / {
@@ -355,13 +356,13 @@
 
 mmc_0 {
status = okay;
-   broken-cd;
+   cd-gpios = gpc0 2 GPIO_ACTIVE_LOW;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 0 4;
samsung,dw-mshc-ddr-timing = 0 2;
pinctrl-names = default;
-   pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8;
+   pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8 sd0_cd;
bus-width = 8;
cap-mmc-highspeed;
 };
-- 
1.9.1

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[PATCH] ARM: dts: exynos5422-odroidxu3: add mmc detect gpio

2015-02-10 Thread Andrzej Hajda
The patch adds gpio for detecting presence of MMC card.
It fixes issue with kernel hang due when MMC card is missing.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 arch/arm/boot/dts/exynos5422-odroidxu3.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts 
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 47ec9bf..a563811 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -11,6 +11,7 @@
 */
 
 /dts-v1/;
+#include dt-bindings/gpio/gpio.h
 #include exynos5800.dtsi
 
 / {
@@ -355,13 +356,13 @@
 
 mmc_0 {
status = okay;
-   broken-cd;
+   cd-gpios = gpc0 2 GPIO_ACTIVE_LOW;
card-detect-delay = 200;
samsung,dw-mshc-ciu-div = 3;
samsung,dw-mshc-sdr-timing = 0 4;
samsung,dw-mshc-ddr-timing = 0 2;
pinctrl-names = default;
-   pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8;
+   pinctrl-0 = sd0_clk sd0_cmd sd0_bus4 sd0_bus8 sd0_cd;
bus-width = 8;
cap-mmc-highspeed;
 };
-- 
1.9.1

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[RFC PATCH v2 3/3] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain

2015-02-06 Thread Andrzej Hajda
FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER),
therefore their clocks should be enabled during power domain switch.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
Hi,

This is 2nd version of the patch. After decrypting manual and discussion
with Marek I guess this set of clocks is more apropriate - async-bridges
are present in MIXER and FIMD, so their clocks should be enabled.

The 1st version worked for me due to fact I have forgot to remove
clk_ignore_unused kernel boot option during tests ;)

Regards
Andrzej
---
 arch/arm/boot/dts/exynos5420.dtsi | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index e1fa800..58579f5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -293,9 +293,11 @@
 clock CLK_MOUT_SW_ACLK300,
 clock CLK_MOUT_USER_ACLK300_DISP1,
 clock CLK_MOUT_SW_ACLK400,
-clock CLK_MOUT_USER_ACLK400_DISP1;
+clock CLK_MOUT_USER_ACLK400_DISP1,
+clock CLK_FIMD1, clock CLK_MIXER;
clock-names = oscclk, pclk0, clk0,
- pclk1, clk1, pclk2, clk2;
+ pclk1, clk1, pclk2, clk2,
+ asb0, asb1;
};
 
pinctrl_0: pinctrl@1340 {
-- 
1.9.1

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[RFC PATCH 2/3] arm/exynos/pm_domains: add support for async-bridge clocks

2015-02-05 Thread Andrzej Hajda
Since Exynos5420 there are async-bridges (ASB) between different IPs. These
bridges must be operational during power domain on/off, ie. clocks used
by these bridges should be enabled.
This patch enabled these clocks during domain on/off.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 arch/arm/mach-exynos/pm_domains.c | 27 +++
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos/pm_domains.c 
b/arch/arm/mach-exynos/pm_domains.c
index 0e2bc36..ecff522 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -37,6 +37,7 @@ struct exynos_pm_domain {
struct clk *oscclk;
struct clk *clk[MAX_CLK_PER_DOMAIN];
struct clk *pclk[MAX_CLK_PER_DOMAIN];
+   struct clk *asb_clk[MAX_CLK_PER_DOMAIN];
 };
 
 static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
@@ -45,14 +46,19 @@ static int exynos_pd_power(struct generic_pm_domain 
*domain, bool power_on)
void __iomem *base;
u32 timeout, pwr;
char *op;
+   int i;
 
pd = container_of(domain, struct exynos_pm_domain, pd);
base = pd-base;
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   clk_prepare_enable(pd-asb_clk[i]);
+   }
+
/* Set oscclk before powering off a domain*/
if (!power_on) {
-   int i;
-
for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
if (IS_ERR(pd-clk[i]))
break;
@@ -81,8 +87,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, 
bool power_on)
 
/* Restore clocks after powering on a domain*/
if (power_on) {
-   int i;
-
for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
if (IS_ERR(pd-clk[i]))
break;
@@ -92,6 +96,12 @@ static int exynos_pd_power(struct generic_pm_domain *domain, 
bool power_on)
}
}
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   clk_disable_unprepare(pd-asb_clk[i]);
+   }
+
return 0;
 }
 
@@ -137,6 +147,15 @@ static __init int exynos4_pm_init_power_domain(void)
pd-pd.power_off = exynos_pd_power_off;
pd-pd.power_on = exynos_pd_power_on;
 
+   for (i = 0; i  MAX_CLK_PER_DOMAIN; i++) {
+   char clk_name[8];
+
+   snprintf(clk_name, sizeof(clk_name), asb%d, i);
+   pd-asb_clk[i] = clk_get(dev, clk_name);
+   if (IS_ERR(pd-asb_clk[i]))
+   break;
+   }
+
pd-oscclk = clk_get(dev, oscclk);
if (IS_ERR(pd-oscclk))
goto no_clk;
-- 
1.9.1

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[RFC PATCH 1/3] arm/exynos: add asynchronous bridge clock bindings

2015-02-05 Thread Andrzej Hajda
The patch adds bindings for clocks required by async-bridges
present in the particular power domain.

Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
 Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index 1e09703..5da38c5 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,9 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
+   - asbN: Clocks required by asynchronous bridges (ASB) present in
+   the power domain. These clock should be enabled during power
+   domain on/off operations.
 - power-domains: phandle pointing to the parent power domain, for more details
 see Documentation/devicetree/bindings/power/power_domain.txt
 
-- 
1.9.1

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