On Thu, Feb 12, 2015 at 03:55:51PM +0900, Chanwoo Choi wrote:
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 15e8e74..4fc08d1 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -153,6 +153,19 @@ config ARCH_EXYNOS
help
This enables support for Samsung
On Tue, Sep 30, 2014 at 04:15:21PM +0100, Abhilash Kesavan wrote:
On Tue, Sep 23, 2014 at 2:18 PM, Abhilash Kesavan
kesavan.abhil...@gmail.com wrote:
This patchset supports the new Exynos7 Samsung SoC based on Cortex-A57.
Exynos7 is a System-On-Chip (SoC) that is based on 64-bit ARMv8 RISC
Krishna Chatradhi ch.nav...@samsung.com
Cc: Rob Herring r...@kernel.org
Cc: Catalin Marinas catalin.mari...@arm.com
---
arch/arm64/Kconfig | 12
Please update the defconfig as well as we want the default image build
to contain all the available platforms.
--
Catalin
On Wed, Aug 27, 2014 at 12:09:28PM +0100, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 10:44:20AM +0100, Naveen Krishna Chatradhi wrote:
+ select HAVE_SMP
I may have missed something, but I didn't see any SMP support in this
series.
We don't even have HAVE_SMP defined for arm64 (just SMP,
On Wed, Aug 27, 2014 at 11:42:31AM +0100, Mark Rutland wrote:
On Wed, Aug 27, 2014 at 10:44:18AM +0100, Naveen Krishna Chatradhi wrote:
+ cpus {
+ #address-cells = 2;
+ #size-cells = 0;
+
+ cpu@0 {
+ device_type =
On 15 Jul 2014, at 15:53, Jungseok Lee jungseokle...@gmail.com wrote:
On Jul 15, 2014, at 7:41 AM, Catalin Marinas wrote:
On Mon, Jul 14, 2014 at 09:38:59PM +0100, Joel Schopp wrote:
I agree that these patches would be very useful. I just rebased my fix
for a VTTBR_BADDR_MASK bug on one
On Mon, Jul 14, 2014 at 09:38:59PM +0100, Joel Schopp wrote:
I agree that these patches would be very useful. I just rebased my fix
for a VTTBR_BADDR_MASK bug on one of these patches that could be pulled
out independently. See
Hi Nico,
Sorry, I can't stay away from this thread ;)
On Tue, Jun 10, 2014 at 12:25:47AM -0400, Nicolas Pitre wrote:
On Mon, 9 Jun 2014, Lorenzo Pieralisi wrote:
4) When I am talking about firmware I am talking about sequences that
are very close to HW (disabling C bit, cleaning caches,
On Wed, Apr 30, 2014 at 07:41:40AM +0100, Jungseok Lee wrote:
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -8,10 +8,11
Jungseok,
On Tue, Apr 29, 2014 at 05:59:20AM +0100, Jungseok Lee wrote:
+choice
+ prompt Level of translation tables
+ default ARM64_3_LEVELS if ARM64_4K_PAGES
+ default ARM64_2_LEVELS if ARM64_64K_PAGES
+ help
+ Allows level of translation tables.
+
+config
On Tue, Apr 29, 2014 at 05:59:23AM +0100, Jungseok Lee wrote:
+config ARM64_VA_BITS
+ int Virtual address space size
+ range 39 39 if ARM64_4K_PAGES ARM64_3_LEVELS
+ range 42 42 if ARM64_64K_PAGES ARM64_2_LEVELS
+ help
+ This feature is determined by a combination of
On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -8,10 +8,11 @@ This document describes the virtual memory layout used by
the AArch64
Linux kernel. The architecture allows up to 4 levels of translation
On Tue, Apr 29, 2014 at 05:59:33AM +0100, Jungseok Lee wrote:
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 0fd5650..03ec424 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -37,8 +37,9 @@
/*
* swapper_pg_dir is the virtual address of the
On Mon, Apr 28, 2014 at 01:26:46PM +0100, Lee Jones wrote:
This patch moves Exynos PMU driver implementation from
arm/mach-exynos to drivers/mfd.
This driver is mainly used for setting misc bits of register from PMU IP
of Exynos SoC which will be required to configure before
On Mon, Mar 10, 2014 at 10:51:17PM +, Kukjin Kim wrote:
Signed-off-by: Kukjin Kim kgene@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Cc: Catalin Marinas catalin.mari...@arm.com
This patch should go to the devicetree list as well to get some
reviews/acks from the DT
On Mon, Mar 10, 2014 at 10:51:18PM +, Kukjin Kim wrote:
This patch adds support for Samsung GH7 SoC in arm64/Kconfig and
enable Samsung GH7 based SSDK_GH7 in single defconfig for arm64.
Signed-off-by: Kukjin Kim kgene@samsung.com
Cc: Catalin Marinas catalin.mari...@arm.com
On Mon, Mar 10, 2014 at 10:51:19PM +, Kukjin Kim wrote:
Signed-off-by: Kukjin Kim kgene@samsung.com
Reviewed-by: Thomas Abraham thomas...@samsung.com
Cc: Catalin Marinas catalin.mari...@arm.com
Same here, please cc the devicetree list.
--
Catalin
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On Thu, Feb 20, 2014 at 09:03:30AM +, Olof Johansson wrote:
So, after giving this some more thought (and getting my hands dirty in
some of this code), I think I'm going to change my mind on this. For
mobile platforms I think it might make sense to bring over the
toplevel platform Kconfig
On Thu, Feb 20, 2014 at 05:09:59PM +, Olof Johansson wrote:
On Thu, Feb 20, 2014 at 3:22 AM, Catalin Marinas
Two additional points:
1. Single arm64 defconfig file covering everything
2. Modules rather than built-in by default where possible (especially
for server platforms
On Tue, Feb 18, 2014 at 01:10:30AM +, Kukjin Kim wrote:
As I commented above, how about MCT? Samsung has a plan to use MCT on
ARMv8, it is not for used for GH7 though...
Any reason for not using the generic timer?
--
Catalin
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On Tue, Feb 11, 2014 at 11:39:27PM +, Olof Johansson wrote:
On Mon, Feb 10, 2014 at 10:29 PM, Kukjin Kim kgene@samsung.com wrote:
This patch adds support for Samsung GH7 SoC in arm64/Kconfig.
Signed-off-by: Kukjin Kim kgene@samsung.com
Cc: Catalin Marinas catalin.mari
On 12 Feb 2014, at 16:25, Kumar Gala ga...@codeaurora.org wrote:
On Feb 12, 2014, at 4:38 AM, Catalin Marinas catalin.mari...@arm.com wrote:
On Tue, Feb 11, 2014 at 11:39:27PM +, Olof Johansson wrote:
On Mon, Feb 10, 2014 at 10:29 PM, Kukjin Kim kgene@samsung.com wrote:
This patch
On Mon, Nov 18, 2013 at 07:04:50PM +, Christopher Covington wrote:
On 11/18/2013 12:30 PM, Catalin Marinas wrote:
[...]
You can't run legacy AArch32 code at EL3 and have lower levels in AArch64
mode (architectural constraint).
What prevents AArch32 code from running at EL3
On Mon, Nov 18, 2013 at 05:52:36PM +, Stephen Warren wrote:
On 11/18/2013 10:30 AM, Catalin Marinas wrote:
On Mon, Nov 18, 2013 at 05:03:37PM +, Stephen Warren wrote:
On 11/18/2013 04:58 AM, Catalin Marinas wrote:
...
Of course, trusted foundations interface could be plugged
On Tue, Nov 19, 2013 at 02:46:55AM +, Alex Courbot wrote:
On 11/18/2013 08:58 PM, Catalin Marinas wrote:
On Mon, Nov 18, 2013 at 03:05:59AM +, Alex Courbot wrote:
On 11/18/2013 12:59 AM, Catalin Marinas wrote:
On 17 November 2013 08:49, Alexandre Courbot acour...@nvidia.com wrote
On Tue, Nov 19, 2013 at 02:29:39PM +, Alexandre Courbot wrote:
On Tue, Nov 19, 2013 at 9:26 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Tue, Nov 19, 2013 at 02:46:55AM +, Alex Courbot wrote:
2) devices have already shipped with this firmware. Are we going to just
renounce
On Mon, Nov 18, 2013 at 03:05:59AM +, Alex Courbot wrote:
On 11/18/2013 12:59 AM, Catalin Marinas wrote:
On 17 November 2013 08:49, Alexandre Courbot acour...@nvidia.com wrote:
The ARM tree includes a firmware_ops interface that is designed to
implement support for simple, TrustZone
On Mon, Nov 18, 2013 at 05:03:37PM +, Stephen Warren wrote:
On 11/18/2013 04:58 AM, Catalin Marinas wrote:
...
Of course, trusted foundations interface could be plugged into cpu_ops
on arm64 but I will NAK it on the grounds of not using the PSCI API, nor
the SMC calling convention
On Mon, Nov 18, 2013 at 05:00:32PM +, Stephen Warren wrote:
On 11/17/2013 08:59 AM, Catalin Marinas wrote:
On 17 November 2013 08:49, Alexandre Courbot acour...@nvidia.com wrote:
The ARM tree includes a firmware_ops interface that is designed to
implement support for simple, TrustZone
On 17 November 2013 08:49, Alexandre Courbot acour...@nvidia.com wrote:
The ARM tree includes a firmware_ops interface that is designed to
implement support for simple, TrustZone-based firmwares but could
also cover other use-cases. It has been suggested that this
interface might be useful to
: Simon Horman ho...@verge.net.au
Cc: Magnus Damm magnus.d...@gmail.com
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Cc: John Stultz john.stu...@linaro.org
Cc: Thomas Gleixner t...@linutronix.de
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-o
On Mon, Mar 25, 2013 at 09:28:10PM +, Rob Herring wrote:
On 03/25/2013 12:26 PM, Russell King - ARM Linux wrote:
On Thu, Mar 21, 2013 at 11:06:47AM +, Mark Rutland wrote:
On TC2 this series leads to using the vexpress 24MHz clock as the sched
clock
in preference to the
On 6 November 2012 11:24, Kukjin Kim kgene@samsung.com wrote:
BTW, if mach-exynos includes ARMv8 later?...ARMv8 platform codes will be put
in the arch/arm/ or arch/arm/64/ if some platform codes share with ARMv7?
Just wondering...
If mach-exynos would support ARMv8 at some point, I would
On Mon, Aug 13, 2012 at 08:21:14AM +0100, shiraz hashim wrote:
On Wed, Nov 17, 2010 at 2:37 PM, Catalin Marinas
catalin.mari...@arm.com wrote:
On Wed, 2010-11-17 at 06:55 +, Kukjin Kim wrote:
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -168,7 +168,7
On 18 December 2010 11:04, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
There is a subtle race in the CPU hotplug code, where a CPU which has
been offlined can online itself before being requested, which results
in things going astray on the next online/offline cycle.
[...]
---
On Mon, 2010-12-20 at 16:50 +, Russell King - ARM Linux wrote:
On Mon, Dec 20, 2010 at 04:39:07PM +, Catalin Marinas wrote:
On 18 December 2010 11:04, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
There is a subtle race in the CPU hotplug code, where a CPU which has
.
Get rid of this argument, and rename to gic_secondary_init().
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
Reviewed-by: Catalin Marinas catalin.mari...@arm.com
(minor issue, maybe a comment for gic_secondary_init just in case
anyone things about primary and secondary GICs
On Thu, 2010-10-21 at 07:44 +0100, Kukjin Kim wrote:
From: Kyungmin Park kyungmin.p...@samsung.com
This patch adds L2X0 Prefetch and Power control register.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Catalin Marinas catalin.mari...@arm.com
Signed-off-by: Kukjin Kim kgene
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