Re: [PATCH] ARM: S3C24XX: Fix configuration of gpio port sizes on S3C24XX.

2013-12-13 Thread José Miguel Gonçalves

Hi Heiko,

On 13-12-2013 08:42, Heiko Stübner wrote:


But Jose, you should really really look into moving to devicetree with your
platform, if you're not already doing so. Pinctrl support is already present,
and I'm hopefull the move to the common clock framework I posted a few days
ago might make it too.



I'm currently maintaining a deployed equipment whose development started 
some time ago, so I still need to use a 3.9 kernel with the traditional 
hardware initialization. But, of course, for any new developments based 
on the same S3C24XX platform, I will look in migrating to the device tree.


Best regards,
José Gonçalves
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Re: [PATCH] ARM: S3C24XX: Fix configuration of gpio port sizes on S3C24XX.

2013-12-12 Thread José Miguel Gonçalves

On 27-09-2013 15:17, Linus Walleij wrote:

On Wed, Sep 11, 2013 at 10:46 AM, José Miguel Gonçalves
 wrote:


Some GPIO line limits are incorrectly set which, for instance,
does not allow nRTS1 (GPH11) configuration on a S3C2416 chip.

Signed-off-by: José Miguel Gonçalves 
---
  arch/arm/mach-s3c24xx/include/mach/gpio.h |   10 +-

OK but g!

What needs to happen to the s3c24xx is to get rid of this file.

- Define ARCH_NR_GPIOS in arch/arm/Kconfig entry
   ARCH_NR_GPIO like everyone else

- Get rid of the config symbol NEED_MACH_GPIO_H

-  Move this file down into arch/arm/mach-s3c24xx/s3c24xx-gpio.h
   or whatever and make it local...

I will try to do this myself if noone else helps out, so I'd like to
carry this patch in the GPIO tree provided I can get an ACK from
the S3C24xx maintainer. Tomasz, is that you or Kukjin?

(BTW the above maybe goes for S3c64xx as well .. and S5P
oh well I will get to it.)



Was this patch forgotten?

José Gonçalves
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[PATCH v2] serial: samsung: add support for manual RTS setting

2013-09-18 Thread José Miguel Gonçalves
The Samsung serial driver currently does not support setting the
RTS pin with an ioctl(TIOCMSET) call. This patch adds this support.

Changes in v2:
 - Preserve the RTS pin's manual setting  in set_termios() also when
   enabling CRTSCTS.

Signed-off-by: José Miguel Gonçalves 
---
 drivers/tty/serial/samsung.c |   20 +---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f3dfa19..401ef4f 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -407,7 +407,14 @@ static unsigned int s3c24xx_serial_get_mctrl(struct 
uart_port *port)
 
 static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int 
mctrl)
 {
-   /* todo - possibly remove AFC and do manual CTS */
+   unsigned int umcon = rd_regl(port, S3C2410_UMCON);
+
+   if (mctrl & TIOCM_RTS)
+   umcon |= S3C2410_UMCOM_RTS_LOW;
+   else
+   umcon &= ~S3C2410_UMCOM_RTS_LOW;
+
+   wr_regl(port, S3C2410_UMCON, umcon);
 }
 
 static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
@@ -774,8 +781,6 @@ static void s3c24xx_serial_set_termios(struct uart_port 
*port,
if (termios->c_cflag & CSTOPB)
ulcon |= S3C2410_LCON_STOPB;
 
-   umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
-
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARODD)
ulcon |= S3C2410_LCON_PODD;
@@ -792,6 +797,15 @@ static void s3c24xx_serial_set_termios(struct uart_port 
*port,
 
wr_regl(port, S3C2410_ULCON, ulcon);
wr_regl(port, S3C2410_UBRDIV, quot);
+
+   umcon = rd_regl(port, S3C2410_UMCON);
+   if (termios->c_cflag & CRTSCTS) {
+   umcon |= S3C2410_UMCOM_AFC;
+   /* Disable RTS when RX FIFO contains 63 bytes */
+   umcon &= ~S3C2412_UMCON_AFC_8;
+   } else {
+   umcon &= ~S3C2410_UMCOM_AFC;
+   }
wr_regl(port, S3C2410_UMCON, umcon);
 
if (ourport->info->has_divslot)
-- 
1.7.10.4

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Re: [PATCH] serial: samsung: add support for manual RTS setting

2013-09-17 Thread José Miguel Gonçalves

On 17-09-2013 16:21, Tomasz Figa wrote:

I had the following scenario in mind:
1) enable CRTSCTS,
2) set RTS status using the IOCTL,
3) disable CRTSCTS,
4) do something,
5) enable CRTSCTS again.

I would expect that the value set in point 2 would be still valid after
point 5, while it will be reset.


Maybe I'm missing something but, as I see it, as soon as you enable AFC in the 
UART controller the RTS pin is no more manually controllable, so after point 5 the 
pin is set automattically by the controller according with the Rx FIFO contents. 
Don't you want to say instead that the value set in 2) will be valid in 4)?





Regarding port capability, if it's decided to validate it in
s3c24xx_serial_get_mctrl() and s3c24xx_serial_set_mctrl() it should also
be validated here. The question is how to validate for the full spectrum
of SoCs that this driver supports?

Hmm, since the driver is already broken in this aspect, ignoring this in
your patch might be fine for now. A follow up patch fixing this would be
welcome, though. However I don't have any good idea how to implement this
at the moment.

First thing that comes to my mind is using the variant data structures to
store information about per port capability (different port FIFO sizes are
already handled like this), but this would imply splitting some of the
groups, as S5PC100 supports modem control for different subset of ports
than S3C64xx, while they both use the same variant data.

Using device tree, this could be passed as an extra property, but some of
the platforms using samsung serial driver can be booted without device
tree, so it wouldn't cover all the cases.


So, as I understand, for now is enough to resubmit the patch with the UMCON 
register setting in s3c24xx_serial_set_termios() preserving the previous manual 
setting of the RTS pin, correct? I was thinking in something like this:


umcon = rd_regb(port, S3C2410_UMCON);
if (termios->c_cflag & CRTSCTS) {
umcon |= S3C2410_UMCOM_AFC;
umcon &= ~S3C2412_UMCON_AFC_8; // Disable RTS when RX FIFO contains 63 
bytes
} else {
umcon &= ~S3C2410_UMCOM_AFC;
}
wr_regl(port, S3C2410_UMCON, umcon);


Best regards,
Tomasz

P.S. Please remember to add all the relevant people to Cc when sending
patches. You can use scripts/get_maintainer.pl to find them.


OK, sorry for that.

Bet regards,
José Gonçalves
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Re: [PATCH] serial: samsung: add support for manual RTS setting

2013-09-17 Thread José Miguel Gonçalves

Hi Tomasz,

On 17-09-2013 11:18, Tomasz Figa wrote:

Hi José,

Please see my comments below.

On Wednesday 11 of September 2013 11:08:27 José Miguel Gonçalves wrote:

The Samsung serial driver currently does not support setting the
RTS pin with an ioctl(TIOCMSET) call. This patch adds this support.

Signed-off-by: José Miguel Gonçalves 
---
  drivers/tty/serial/samsung.c |   17 ++---
  1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f3dfa19..e5dd808 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -407,7 +407,14 @@ static unsigned int s3c24xx_serial_get_mctrl(struct
uart_port *port)

  static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned
int mctrl) {
-   /* todo - possibly remove AFC and do manual CTS */
+   unsigned int umcon = rd_regl(port, S3C2410_UMCON);
+
+   if (mctrl & TIOCM_RTS)
+   umcon |= S3C2410_UMCOM_RTS_LOW;
+   else
+   umcon &= ~S3C2410_UMCOM_RTS_LOW;
+
+   wr_regl(port, S3C2410_UMCON, umcon);

I wonder if port capability shouldn't be considered here. Depending on SoC,
only selected ports provide modem control capability.

For example on S3C64xx only ports 0 and 1 support modem control, while
ports 2 and 3 don't.


Same for S3C2416. I also wondered that, but while I have information for 
all S3C24xx chips and for those a simple test ( port->line < 2) would 
validate this, I don't know about other SoCs this driver supports. 
Bearing this in mind and also that the current implementation of 
s3c24xx_serial_get_mctrl() does not check also for which port it 
applies, I opted for this solution.





  }

  static void s3c24xx_serial_break_ctl(struct uart_port *port, int
break_state) @@ -774,8 +781,6 @@ static void
s3c24xx_serial_set_termios(struct uart_port *port, if (termios->c_cflag
& CSTOPB)
ulcon |= S3C2410_LCON_STOPB;

-   umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
-
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARODD)
ulcon |= S3C2410_LCON_PODD;
@@ -792,6 +797,12 @@ static void s3c24xx_serial_set_termios(struct
uart_port *port,

wr_regl(port, S3C2410_ULCON, ulcon);
wr_regl(port, S3C2410_UBRDIV, quot);
+
+   if (termios->c_cflag & CRTSCTS)
+   umcon = S3C2410_UMCOM_AFC;

Is it correct to override the last manual RTS value set to this register
when activating manual flow control?

Shouldn't the code be more like the following:

umcon = rd_regb(port, S3C2410_UMCON);
if (termios->c_cflag & CRTSCTS)
umcon |= S3C2410_UMCOM_AFC;
else
umcon &= ~S3C2410_UMCOM_AFC;
wr_regl(port, S3C2410_UMCON, umcon);

Probably port capability should be considered here as well.



Looking at the S3C24xx user manuals I've seen that if you set the 
automatic flow control (AFC) with the S3C2410_UMCOM_AFC mask, the UART 
controller ignores the manual RTS setting value with the 
S3C2410_UMCOM_RTS_LOW bitmask, so it is not necessary to do that. Also, 
the upper bits of UMCON control the FIFO level to trigger the AFC and 
you should initialize these bits when using AFC (I've set these to 0 to 
use full FIFO, as it was previously).


Regarding port capability, if it's decided to validate it in 
s3c24xx_serial_get_mctrl() and s3c24xx_serial_set_mctrl() it should also 
be validated here. The question is how to validate for the full spectrum 
of SoCs that this driver supports?


Best regards,
José Gonçalves
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[PATCH] serial: samsung: add support for manual RTS setting

2013-09-11 Thread José Miguel Gonçalves
The Samsung serial driver currently does not support setting the
RTS pin with an ioctl(TIOCMSET) call. This patch adds this support.

Signed-off-by: José Miguel Gonçalves 
---
 drivers/tty/serial/samsung.c |   17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f3dfa19..e5dd808 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -407,7 +407,14 @@ static unsigned int s3c24xx_serial_get_mctrl(struct 
uart_port *port)
 
 static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int 
mctrl)
 {
-   /* todo - possibly remove AFC and do manual CTS */
+   unsigned int umcon = rd_regl(port, S3C2410_UMCON);
+
+   if (mctrl & TIOCM_RTS)
+   umcon |= S3C2410_UMCOM_RTS_LOW;
+   else
+   umcon &= ~S3C2410_UMCOM_RTS_LOW;
+
+   wr_regl(port, S3C2410_UMCON, umcon);
 }
 
 static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
@@ -774,8 +781,6 @@ static void s3c24xx_serial_set_termios(struct uart_port 
*port,
if (termios->c_cflag & CSTOPB)
ulcon |= S3C2410_LCON_STOPB;
 
-   umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
-
if (termios->c_cflag & PARENB) {
if (termios->c_cflag & PARODD)
ulcon |= S3C2410_LCON_PODD;
@@ -792,6 +797,12 @@ static void s3c24xx_serial_set_termios(struct uart_port 
*port,
 
wr_regl(port, S3C2410_ULCON, ulcon);
wr_regl(port, S3C2410_UBRDIV, quot);
+
+   if (termios->c_cflag & CRTSCTS)
+   umcon = S3C2410_UMCOM_AFC;
+   else
+   umcon = rd_regb(port, S3C2410_UMCON) & ~S3C2410_UMCOM_AFC;
+
wr_regl(port, S3C2410_UMCON, umcon);
 
if (ourport->info->has_divslot)
-- 
1.7.10.4

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[PATCH] ARM: S3C24XX: Fix configuration of gpio port sizes on S3C24XX.

2013-09-11 Thread José Miguel Gonçalves
Some GPIO line limits are incorrectly set which, for instance,
does not allow nRTS1 (GPH11) configuration on a S3C2416 chip.

Signed-off-by: José Miguel Gonçalves 
---
 arch/arm/mach-s3c24xx/include/mach/gpio.h |   10 +-
 drivers/gpio/gpio-samsung.c   |6 +++---
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio.h 
b/arch/arm/mach-s3c24xx/include/mach/gpio.h
index 1459156..a1435bc 100644
--- a/arch/arm/mach-s3c24xx/include/mach/gpio.h
+++ b/arch/arm/mach-s3c24xx/include/mach/gpio.h
@@ -31,17 +31,17 @@
  *   2410 2412 2440 2443 2416
  * 2442
  *       
- * A  23   22   25   16   25
- * B  11   11   11   11   9
- * C  16   15   16   16   16
+ * A  23   22   25   16   27
+ * B  11   11   11   11   11
+ * C  16   16   16   16   16
  * D  16   16   16   16   16
  * E  16   16   16   16   16
  * F  88888
  * G  16   16   16   16   8
- * H  11   11   915   15
+ * H  11   11   11   15   15
  * J  --   --   13   16   --
  * K  --   --   --   --   16
- * L  --   --   --   15   7
+ * L  --   --   --   15   14
  * M  --   --   --   22
  */
 
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 358a21c..29c428b 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -1053,7 +1053,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base   = S3C2410_GPA(0),
.owner  = THIS_MODULE,
.label  = "GPIOA",
-   .ngpio  = 24,
+   .ngpio  = 27,
.direction_input= s3c24xx_gpiolib_banka_input,
.direction_output   = s3c24xx_gpiolib_banka_output,
},
@@ -1062,7 +1062,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base   = S3C2410_GPB(0),
.owner  = THIS_MODULE,
.label  = "GPIOB",
-   .ngpio  = 16,
+   .ngpio  = 11,
},
}, {
.chip   = {
@@ -1107,7 +1107,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base   = S3C2410_GPH(0),
.owner  = THIS_MODULE,
.label  = "GPIOH",
-   .ngpio  = 11,
+   .ngpio  = 15,
},
},
/* GPIOS for the S3C2443 and later devices. */
-- 
1.7.10.4

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Re: Broken IRQ handling for S3C2416

2013-06-27 Thread José Miguel Gonçalves

Hi Heiko,

On 27-06-2013 15:26, Heiko Stübner wrote:

Hi Jose,

Am Donnerstag, 27. Juni 2013, 13:59:07 schrieb José Miguel Gonçalves:

Hi,

While migrating from kernel 3.8 to kernel 3.9 I've detected a problem on my
S3C2416 based board. I'm using UART 3 as console and with kernel 3.9 I'm
unable to have a getty working on that port and see a lot of these on
dmesg:

samsung-uart s3c2440-uart.3: cannot get irq 94

Also WDT is not correctly initialized in 3.8, I see in dmesg:

s3c2410-wdt s3c2410-wdt: watchdog inactive, reset disabled, irq disabled

while in 3.9 I see:

s3c2410-wdt s3c2410-wdt: tmr_margin value out of range, default 15 used
s3c2410-wdt s3c2410-wdt: failed to install irq (-38)
s3c2410-wdt: probe of s3c2410-wdt failed with error -38

So I guess something is broken in 3.9 kernel's IRQ handling for S3C2416.

when I checked two days ago, the irqs where working fine on my s3c2416 board.

Basic questions, did you change the init_irq callback to the correct new
function (s3c2416_init_irq) in your board file, can you provide a more
complete log and of course and is your board-file available somewhere?



My bad! I missed that change on the init_irq callback. Everything is working 
fine now.
Thank you and sorry for the inconvenience.

Best regards,
José Gonçalves

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Broken IRQ handling for S3C2416

2013-06-27 Thread José Miguel Gonçalves

Hi,

While migrating from kernel 3.8 to kernel 3.9 I've detected a problem on my 
S3C2416 based board. I'm using UART 3 as console and with kernel 3.9 I'm unable to 
have a getty working on that port and see a lot of these on dmesg:


samsung-uart s3c2440-uart.3: cannot get irq 94

Also WDT is not correctly initialized in 3.8, I see in dmesg:

s3c2410-wdt s3c2410-wdt: watchdog inactive, reset disabled, irq disabled

while in 3.9 I see:

s3c2410-wdt s3c2410-wdt: tmr_margin value out of range, default 15 used
s3c2410-wdt s3c2410-wdt: failed to install irq (-38)
s3c2410-wdt: probe of s3c2410-wdt failed with error -38

So I guess something is broken in 3.9 kernel's IRQ handling for S3C2416.

Best regards,
José Gonçalves
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Re: [PATCH] ARM: SAMSUNG: Add naming of s3c64xx-spi devices

2012-10-15 Thread José Miguel Gonçalves

On 15-10-2012 15:58, Sylwester Nawrocki wrote:

Hi Heiko,

On 10/02/2012 02:43 PM, Heiko Stübner wrote:

Commit a5238e360b71 (spi: s3c64xx: move controller information into driver
data) introduced separate device names for the different subtypes of the
spi controller but forgot to set these in the relevant machines.

To fix this introduce a s3c64xx_spi_setname function and populate all
Samsung arches with the correct names. The function resides in a new
header, as the s3c64xx-spi.h contains driver platform data and should
therefore at some later point move out of the Samsung include dir.

Tested on a s3c2416-based machine.

Signed-off-by: Heiko Stuebner 
Cc: sta...@vger.kernel.org

This patch looks good to me. I've tested it on Exynos4412 SoC based
board. And it fixes quite serious problem - broken SPI support on
a all Samsung machs (non-dt) except s3c64xx in mainline v3.6 kernel.


Reviewed-by: Sylwester Nawrocki 
Tested-by: Sylwester Nawrocki 
(mach-exynos only)

José Miguel, can you confirm it solves the problem for you ?


The driver initialization problem is solved by this patch on my S3C2416 based 
board. Nevertheless, I didn’t have the time yet to test an actual SPI device 
connected to the bus.


BTW, I think the two debug messages at the end of the s3c64xx_spi_probe() routine 
should be promoted from dev_dbg to dev_info in order to be shown on a normal 
kernel boot.


Best regards,
José Gonçalves
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Re: Problem using S3C2416's HSSPI

2012-10-01 Thread José Miguel Gonçalves

On 10/01/2012 08:18 PM, Heiko Stübner wrote:

Hi José,

Am Montag, 1. Oktober 2012, 19:32:15 schrieb José Miguel Gonçalves:

I'm trying to use the HSSPI controller on a S3C2416 based board but I'm
having some problems.

I've added "&s3c64xx_device_spi0" to my array of platform devices and added
a call to s3c64xx_spi0_set_platdata(NULL, 0, 1) before
platform_add_devices(). When the kernel starts I see the following error:

s3c64xx-spi s3c6410-spi.0: Unable to acquire clock 'spi'
s3c64xx-spi: probe of s3c6410-spi.0 failed with error -2

what kernel version do you use?



I'm now using kernel 3.6.

José Gonçalves
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Problem using S3C2416's HSSPI

2012-10-01 Thread José Miguel Gonçalves

Hi,

I'm trying to use the HSSPI controller on a S3C2416 based board but I'm having 
some problems.


I've added "&s3c64xx_device_spi0" to my array of platform devices and added a call 
to s3c64xx_spi0_set_platdata(NULL, 0, 1) before platform_add_devices(). When the 
kernel starts I see the following error:


s3c64xx-spi s3c6410-spi.0: Unable to acquire clock 'spi'
s3c64xx-spi: probe of s3c6410-spi.0 failed with error -2

So I reckon I'm still missing some kind of initialization. Can someone help me on 
this?


Best regards,
José Gonçalves

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Re: [PATCH] ARM: SAMSUNG: Fix for S3C2412 EBI memory mapping.

2012-05-10 Thread José Miguel Gonçalves

On 10-05-2012 10:25, Kukjin Kim wrote:

José Miguel Gonçalves wrote:

While upgrading the kernel on a S3C2412 based board I've noted that it was
impossible to boot the board with a 2.6.32 or upper kernel.
I've tracked down the problem to the EBI virtual memory mapping that is in
conflict with the IO mapping definition in arch/arm/mach-s3c24xx/s3c2412.c.

Signed-off-by: José Miguel Gonçalves
---
  arch/arm/plat-samsung/include/plat/map-s3c.h |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-
samsung/include/plat/map-s3c.h
index 7d04875..c0c70a8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
  #define S3C24XX_VA_WATCHDOG   S3C_VA_WATCHDOG

  #define S3C2412_VA_SSMC   S3C_ADDR_CPU(0x)
-#define S3C2412_VA_EBI S3C_ADDR_CPU(0x0001)
+#define S3C2412_VA_EBI S3C_ADDR_CPU(0x0010)

  #define S3C2410_PA_UART   (0x5000)
  #define S3C24XX_PA_UART   S3C2410_PA_UART
--
1.7.5.4

Yeah, as you said, the mapping for SSMC invade EBI area but I think, just SZ_4K 
is enough for SSMC. So following is better in this case. How do you think? And 
there is no problem on your board?

diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index d4bc7f9..ac906bf 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -72,7 +72,7 @@ static struct map_desc s3c2412_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C2412_VA_SSMC,
.pfn = __phys_to_pfn(S3C2412_PA_SSMC),
-   .length  = SZ_1M,
+   .length  = SZ_4K,
.type= MT_DEVICE,
},
{



It does not work! I tried also a 64K length and also did not work. With your patch 
my console (with earlyprintk set) only displays the following:


## Booting image at 3080 ...
   Image Name:   Linux-3.2.16-inov1
   Created:  2012-05-10  12:42:49 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:1202592 Bytes =  1.1 MB
   Load Address: 30008000
   Entry Point:  30008000
   Verifying Checksum ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 3.2.16-inov1 (jmpg@st-ze) (gcc version 4.6.4 20120402 (prerelease) 
(crosstool-NG 1.15.2) ) #3 PREEMPT Thu May 10 13:42:48 WEST 2012

CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: SMDK2412
bootconsole [earlycon0] enabled
Memory policy: ECC disabled, Data cache writeback
CPU S3C2412 (id 0x32412003)

My guess is that the MMU initialization on the S3C2412 chip only allows a minimum 
of 1MB for the page size.


Best regards,
José Gonçalves

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[PATCH] ARM: SAMSUNG: Fix for S3C2412 EBI memory mapping.

2012-05-09 Thread José Miguel Gonçalves
While upgrading the kernel on a S3C2412 based board I've noted that it was 
impossible to boot the board with a 2.6.32 or upper kernel.
I've tracked down the problem to the EBI virtual memory mapping that is in 
conflict with the IO mapping definition in arch/arm/mach-s3c24xx/s3c2412.c.

Signed-off-by: José Miguel Gonçalves 
---
 arch/arm/plat-samsung/include/plat/map-s3c.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h 
b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d04875..c0c70a8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
 #define S3C24XX_VA_WATCHDOGS3C_VA_WATCHDOG
 
 #define S3C2412_VA_SSMCS3C_ADDR_CPU(0x)
-#define S3C2412_VA_EBI S3C_ADDR_CPU(0x0001)
+#define S3C2412_VA_EBI S3C_ADDR_CPU(0x0010)
 
 #define S3C2410_PA_UART(0x5000)
 #define S3C24XX_PA_UARTS3C2410_PA_UART
-- 
1.7.5.4

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