Re: [PATCH] ARM: EXYNOS: Use wfi macro in platform_do_lowpower

2014-05-23 Thread Leela Krishna Amudala
Hi Kgene,


On Fri, May 23, 2014 at 12:31 AM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
 On 05/22/2014 09:57 AM, Leela Krishna Amudala wrote:

 This patch is originally based on commit b3377d186572 (ARM: 7064/1:
 vexpress: Use wfi macro in platform_do_lowpower.)

 Current Exynos CPU hotplug code includes a hardcoded WFI
 instruction, in ARM encoding.  When the kernel is compiled in Thumb-2
 mode, this is invalid and causes the machine to hang hard when a CPU
 is offlined.

 Use wfi macro instead of the hardcoded WFI instruction.

 Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org


 Acked-by: Daniel Lezcano daniel.lezc...@linaro.org


Can you please take action on this patch.

Best Regards,
Leela Krishna.



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[PATCH] ARM: EXYNOS: Use wfi macro in platform_do_lowpower

2014-05-22 Thread Leela Krishna Amudala
This patch is originally based on commit b3377d186572 (ARM: 7064/1:
vexpress: Use wfi macro in platform_do_lowpower.)

Current Exynos CPU hotplug code includes a hardcoded WFI
instruction, in ARM encoding.  When the kernel is compiled in Thumb-2
mode, this is invalid and causes the machine to hang hard when a CPU
is offlined.

Use wfi macro instead of the hardcoded WFI instruction.

Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
---
 arch/arm/mach-exynos/hotplug.c |8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 69fa483..8a134d0 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -46,13 +46,7 @@ static inline void platform_do_lowpower(unsigned int cpu, 
int *spurious)
if (cpu == 1)
exynos_cpu_power_down(cpu);
 
-   /*
-* here's the WFI
-*/
-   asm(.word  0xe320f003\n
-   :
-   :
-   : memory, cc);
+   wfi();
 
if (pen_release == cpu_logical_map(cpu)) {
/*
-- 
1.7.9.5

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Re: [PATCH V2] ARM: EXYNOS: cpu hotplug: use v7_exit_coherency_flush macro for cache disabling

2014-04-30 Thread Leela Krishna Amudala
Hello Kgene,

Can you please pick this patch to your tree ?

Best Wishes,
Leela Krishna.

On Wed, Apr 30, 2014 at 1:32 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
 Hi,

 On 04/23/2014 02:52 PM, Leela Krishna Amudala wrote:
 A common macro v7_exit_coherency_flush available which does the below tasks 
 in
 the seqeunce.
 -clearing C bit
 -clearing L1 cache
 -exit SMP
 -instruction and data synchronization

 So removing the local functions which does the same thing and use the macro 
 instead.

 Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
 Acked-by: Nicolas Pitre n...@linaro.org
 ---
 Changes since V1:
   - removed unwanted primary_part variable in exynos_cpu_die()
   - given more description in commit message
 suggested by Daniel Lezcano daniel.lezc...@linaro.org

  arch/arm/mach-exynos/hotplug.c |   63 
 +---
  1 file changed, 1 insertion(+), 62 deletions(-)

 diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
 index 5eead53..9ca692d 100644
 --- a/arch/arm/mach-exynos/hotplug.c
 +++ b/arch/arm/mach-exynos/hotplug.c
 @@ -24,56 +24,6 @@
  #include common.h
  #include regs-pmu.h

 -static inline void cpu_enter_lowpower_a9(void)
 -{
 - unsigned int v;
 -
 - asm volatile(
 -mcr p15, 0, %1, c7, c5, 0\n
 -mcr p15, 0, %1, c7, c10, 4\n
 - /*
 -  * Turn off coherency
 -  */
 -mrc p15, 0, %0, c1, c0, 1\n
 -bic %0, %0, %3\n
 -mcr p15, 0, %0, c1, c0, 1\n
 -mrc p15, 0, %0, c1, c0, 0\n
 -bic %0, %0, %2\n
 -mcr p15, 0, %0, c1, c0, 0\n
 -   : =r (v)
 -   : r (0), Ir (CR_C), Ir (0x40)
 -   : cc);
 -}
 -
 -static inline void cpu_enter_lowpower_a15(void)
 -{
 - unsigned int v;
 -
 - asm volatile(
 -mrc p15, 0, %0, c1, c0, 0\n
 -bic %0, %0, %1\n
 -mcr p15, 0, %0, c1, c0, 0\n
 -   : =r (v)
 -   : Ir (CR_C)
 -   : cc);
 -
 - flush_cache_louis();
 -
 - asm volatile(
 - /*
 - * Turn off coherency
 - */
 -mrc p15, 0, %0, c1, c0, 1\n
 -bic %0, %0, %1\n
 -mcr p15, 0, %0, c1, c0, 1\n
 - : =r (v)
 - : Ir (0x40)
 - : cc);
 -
 - isb();
 - dsb();
 -}
 -
  static inline void cpu_leave_lowpower(void)
  {
   unsigned int v;
 @@ -132,19 +82,8 @@ static inline void platform_do_lowpower(unsigned int 
 cpu, int *spurious)
  void __ref exynos_cpu_die(unsigned int cpu)
  {
   int spurious = 0;
 - int primary_part = 0;

 - /*
 -  * we're ready for shutdown now, so do it.
 -  * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
 -  * number by reading the Main ID register and then perform the
 -  * appropriate sequence for entering low power.
 -  */
 - asm(mrc p15, 0, %0, c0, c0, 0 : =r(primary_part) : : cc);
 - if ((primary_part  0xfff0) == 0xc0f0)
 - cpu_enter_lowpower_a15();
 - else
 - cpu_enter_lowpower_a9();
 + v7_exit_coherency_flush(louis);

   platform_do_lowpower(cpu, spurious);



 I tested this patch on Exynos3250 based on Cortex-A7 dual core.

 Tested-by: Chanwoo Choi cw00.c...@samsung.com

 Thanks,
 Chanwoo Choi

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[PATCH 2/2] ARM: EXYNOS: use generic exynos cpu power control functions

2014-04-24 Thread Leela Krishna Amudala
Use generic exynos cpu power control functions to power up/down
and to know the status of the cpu.

Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
---
 arch/arm/mach-exynos/platsmp.c |9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f..e3d005b 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -107,15 +107,12 @@ static int exynos_boot_secondary(unsigned int cpu, struct 
task_struct *idle)
 */
write_pen_release(phys_cpu);
 
-   if (!(__raw_readl(S5P_ARM_CORE1_STATUS)  S5P_CORE_LOCAL_PWR_EN)) {
-   __raw_writel(S5P_CORE_LOCAL_PWR_EN,
-S5P_ARM_CORE1_CONFIGURATION);
-
+   if (!exynos_cpu_power_state(cpu)) {
+   exynos_cpu_powerup(cpu);
timeout = 10;
 
/* wait max 10 ms until cpu1 is on */
-   while ((__raw_readl(S5P_ARM_CORE1_STATUS)
-S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) {
+   while (exynos_cpu_power_state(cpu) != S5P_CORE_LOCAL_PWR_EN) {
if (timeout-- == 0)
break;
 
-- 
1.7.9.5

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[PATCH 1/2] ARM: EXYNOS: Add generic cpu power control functions for all exynos based SoCs

2014-04-24 Thread Leela Krishna Amudala
Add generic cpu power control functions for exynos based SoCS
for cpu power up/down and to know the cpu status.

Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
---
 arch/arm/mach-exynos/common.h   |3 +++
 arch/arm/mach-exynos/pm.c   |   36 
 arch/arm/mach-exynos/regs-pmu.h |6 ++
 3 files changed, 45 insertions(+)

diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83..566f222 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -62,5 +62,8 @@ struct exynos_pmu_conf {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
+extern void exynos_cpu_powerdown(int cpu);
+extern void exynos_cpu_powerup(int cpu);
+extern int  exynos_cpu_power_state(int cpu);
 
 #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ce..6651028 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -100,6 +100,42 @@ static int exynos_irq_set_wake(struct irq_data *data, 
unsigned int state)
return -ENOENT;
 }
 
+/**
+ * exynos_cpu_powerdown : power down the specified cpu
+ * @cpu : the cpu to power down
+ *
+ * Power downs the specified cpu. The sequence must be finished by a
+ * call to cpu_do_idle()
+ *
+ */
+void exynos_cpu_powerdown(int cpu)
+{
+   __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
+
+/**
+ * exynos_cpu_powerup : power up the specified cpu
+ * @cpu : the cpu to power up
+ *
+ * Power up the specified cpu
+ */
+void exynos_cpu_powerup(int cpu)
+{
+   __raw_writel(S5P_CORE_LOCAL_PWR_EN,
+EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
+
+/**
+ * exynos_cpu_power_state : returns the power state of the cpu
+ * @cpu : the cpu to retrieve the power state from
+ *
+ */
+int exynos_cpu_power_state(int cpu)
+{
+   return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) 
+   S5P_CORE_LOCAL_PWR_EN);
+}
+
 /* For Cortex-A9 Diagnostic and Power control register */
 static unsigned int save_arm_register[2];
 
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 4f6a256..0bdfcbc 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -121,6 +121,12 @@
 
 #define S5P_CHECK_SLEEP0x0BAD
 
+#define EXYNOS_ARM_CORE0_CONFIGURATION S5P_PMUREG(0x2000)
+#define EXYNOS_ARM_CORE_CONFIGURATION(_nr) \
+   (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
+#define EXYNOS_ARM_CORE_STATUS(_nr)\
+   (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)
+
 /* Only for EXYNOS4210 */
 #define S5P_CMU_CLKSTOP_LCD1_LOWPWRS5P_PMUREG(0x1154)
 #define S5P_CMU_RESET_LCD1_LOWPWR  S5P_PMUREG(0x1174)
-- 
1.7.9.5

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[PATCH 0/2] Add generic cpu power control functions for exynos

2014-04-24 Thread Leela Krishna Amudala
This patchset adds the generic cpu power control functions for
exynos based SoCs to power up/down and to know the status of the cpu.

Note: This series has been rebased on 3.15-rc1 and tested on 
Exynos based Origen(Cortex-A9) and Arndale-octa(Cortex A7,A15) boards.

Leela Krishna Amudala (2):
  ARM: EXYNOS: Add generic cpu power control functions for all exynos
based SoCs
  ARM: EXYNOS: use generic exynos cpu power control functions

 arch/arm/mach-exynos/common.h   |3 +++
 arch/arm/mach-exynos/platsmp.c  |9 +++--
 arch/arm/mach-exynos/pm.c   |   36 
 arch/arm/mach-exynos/regs-pmu.h |6 ++
 4 files changed, 48 insertions(+), 6 deletions(-)

-- 
1.7.9.5

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Re: [PATCH 0/2] Add generic cpu power control functions for exynos

2014-04-24 Thread Leela Krishna Amudala
Hi Abhilash,

If you are okay with this patchset you can rebase/merge it with your
mcpm patches.

Best Wishes,
Leela Krishna.

On Thu, Apr 24, 2014 at 3:24 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:

 Hi Abhilash and Leela,

 FYI I think you are working on similar patches.


 On 04/24/2014 11:31 AM, Leela Krishna Amudala wrote:
 This patchset adds the generic cpu power control functions for

 exynos based SoCs to power up/down and to know the status of the cpu.

 Note: This series has been rebased on 3.15-rc1 and tested on
 Exynos based Origen(Cortex-A9) and Arndale-octa(Cortex A7,A15) boards.

 Leela Krishna Amudala (2):
ARM: EXYNOS: Add generic cpu power control functions for all exynos
  based SoCs
ARM: EXYNOS: use generic exynos cpu power control functions

   arch/arm/mach-exynos/common.h   |3 +++
   arch/arm/mach-exynos/platsmp.c  |9 +++--
   arch/arm/mach-exynos/pm.c   |   36
 
   arch/arm/mach-exynos/regs-pmu.h |6 ++
   4 files changed, 48 insertions(+), 6 deletions(-)



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Re: [PATCH] ARM: EXYNOS: cpu hotplug: use v7_exit_coherency_flush macro for cache disabling

2014-04-22 Thread Leela Krishna Amudala
Hi Daniel,

Thanks for reviewing the patch.

On Tue, Apr 22, 2014 at 8:06 PM, Daniel Lezcano
daniel.lezc...@linaro.org wrote:
 On 04/22/2014 04:18 PM, Leela Krishna Amudala wrote:

 Remove the duplicated code for cache disabling and use
 v7_exit_coherency_flush
 macro to do the same job.


 Hi Leela,

 thanks for this patch! It would be nice if you can describe why those macros
 can be replaced by the generic v7_exit_coherency_flush macro.


Okay, will give the description in commit message



 Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org

 ---
 cpu hotplug is tested with 3.15-rc1 on Origen(which has cortex A9) and
 Arndale octa(which has cortex A7 and A15) boards.

   arch/arm/mach-exynos/hotplug.c |   56
 ++--
   1 file changed, 2 insertions(+), 54 deletions(-)

 diff --git a/arch/arm/mach-exynos/hotplug.c
 b/arch/arm/mach-exynos/hotplug.c
 index 5eead53..9eb8d1b 100644
 --- a/arch/arm/mach-exynos/hotplug.c
 +++ b/arch/arm/mach-exynos/hotplug.c
 @@ -24,56 +24,6 @@
   #include common.h
   #include regs-pmu.h

 -static inline void cpu_enter_lowpower_a9(void)
 -{
 -   unsigned int v;
 -
 -   asm volatile(
 -  mcr p15, 0, %1, c7, c5, 0\n
 -  mcr p15, 0, %1, c7, c10, 4\n
 -   /*
 -* Turn off coherency
 -*/
 -  mrc p15, 0, %0, c1, c0, 1\n
 -  bic %0, %0, %3\n
 -  mcr p15, 0, %0, c1, c0, 1\n
 -  mrc p15, 0, %0, c1, c0, 0\n
 -  bic %0, %0, %2\n
 -  mcr p15, 0, %0, c1, c0, 0\n
 - : =r (v)
 - : r (0), Ir (CR_C), Ir (0x40)
 - : cc);
 -}
 -
 -static inline void cpu_enter_lowpower_a15(void)
 -{
 -   unsigned int v;
 -
 -   asm volatile(
 -  mrc p15, 0, %0, c1, c0, 0\n
 -  bic %0, %0, %1\n
 -  mcr p15, 0, %0, c1, c0, 0\n
 - : =r (v)
 - : Ir (CR_C)
 - : cc);
 -
 -   flush_cache_louis();
 -
 -   asm volatile(
 -   /*
 -   * Turn off coherency
 -   */
 -  mrc p15, 0, %0, c1, c0, 1\n
 -  bic %0, %0, %1\n
 -  mcr p15, 0, %0, c1, c0, 1\n
 -   : =r (v)
 -   : Ir (0x40)
 -   : cc);
 -
 -   isb();
 -   dsb();
 -}
 -
   static inline void cpu_leave_lowpower(void)
   {
 unsigned int v;
 @@ -141,10 +91,8 @@ void __ref exynos_cpu_die(unsigned int cpu)
  * appropriate sequence for entering low power.
  */
 asm(mrc p15, 0, %0, c0, c0, 0 : =r(primary_part) : : cc);


 Can't you remove this asm line above as well as the primary_part variable ?

Didn't notice it, will remove this.



 -   if ((primary_part  0xfff0) == 0xc0f0)
 -   cpu_enter_lowpower_a15();
 -   else
 -   cpu_enter_lowpower_a9();
 +
 +   v7_exit_coherency_flush(louis);

 platform_do_lowpower(cpu, spurious);




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[PATCH V2] ARM: EXYNOS: cpu hotplug: use v7_exit_coherency_flush macro for cache disabling

2014-04-22 Thread Leela Krishna Amudala
A common macro v7_exit_coherency_flush available which does the below tasks in
the seqeunce.
-clearing C bit
-clearing L1 cache
-exit SMP
-instruction and data synchronization

So removing the local functions which does the same thing and use the macro 
instead.

Signed-off-by: Leela Krishna Amudala leela.kris...@linaro.org
Acked-by: Nicolas Pitre n...@linaro.org
---
Changes since V1:
- removed unwanted primary_part variable in exynos_cpu_die()
- given more description in commit message
  suggested by Daniel Lezcano daniel.lezc...@linaro.org

 arch/arm/mach-exynos/hotplug.c |   63 +---
 1 file changed, 1 insertion(+), 62 deletions(-)

diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead53..9ca692d 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -24,56 +24,6 @@
 #include common.h
 #include regs-pmu.h
 
-static inline void cpu_enter_lowpower_a9(void)
-{
-   unsigned int v;
-
-   asm volatile(
-  mcr p15, 0, %1, c7, c5, 0\n
-  mcr p15, 0, %1, c7, c10, 4\n
-   /*
-* Turn off coherency
-*/
-  mrc p15, 0, %0, c1, c0, 1\n
-  bic %0, %0, %3\n
-  mcr p15, 0, %0, c1, c0, 1\n
-  mrc p15, 0, %0, c1, c0, 0\n
-  bic %0, %0, %2\n
-  mcr p15, 0, %0, c1, c0, 0\n
- : =r (v)
- : r (0), Ir (CR_C), Ir (0x40)
- : cc);
-}
-
-static inline void cpu_enter_lowpower_a15(void)
-{
-   unsigned int v;
-
-   asm volatile(
-  mrc p15, 0, %0, c1, c0, 0\n
-  bic %0, %0, %1\n
-  mcr p15, 0, %0, c1, c0, 0\n
- : =r (v)
- : Ir (CR_C)
- : cc);
-
-   flush_cache_louis();
-
-   asm volatile(
-   /*
-   * Turn off coherency
-   */
-  mrc p15, 0, %0, c1, c0, 1\n
-  bic %0, %0, %1\n
-  mcr p15, 0, %0, c1, c0, 1\n
-   : =r (v)
-   : Ir (0x40)
-   : cc);
-
-   isb();
-   dsb();
-}
-
 static inline void cpu_leave_lowpower(void)
 {
unsigned int v;
@@ -132,19 +82,8 @@ static inline void platform_do_lowpower(unsigned int cpu, 
int *spurious)
 void __ref exynos_cpu_die(unsigned int cpu)
 {
int spurious = 0;
-   int primary_part = 0;
 
-   /*
-* we're ready for shutdown now, so do it.
-* Exynos4 is A9 based while Exynos5 is A15; check the CPU part
-* number by reading the Main ID register and then perform the
-* appropriate sequence for entering low power.
-*/
-   asm(mrc p15, 0, %0, c0, c0, 0 : =r(primary_part) : : cc);
-   if ((primary_part  0xfff0) == 0xc0f0)
-   cpu_enter_lowpower_a15();
-   else
-   cpu_enter_lowpower_a9();
+   v7_exit_coherency_flush(louis);
 
platform_do_lowpower(cpu, spurious);
 
-- 
1.7.9.5

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Re: [PATCH v11 0/4] thermal: samsung: Clean up and add support for Exynos5420

2014-03-19 Thread Leela Krishna Amudala
Hi All,

I didn't see this series in mainline, Any comments for this ?

Thanks,
Leela Krishna Amudala.


On Tue, Dec 10, 2013 at 12:10 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
 This patchset does a little clean up of the existing code (linux-soc-thermal)
 1.  [v11] thermal: samsung: replace inten_ bit fields with intclr_
 2.  [v11] thermal: samsung: change base_common to more meaningful base_second

 adds support for Exynos5420 in the driver and (linux-soc-thermal)
 3.  [v11] thermal: samsung: Add TMU support for Exynos5420 SoCs
 also adds the device tree nodes for the same to exynos5420.dtsi 
 (linux-samsung.git)
 4.  [v11] ARM: dts: Exynos5420: Add device nodes for TMU blocks

 (linux-soc-thermal)
 Naveen Krishna Chatradhi (3):
   thermal: samsung: replace inten_ bit fields with intclr_
   thermal: samsung: change base_common to more meaningful base_second
   thermal: samsung: Add TMU support for Exynos5420 SoCs

  .../devicetree/bindings/thermal/exynos-thermal.txt |   42 ++-
  drivers/thermal/samsung/exynos_tmu.c   |   72 +---
  drivers/thermal/samsung/exynos_tmu.h   |   21 ++--
  drivers/thermal/samsung/exynos_tmu_data.c  |  119 
 ++--
  drivers/thermal/samsung/exynos_tmu_data.h  |   12 +-
  5 files changed, 228 insertions(+), 38 deletions(-)

 (linux-samsung.git)
 Naveen Krishna Chatradhi (1):
   ARM: dts: Exynos5420: Add device nodes for TMU blocks

  arch/arm/boot/dts/exynos5420.dtsi |   40 
 +
  1 file changed, 40 insertions(+)
 --
 1.7.10.4

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Re: [PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2014-01-19 Thread Leela Krishna Amudala
On 1/10/14, Wim Van Sebroeck w...@iguana.be wrote:
 Hi Leela,

 This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
 handle PMU register accesses in a centralized way using syscon driver

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Tomasz Figa t.f...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 Tested-by: Doug Anderson diand...@chromium.org
 ---
 ...
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
 index b1fa334..cd47db0 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -402,4 +402,9 @@
  clock-names = gscl;
  samsung,power-domain = gsc_pd;
  };

 I can't add this patch since there is no gscl in the current linux-tree.
 Is this depending on another patch or are we going to fix this in another
 way?


Hi Kgene,

Driver changes has been merged to Wim's tree, so can you please pick
this patch into your tree.

Best Wishes,
Leela krishna.

 Kind regards,
 Wim.

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Re: [PATCH V12 3/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2014-01-19 Thread Leela Krishna Amudala
On 12/7/13, Guenter Roeck li...@roeck-us.net wrote:
 On Fri, Dec 06, 2013 at 11:17:48AM +0530, Leela Krishna Amudala wrote:
 In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
 watchdog timer which is not the case with s3c series SoCs so, there is a
 need to have different compatible names for watchdog to handle these pmu
 registers access.

 Hence this patch removes watchdog node from Exynos5.dtsi common file and
 make it separate by updating existing node in Exynos5250 and adding new
 node
 to Exynos5420. This patch also makes the watchdog node enabled by default

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Tomasz Figa t.f...@samsung.com
 Reviewed-by: Doug Anderson diand...@chromium.org
 Tested-by: Doug Anderson diand...@chromium.org

 Acked-by: Guenter Roeck li...@roeck-us.net

Hi Kgene,

Driver changes has been merged to Wim's tree, so can you please pick
this patch into your tree.

Best Wishes,
Leela krishna.

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Re: Re: [PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2014-01-09 Thread Leela Krishna Amudala
Hi Wim,
I rebased this patch series on Kukjin's for-next branch.
That is the reason for missing this context code in the patch.

As this is a dts file change and if Kukjin accepts to merge this patch
into your linux-watchdog-next tree you can rebase and apply it.

Best Wishes,
Leela Krishna.

--- Original Message ---
Sender : Wim Van Sebroeckw...@iguana.be
Date : Jan 10, 2014 13:11 (GMT+05:30)
Title : Re: [PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and 
exynos5420 dtsi files

Hi Leela,

 This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
 handle PMU register accesses in a centralized way using syscon driver
 
 Signed-off-by: Leela Krishna Amudala 
 Reviewed-by: Tomasz Figa 
 Reviewed-by: Doug Anderson 
 Tested-by: Doug Anderson 
 ---
...
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
 b/arch/arm/boot/dts/exynos5420.dtsi
 index b1fa334..cd47db0 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -402,4 +402,9 @@
   clock-names = gscl;
   samsung,power-domain = gsc_pd;
   };

I can't add this patch since there is no gscl in the current linux-tree.
Is this depending on another patch or are we going to fix this in another way?

Kind regards,
Wim.





Best Wishes,
Leela Krishna.

Re: [PATCH V12 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2014-01-08 Thread Leela Krishna Amudala
Hello Wim Van Sebroeck,

I believe that I addressed all the comments given by reviewers.
So can you look into this series and take necessary action..?

Best Wishes,
Leela Krishna.

On Wed, Dec 18, 2013 at 9:01 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
 Hello Wim Van Sebroeck,

 Can you kindly look into this series and take necessary action..?

 Best Wishes,
 Leela Krishna.


 On Fri, Dec 6, 2013 at 2:47 PM, Leela Krishna Amudala
 l.kris...@samsung.com wrote:
 This patchset does the following things
 - Adds pmusysreg device node to exynos5.dtsi file
 - Adds watchdog DT nodes to Exynos5250 and 5420
 - Uses syscon regmap interface to configure pmu registers
   to mask/unmask enable/disable of watchdog.

 This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

 changes since V11:
 - Added EXYNOS5 prefix to REG_OFFSET defines (suggested by Tomasz)
 - NEEDS_PMU_CONFIG = HAS_PMU_CONFIG (suggested by Olof, Guenter)
 - Move QUIRK_HAS_PMU_CONFIG check to 
 s3c2410wdt_mask_and_disable_reset (suggested by Guenter)

 changes since V10:
 - followed coding style rules
 - removed duplicate error message suggested by Guenter Roeck 
 li...@roeck-us.net

 changes since V9:
 - added descriptions to s3c2410_wdt_variant structure fields
 - moved calling s3c2410wdt_mask_and_disable_reset() function above 
 s3c2410wdt_start() call in probe
 - put dev_err message back to s3c2410wdt_mask_and_disable_reset() 
 function
   (suggested by Doug Anderson diand...@chromium.org)

 changes since V8:
 - modified the patch description for the below patch
   watchdog: s3c2410_wdt: use syscon regmap interface to configure 
 pmu register
 - removed MODULE_ALIAS in watchdog driver
 - changed dev_warn to dev_err in one failure case handling 
 (suggested by Guenter Roeck li...@roeck-us.net)
 - renamed variable name from pmu_config to drv_data
 - changed the compatible field description in documentation file
   (suggested by Tomasz Figa t.f...@samsung.com)

 changes since V7:
 - re-ordered the patches in the series
 - moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
   and limited only this structure to platform match table
 - renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
 - removed exynos variants from platform match table
   (suggested by Tomasz Figa t.f...@samsung.com)

 changes since V6:
 - added SoC-specific compatible value to syscon node and documented 
 it
 - given more patch description for below patch
   ARM: dts: update watchdog device nodes for Exynos5250 and 
 Exynos5420
 - added platform_device_id array for watchdog devices
 - selected MFD_SYSCON in Kconfig entry for watchdog

 Changes since V5:
 - removed status property in DT nodes
 - changed the return type for the function 
 s3c2410wdt_mask_and_disable_reset()
   and handled error cases
 - Handled to get driver data in non-DT cases
 - Addressed comments given by Tomasz Figa t.f...@samsung.com

 Changes since V4:
 - changed the node name from pmusysreg to syscon and node label from 
 pmu_sys_reg to pmu_syscon
 - changed the property name from samsung,pmusysreg to 
 samsung,syscon-phandle
 - used regmap_update_bits instead of remap_read/regmap_write
 - Addressed other comments given by Tomasz Figa t.f...@samsung.com

 Changes since V3:
 - changed the compatible strings for watchdog node
 - splitted up adding pmusysreg node and made it separate patch
 - Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

 Changes since V2:
 - used syscon regmap interface to configure pmu registers in WDT 
 driver
   (suggested by Tomasz Figa t.f...@samsung.com)

 Changes since V1:
 - Added new compatible string for Exynos5 SoCs
 - Introduced quirk mechanism to program PMU registers
 - Addressed comments given by Tomasz Figa t.f...@samsung.com

 Leela Krishna Amudala (3):
   ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
   watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
 register
   ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

  .../devicetree/bindings/arm/samsung/pmu.txt|   15 ++
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
  arch/arm/boot/dts/exynos5.dtsi |7 -
  arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
  arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
  drivers/watchdog/Kconfig   |1 +
  drivers/watchdog/s3c2410_wdt.c |  154 
 ++--
  7 files changed, 205 insertions(+), 18 deletions(-)
  create mode 100644 Documentation/devicetree

Re: [PATCH V12 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-12-18 Thread Leela Krishna Amudala
Hello Wim Van Sebroeck,

Can you kindly look into this series and take necessary action..?

Best Wishes,
Leela Krishna.


On Fri, Dec 6, 2013 at 2:47 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
 This patchset does the following things
 - Adds pmusysreg device node to exynos5.dtsi file
 - Adds watchdog DT nodes to Exynos5250 and 5420
 - Uses syscon regmap interface to configure pmu registers
   to mask/unmask enable/disable of watchdog.

 This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

 changes since V11:
 - Added EXYNOS5 prefix to REG_OFFSET defines (suggested by Tomasz)
 - NEEDS_PMU_CONFIG = HAS_PMU_CONFIG (suggested by Olof, Guenter)
 - Move QUIRK_HAS_PMU_CONFIG check to 
 s3c2410wdt_mask_and_disable_reset (suggested by Guenter)

 changes since V10:
 - followed coding style rules
 - removed duplicate error message suggested by Guenter Roeck 
 li...@roeck-us.net

 changes since V9:
 - added descriptions to s3c2410_wdt_variant structure fields
 - moved calling s3c2410wdt_mask_and_disable_reset() function above 
 s3c2410wdt_start() call in probe
 - put dev_err message back to s3c2410wdt_mask_and_disable_reset() 
 function
   (suggested by Doug Anderson diand...@chromium.org)

 changes since V8:
 - modified the patch description for the below patch
   watchdog: s3c2410_wdt: use syscon regmap interface to configure 
 pmu register
 - removed MODULE_ALIAS in watchdog driver
 - changed dev_warn to dev_err in one failure case handling (suggested 
 by Guenter Roeck li...@roeck-us.net)
 - renamed variable name from pmu_config to drv_data
 - changed the compatible field description in documentation file
   (suggested by Tomasz Figa t.f...@samsung.com)

 changes since V7:
 - re-ordered the patches in the series
 - moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
   and limited only this structure to platform match table
 - renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
 - removed exynos variants from platform match table
   (suggested by Tomasz Figa t.f...@samsung.com)

 changes since V6:
 - added SoC-specific compatible value to syscon node and documented it
 - given more patch description for below patch
   ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
 - added platform_device_id array for watchdog devices
 - selected MFD_SYSCON in Kconfig entry for watchdog

 Changes since V5:
 - removed status property in DT nodes
 - changed the return type for the function 
 s3c2410wdt_mask_and_disable_reset()
   and handled error cases
 - Handled to get driver data in non-DT cases
 - Addressed comments given by Tomasz Figa t.f...@samsung.com

 Changes since V4:
 - changed the node name from pmusysreg to syscon and node label from 
 pmu_sys_reg to pmu_syscon
 - changed the property name from samsung,pmusysreg to 
 samsung,syscon-phandle
 - used regmap_update_bits instead of remap_read/regmap_write
 - Addressed other comments given by Tomasz Figa t.f...@samsung.com

 Changes since V3:
 - changed the compatible strings for watchdog node
 - splitted up adding pmusysreg node and made it separate patch
 - Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

 Changes since V2:
 - used syscon regmap interface to configure pmu registers in WDT 
 driver
   (suggested by Tomasz Figa t.f...@samsung.com)

 Changes since V1:
 - Added new compatible string for Exynos5 SoCs
 - Introduced quirk mechanism to program PMU registers
 - Addressed comments given by Tomasz Figa t.f...@samsung.com

 Leela Krishna Amudala (3):
   ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
   watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
 register
   ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

  .../devicetree/bindings/arm/samsung/pmu.txt|   15 ++
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
  arch/arm/boot/dts/exynos5.dtsi |7 -
  arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
  arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
  drivers/watchdog/Kconfig   |1 +
  drivers/watchdog/s3c2410_wdt.c |  154 
 ++--
  7 files changed, 205 insertions(+), 18 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

 --
 1.7.10.4

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Re: [PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-12-12 Thread Leela Krishna Amudala
Hi,

On Thu, Dec 12, 2013 at 8:57 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 2013/12/11 Doug Anderson diand...@chromium.org:
 Leela Krishna,

 On Wed, Dec 11, 2013 at 4:22 AM, Leela Krishna Amudala
 l.kris...@samsung.com wrote:
 Hi,

 As I was in travel not accessed my mails.

 I'll try to post next version of this series tomorrow addressing
 Sylwester's comments.

 It's completely up to you (and Wim), of course.  ...but if it were me
 I wouldn't spin the patch at this point.  Your existing version has
 Guenter's Ack and his indication that he thinks that v12 is good
 enough to land without future spins.  You could spin with Tomasz /
 Sylwester's suggestions but remember that it is not mandatory.

 As I said, at this point the comments are just nitpicks that it would be
 nice to have them addressed, but this might be done as well in incremental
 patch(es).

 So if it's not a problem for you and you can find time for it, a re-spin would
 be nice, but it's not a necessity (unless Wim decides otherwise).


Okay, Then I'll drop my plan to post next version of this series.
Anyways I don't have code repository and hardware with me now to
re-base and test.

Hello Wim,
Can you kindly look into this series and take necessary action..?

Best Wishes,
Leela Krishna.


 Best regards,
 Tomasz
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Re: [PATCH] ARM: dts: Add SPI nodes to the exynos5420 device tree file

2013-12-12 Thread Leela Krishna Amudala
Hi Kukjin,

Can you kindly look into this patch and take necessary action..?

Best Wishes,
Leela Krishna.

On Tue, Nov 12, 2013 at 9:02 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
 Hi Kukjin,

 Thanks for reviewing the patch.

 On Tue, Nov 12, 2013 at 4:46 PM, Kukjin Kim kg...@kernel.org wrote:
 Leela Krishna Amudala  wrote:

 Add SPI device tree nodes to Exynos5420 SoC

 Signed-off-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Andrew Bresticker abres...@chromium.org
 ---
 Note: This patch is rebased on Kgene's for-next branch and is dependent on
 [V3] ARM: dts: Add DMA controller node info on Exynos5420.
 https://patchwork.kernel.org/patch/2851790/

  arch/arm/boot/dts/exynos5420.dtsi |   51
 +
  1 file changed, 51 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
 index 15465f8..8d9e980 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -27,6 +27,9 @@
   pinctrl2 = pinctrl_2;
   pinctrl3 = pinctrl_3;
   pinctrl4 = pinctrl_4;
 + spi0 = spi_0;
 + spi1 = spi_1;
 + spi2 = spi_2;
   };

   cpus {
 @@ -238,6 +241,54 @@
   };
   };

 + spi_0: spi@12d2 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d2 0x100;
 + interrupts = 0 66 0;
 + dmas = pdma0 5
 + pdma0 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi0_bus;
 + clocks = clock 271, clock 135;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_1: spi@12d3 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d3 0x100;
 + interrupts = 0 67 0;
 + dmas = pdma1 5
 + pdma1 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi1_bus;
 + clocks = clock 272, clock 136;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_2: spi@12d4 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d4 0x100;
 + interrupts = 0 68 0;
 + dmas = pdma0 7
 + pdma0 6;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi2_bus;
 + clocks = clock 273, clock 137;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
   serial@12C0 {
   clocks = clock 257, clock 128;
   clock-names = uart, clk_uart_baud0;
 --
 1.7.10.4

 Leela, do you still want to keep the status 'disabled' for SPIs?


 Yes, the SPI client nodes will make status = okay in board file.

 Best Wishes,
 Leela Krishna.

 Others look good to me.

 Thanks,
 Kukjin

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Re: [RESEND] [PATCH] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420

2013-12-12 Thread Leela Krishna Amudala
Hi Kukjin,

Even though you said it is applied, I didn't see this patch in any of
your trees.
Can you kindly look into this patch and take necessary action..?

Best Wishes,
Leela Krishna.

On Tue, Nov 12, 2013 at 8:39 PM, Kukjin Kim kg...@kernel.org wrote:
 Leela Krishna Amudala wrote:

 Hi Sachin,

 On Thu, Oct 10, 2013 at 11:18 AM, Sachin Kamat sachin.ka...@linaro.org
 wrote:
  Hi Leela,
 
  On 10 October 2013 11:12, Leela Krishna Amudala l.kris...@samsung.com
 wrote:
  Add the device-tree binding for the PWM controller to Exynos5250 and
 Exynos5420
 
  Signed-off-by: Andrew Bresticker abres...@chromium.org
  Signed-off-by: Olof Johansson ol...@chromium.org
  Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
  ---
   arch/arm/boot/dts/exynos5250.dtsi |9 +
   arch/arm/boot/dts/exynos5420.dtsi |9 +
   2 files changed, 18 insertions(+)
 
  diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
  index 864ae90..99abc72 100644
  --- a/arch/arm/boot/dts/exynos5250.dtsi
  +++ b/arch/arm/boot/dts/exynos5250.dtsi
  @@ -521,6 +521,15 @@
  };
  };
 
  +   pwm: pwm@12dd {
  +   compatible = samsung,exynos4210-pwm;
  +   reg = 0x12dd 0x100;
  +   samsung,pwm-outputs = 0, 1, 2, 3;
  +   #pwm-cells = 3;
  +   clocks = clock 311;
  +   clock-names = timers;
  +   };
  +
  amba {
  #address-cells = 1;
  #size-cells = 1;
  diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
  index d537cd7..80afc8b 100644
  --- a/arch/arm/boot/dts/exynos5420.dtsi
  +++ b/arch/arm/boot/dts/exynos5420.dtsi
  @@ -206,6 +206,15 @@
  clock-names = uart, clk_uart_baud0;
  };
 
  +   pwm: pwm@12dd {
  +   compatible = samsung,exynos4210-pwm;
  +   reg = 0x12dd 0x100;
  +   samsung,pwm-outputs = 0, 1, 2, 3;
  +   #pwm-cells = 3;
  +   clocks = clock 279;
  +   clock-names = timers;
  +   };
  +
 
  Looking at the properties in the above 2 nodes, can't we have the
  common ones defined in exynos5.dtsi?
 

 Sorry for late, I missed...

 Well, upcoming exynos5 SoC has different properties so would be better if we
 could keep current version for pwm.

 Yes, we can do it, will change and post the next version

 Let me ignore your v2 patch and take this one.

 Thanks,
 Kukjin

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Re: [RESEND] [PATCH V3] ARM: dts: Add DMA controller node info on Exynos5420.

2013-12-12 Thread Leela Krishna Amudala
Hi Kukjin,

Even though you said it is applied, I didn't see this patch in any of
your trees.
Can you kindly look into this patch and take necessary action..?

Best Wishes,
Leela Krishna.

On Tue, Nov 12, 2013 at 8:13 PM, Kukjin Kim kg...@kernel.org wrote:
 Leela Krishna Amudala wrote:

 + dt ml.

 From: Padmavathi Venna padm...@samsung.com

 This patch adds dma controller node info on Exynos5420.
 Exynos5420 has adma for audio IPs. As adma clk is dependent
 on audss clk provider that will be added later.

 Signed-off-by: Padmavathi Venna padm...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
 Change since V2:
   - Removed adma node as adma clock is dependent audss clock provider.

 Changes since V1:
 - In V1, dma node common stuff was added in common exynos5.dtsi
 file.
   This was removed as per Kukjin comment and added in
 exynos5420.dtsi.

  arch/arm/boot/dts/exynos5420.dtsi |   52
 +
  1 file changed, 52 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
 index d537cd7..15465f8 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -186,6 +186,58 @@
   status = okay;
   };

 + amba {
 + #address-cells = 1;
 + #size-cells = 1;
 + compatible = arm,amba-bus;
 + interrupt-parent = gic;
 + ranges;
 +
 + pdma0: pdma@121A {
 + compatible = arm,pl330, arm,primecell;
 + reg = 0x121A 0x1000;
 + interrupts = 0 34 0;
 + clocks = clock 362;
 + clock-names = apb_pclk;
 + #dma-cells = 1;
 + #dma-channels = 8;
 + #dma-requests = 32;
 + };
 +
 + pdma1: pdma@121B {
 + compatible = arm,pl330, arm,primecell;
 + reg = 0x121B 0x1000;
 + interrupts = 0 35 0;
 + clocks = clock 363;
 + clock-names = apb_pclk;
 + #dma-cells = 1;
 + #dma-channels = 8;
 + #dma-requests = 32;
 + };
 +
 + mdma0: mdma@1080 {
 + compatible = arm,pl330, arm,primecell;
 + reg = 0x1080 0x1000;
 + interrupts = 0 33 0;
 + clocks = clock 473;
 + clock-names = apb_pclk;
 + #dma-cells = 1;
 + #dma-channels = 8;
 + #dma-requests = 1;
 + };
 +
 + mdma1: mdma@11C1 {
 + compatible = arm,pl330, arm,primecell;
 + reg = 0x11C1 0x1000;
 + interrupts = 0 124 0;
 + clocks = clock 442;
 + clock-names = apb_pclk;
 + #dma-cells = 1;
 + #dma-channels = 8;
 + #dma-requests = 1;
 + };
 + };
 +
   serial@12C0 {
   clocks = clock 257, clock 128;
   clock-names = uart, clk_uart_baud0;
 --
 1.7.10.4

 Sorry for late response.

 Looks OK to me, many properties for dma are same with 5250 though...

 Applied, thanks.
 - Kukjin

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Re: [PATCH] ARM: dts: Add SPI nodes to the exynos5420 device tree file

2013-12-12 Thread Leela Krishna Amudala
Adding Kukjin's alternate mail

On Thu, Dec 12, 2013 at 8:34 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
 Hi Kukjin,

 Can you kindly look into this patch and take necessary action..?

 Best Wishes,
 Leela Krishna.

 On Tue, Nov 12, 2013 at 9:02 PM, Leela Krishna Amudala
 l.kris...@samsung.com wrote:
 Hi Kukjin,

 Thanks for reviewing the patch.

 On Tue, Nov 12, 2013 at 4:46 PM, Kukjin Kim kg...@kernel.org wrote:
 Leela Krishna Amudala  wrote:

 Add SPI device tree nodes to Exynos5420 SoC

 Signed-off-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Andrew Bresticker abres...@chromium.org
 ---
 Note: This patch is rebased on Kgene's for-next branch and is dependent on
 [V3] ARM: dts: Add DMA controller node info on Exynos5420.
 https://patchwork.kernel.org/patch/2851790/

  arch/arm/boot/dts/exynos5420.dtsi |   51
 +
  1 file changed, 51 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
 index 15465f8..8d9e980 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -27,6 +27,9 @@
   pinctrl2 = pinctrl_2;
   pinctrl3 = pinctrl_3;
   pinctrl4 = pinctrl_4;
 + spi0 = spi_0;
 + spi1 = spi_1;
 + spi2 = spi_2;
   };

   cpus {
 @@ -238,6 +241,54 @@
   };
   };

 + spi_0: spi@12d2 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d2 0x100;
 + interrupts = 0 66 0;
 + dmas = pdma0 5
 + pdma0 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi0_bus;
 + clocks = clock 271, clock 135;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_1: spi@12d3 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d3 0x100;
 + interrupts = 0 67 0;
 + dmas = pdma1 5
 + pdma1 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi1_bus;
 + clocks = clock 272, clock 136;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_2: spi@12d4 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d4 0x100;
 + interrupts = 0 68 0;
 + dmas = pdma0 7
 + pdma0 6;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi2_bus;
 + clocks = clock 273, clock 137;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
   serial@12C0 {
   clocks = clock 257, clock 128;
   clock-names = uart, clk_uart_baud0;
 --
 1.7.10.4

 Leela, do you still want to keep the status 'disabled' for SPIs?


 Yes, the SPI client nodes will make status = okay in board file.

 Best Wishes,
 Leela Krishna.

 Others look good to me.

 Thanks,
 Kukjin

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Re: [PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-12-11 Thread Leela Krishna Amudala
Hi,

As I was in travel not accessed my mails.

I'll try to post next version of this series tomorrow addressing
Sylwester's comments.

Best Wishes,
Leela Krishna.

On Sun, Dec 8, 2013 at 7:20 AM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
 Hi Tomasz,


 On 12/07/2013 01:57 AM, Tomasz Figa wrote:

 On Friday 06 of December 2013 18:22:32 Sylwester Nawrocki wrote:

 [...]

 I wouldn't really nitpick on such things, but if we end up needing another
 respin, here's what I think.


 Yeah, I didn't really realize the iteration index for this series was
 already
 a 2 digit number and some people could have already gotten upset or
 seriously
 impatient. Started to regret I even bothered with posting any comments to
 that.
 :) Anyway, I didn't request any corrections, just pointed out what could be
 improved. People are free to accept it or ignore as they see fit. And having
 seen patch series that got merged after periods like 2.5 year V12 is not
 something unusual anyway. :)


 On 12/06/2013 06:47 AM, Leela Krishna Amudala wrote:

 This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files
 to


 s/pmusysreg/PMU sysreg ? Similarly I would capitalize it in the subject
 line as well.


 Well, since this is supposed to be a human readable description, I would
 go even further and write ...device tree node of Power Management Unit
   to


 Agreed, it sounds better.


 handle PMU register accesses in a centralized way using syscon driver

 Signed-off-by: Leela Krishna Amudalal.kris...@samsung.com
 Reviewed-by: Tomasz Figat.f...@samsung.com
 Reviewed-by: Doug Andersondiand...@chromium.org
 Tested-by: Doug Andersondiand...@chromium.org
 ---
Documentation/devicetree/bindings/arm/samsung/pmu.txt |   15
 +++
arch/arm/boot/dts/exynos5250.dtsi |5 +
arch/arm/boot/dts/exynos5420.dtsi |5 +
3 files changed, 25 insertions(+)
create mode 100644
 Documentation/devicetree/bindings/arm/samsung/pmu.txt

 diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 new file mode 100644
 index 000..f1f1552
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt


 I might be easy to confuse this with ARM Performance Monitoring Unit.
 So perhaps we should rename this file to, e.g. power-management-unit.txt
 ?


 Considering location of this file, which is arm/samsung, I think this
 name is pretty much clear. ARM PMU is a generic thing, so it couldn't
 be placed here.


 It's up to the patch author if they want to change it or not, I still think
 it's better to not use short acronyms like this, if we can easily make it
 unambiguous.


 @@ -0,0 +1,15 @@
 +SAMSUNG Exynos SoC series PMU Registers


 s/PMU/Power Management Unit ?


 s/PMU Registers/Power Management Unit/


 Yeah, that's more accurate.


 +Properties:
 + - compatible : should contain two values. First value must be one from
 following list:
 +  - samsung,exynos5250-pmu - for Exynos5250 SoC,
 +  - samsung,exynos5420-pmu - for Exynos5420 SoC.


 s/./; ?

 +   second value must be always syscon.


 It might be more safe to specify it as the last value, so something along
 the lines of:

 The last value should be syscon.

 +
 + - reg : offset and length of the register set.
 +
 +Example :
 +pmu_system_controller: system-controller@1004 {


 Might be more sensible to use 'power_management_unit' for the label.


 That's quite a lot of text for a label. pmu_syscon as in previous version
 of this patch would look more sensible to me.


 I don't think it hurts to have this long labels, what I proposed is exactly
 of same length as the original one. Anyway pmu_syscon sounds good to me too.


 +   compatible = samsung,exynos5250-pmu, syscon;
 +   reg =0x1004 0x5000;
 +};
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi
 b/arch/arm/boot/dts/exynos5250.dtsi
 index b98ffc3..62f9e36 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -163,6 +163,11 @@
 interrupts =0 47 0;
 };

 +   pmu_system_controller: system-controller@1004 {


 s/pmu_system_controller/power_management_unit ? So it describes the
 subsystem better in terms used in the SoCs User Manual ?


 See above.


 I can't see anything wrong in such long labels, but this discussion is
 really
 just a bike-shedding, so let's end it right now not to risk annoying even
 more
 people! :)

 --
 Regards,
 Sylwester

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[PATCH V12 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-12-05 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V11:
- Added EXYNOS5 prefix to REG_OFFSET defines (suggested by Tomasz)
- NEEDS_PMU_CONFIG = HAS_PMU_CONFIG (suggested by Olof, Guenter)
- Move QUIRK_HAS_PMU_CONFIG check to s3c2410wdt_mask_and_disable_reset 
(suggested by Guenter)

changes since V10:
- followed coding style rules
- removed duplicate error message suggested by Guenter Roeck 
li...@roeck-us.net

changes since V9:
- added descriptions to s3c2410_wdt_variant structure fields
- moved calling s3c2410wdt_mask_and_disable_reset() function above 
s3c2410wdt_start() call in probe
- put dev_err message back to s3c2410wdt_mask_and_disable_reset() 
function
  (suggested by Doug Anderson diand...@chromium.org)

changes since V8:
- modified the patch description for the below patch
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu 
register
- removed MODULE_ALIAS in watchdog driver
- changed dev_warn to dev_err in one failure case handling (suggested 
by Guenter Roeck li...@roeck-us.net)
- renamed variable name from pmu_config to drv_data
- changed the compatible field description in documentation file
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V7:
- re-ordered the patches in the series
- moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
  and limited only this structure to platform match table
- renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
- removed exynos variants from platform match table
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

 .../devicetree/bindings/arm/samsung/pmu.txt|   15 ++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  154 ++--
 7 files changed, 205 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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[PATCH V12 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-12-05 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   15 +++
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..f1f1552
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,15 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - compatible : should contain two values. First value must be one from 
following list:
+  - samsung,exynos5250-pmu - for Exynos5250 SoC,
+  - samsung,exynos5420-pmu - for Exynos5420 SoC.
+   second value must be always syscon.
+
+ - reg : offset and length of the register set.
+
+Example :
+pmu_system_controller: system-controller@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index b98ffc3..62f9e36 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,6 +163,11 @@
interrupts = 0 47 0;
};
 
+   pmu_system_controller: system-controller@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index b1fa334..cd47db0 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -402,4 +402,9 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+   pmu_system_controller: system-controller@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V12 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-12-05 Thread Leela Krishna Amudala
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
interface
to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers 
of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  154 ++--
 3 files changed, 166 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..cfff375 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5be6e91..24738c0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 7d8fd04..e1b1a75 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -40,6 +40,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -60,6 +62,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define EXYNOS5_WDT_DISABLE_REG_OFFSET 0x0408
+#define EXYNOS5_WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_HAS_PMU_CONFIG   (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -83,6 +89,25 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+/**
+ * struct s3c2410_wdt_variant - Per-variant config data
+ *
+ * @disable_reg: Offset in pmureg for the register that disables the watchdog
+ * timer reset functionality.
+ * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
+ * timer reset functionality.
+ * @mask_bit: Bit number for the watchdog timer in the disable register and the
+ * mask reset register.
+ * @quirks: A bitfield of quirks.
+ */
+
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -93,7 +118,49 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *drv_data;
+   struct regmap *pmureg;
+};
+
+static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
+   .quirks = 0
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
+   .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_HAS_PMU_CONFIG
+};
+
+static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
+   .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET

[PATCH V12 3/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-12-05 Thread Leela Krishna Amudala
In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..f1fea28 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 62f9e36..d440a9a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -168,9 +168,13 @@
reg = 0x1004 0x5000;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_system_controller;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index cd47db0..167480c 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -407,4 +407,13 @@
compatible = samsung,exynos5420-pmu, syscon;
reg = 0x1004 0x5000;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_system_controller;
+};
 };
-- 
1.7.10.4

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Re: [PATCH] watchdog: s3c2410_wdt: Report when the watchdog reset the system

2013-12-04 Thread Leela Krishna Amudala
Hi Guenter Roeck,

On Tue, Dec 3, 2013 at 3:06 AM, Guenter Roeck li...@roeck-us.net wrote:

 On Mon, Dec 02, 2013 at 12:47:53PM -0800, Olof Johansson wrote:
  On Mon, Dec 2, 2013 at 12:21 PM, Guenter Roeck li...@roeck-us.net wrote:
   On Mon, Dec 02, 2013 at 10:14:41AM -0800, Doug Anderson wrote:
   A good watchdog driver is supposed to report when it was responsible
   for resetting the system.  Implement this for the s3c2410, at least on
   exynos5250 and exynos5420 where we already have a pointer to the PMU
   registers to read the information.
  
   Signed-off-by: Doug Anderson diand...@chromium.org
   ---
   This patch is based atop Leela Krishna's recent series that ends with
   (ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420)
   AKA https://patchwork.kernel.org/patch/3251861/.
  
drivers/watchdog/s3c2410_wdt.c | 42 
   +++---
1 file changed, 39 insertions(+), 3 deletions(-)
  
   diff --git a/drivers/watchdog/s3c2410_wdt.c 
   b/drivers/watchdog/s3c2410_wdt.c
   index 47f4dcf..2c87d37 100644
   --- a/drivers/watchdog/s3c2410_wdt.c
   +++ b/drivers/watchdog/s3c2410_wdt.c
   @@ -62,9 +62,13 @@
#define CONFIG_S3C2410_WATCHDOG_ATBOOT   (0)
#define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
  
   +#define RST_STAT_REG_OFFSET  0x0404
#define WDT_DISABLE_REG_OFFSET   0x0408
#define WDT_MASK_RESET_REG_OFFSET0x040c
#define QUIRK_NEEDS_PMU_CONFIG   (1  0)
   +#define QUIRK_HAS_RST_STAT   (1  1)
   +#define QUIRKS_NEED_PMUREG   (QUIRK_NEEDS_PMU_CONFIG | \
   +  QUIRK_HAS_RST_STAT)
  
   I am not really happy about the NEED (both of them, really) here.
   How about HAS instead ?
 
  Ah, I just commented on these things on our internal review site too
  on this patch. I don't even think a quirk is needed -- just use the
  presence of a non-0 rst_stat_reg to tell if you need to use regmap.
 
 Agreed; same is true for the QUIRK_NEEDS_PMU_CONFIG related registers
 as well.


As Tomasz Figa suggested I introduced quirks,

Tomasz,
Any comments from you here...??


Best wishes,
Leela Krishna


 Guenter
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[PATCH V10 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-27 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   16 
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..307e727
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,16 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - name : should be 'syscon';
+ - compatible : should contain two values. First value must be one from 
following list:
+  - samsung,exynos5250-pmu - for Exynos5250 SoC,
+  - samsung,exynos5420-pmu - for Exynos5420 SoC.
+   second value must be always syscon.
+
+ - reg : offset and length of the register set.
+
+Example :
+pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..2f264ad 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,6 +163,11 @@
interrupts = 0 47 0;
};
 
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..06e97a7 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -310,4 +310,9 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V10 3/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-11-27 Thread Leela Krishna Amudala
In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d..de6a606 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -102,13 +102,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 2f264ad..54df046 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -168,9 +168,13 @@
reg = 0x1004 0x5000;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 06e97a7..f5a0076 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -315,4 +315,13 @@
compatible = samsung,exynos5420-pmu, syscon;
reg = 0x1004 0x5000;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
 };
-- 
1.7.10.4

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[PATCH V10 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-11-27 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V9:
- added descriptions to s3c2410_wdt_variant structure fields
- moved calling s3c2410wdt_mask_and_disable_reset() function above 
s3c2410wdt_start() call in probe
- put dev_err message back to s3c2410wdt_mask_and_disable_reset() 
function
  (suggested by Doug Anderson diand...@chromium.org)

changes since V8:
- modified the patch description for the below patch
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu 
register
- removed MODULE_ALIAS in watchdog driver
- changed dev_warn to dev_err in one failure case handling (suggested 
by Guenter Roeck li...@roeck-us.net)
- renamed variable name from pmu_config to drv_data
- changed the compatible field description in documentation file
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V7:
- re-ordered the patches in the series
- moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
  and limited only this structure to platform match table
- renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
- removed exynos variants from platform match table
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

 .../devicetree/bindings/arm/samsung/pmu.txt|   16 ++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  164 ++--
 7 files changed, 216 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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[PATCH V10 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-27 Thread Leela Krishna Amudala
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
interface
to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers 
of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  164 ++--
 3 files changed, 176 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..cfff375 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5be6e91..24738c0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 7d8fd04..b00b535 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -40,6 +40,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -60,6 +62,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -83,6 +89,25 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+/**
+ * struct s3c2410_wdt_variant - Per-variant config data
+ *
+ * @disable_reg: Offset in pmureg for the register that disables the watchdog
+ * timer reset functionality.
+ * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
+ * timer reset functionality.
+ * @mask_bit: Bit number for the watchdog timer in the disable register and the
+ * mask reset register.
+ * @quirks: A bitfield of quirks.
+ */
+
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -93,8 +118,50 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *drv_data;
+   struct regmap *pmureg;
+};
+
+static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
+   .quirks = 0
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks

[PATCH V11 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-27 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   16 
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..307e727
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,16 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - name : should be 'syscon';
+ - compatible : should contain two values. First value must be one from 
following list:
+  - samsung,exynos5250-pmu - for Exynos5250 SoC,
+  - samsung,exynos5420-pmu - for Exynos5420 SoC.
+   second value must be always syscon.
+
+ - reg : offset and length of the register set.
+
+Example :
+pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 9db5047..2f264ad 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,6 +163,11 @@
interrupts = 0 47 0;
};
 
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..06e97a7 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -310,4 +310,9 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V11 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-11-27 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V10:
- followed coding style rules
- removed duplicate error message suggested by Guenter Roeck 
li...@roeck-us.net

changes since V9:
- added descriptions to s3c2410_wdt_variant structure fields
- moved calling s3c2410wdt_mask_and_disable_reset() function above 
s3c2410wdt_start() call in probe
- put dev_err message back to s3c2410wdt_mask_and_disable_reset() 
function
  (suggested by Doug Anderson diand...@chromium.org)

changes since V8:
- modified the patch description for the below patch
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu 
register
- removed MODULE_ALIAS in watchdog driver
- changed dev_warn to dev_err in one failure case handling (suggested 
by Guenter Roeck li...@roeck-us.net)
- renamed variable name from pmu_config to drv_data
- changed the compatible field description in documentation file
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V7:
- re-ordered the patches in the series
- moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
  and limited only this structure to platform match table
- renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
- removed exynos variants from platform match table
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

 .../devicetree/bindings/arm/samsung/pmu.txt|   16 ++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  159 ++--
 7 files changed, 211 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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[PATCH V11 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-27 Thread Leela Krishna Amudala
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
interface
to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers 
of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  159 ++--
 3 files changed, 171 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..cfff375 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 5be6e91..24738c0 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 7d8fd04..47f4dcf 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -40,6 +40,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -60,6 +62,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -83,6 +89,25 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+/**
+ * struct s3c2410_wdt_variant - Per-variant config data
+ *
+ * @disable_reg: Offset in pmureg for the register that disables the watchdog
+ * timer reset functionality.
+ * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
+ * timer reset functionality.
+ * @mask_bit: Bit number for the watchdog timer in the disable register and the
+ * mask reset register.
+ * @quirks: A bitfield of quirks.
+ */
+
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -93,8 +118,50 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *drv_data;
+   struct regmap *pmureg;
 };
 
+static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
+   .quirks = 0
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks

[PATCH V11 3/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-11-27 Thread Leela Krishna Amudala
In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d..de6a606 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -102,13 +102,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 2f264ad..54df046 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -168,9 +168,13 @@
reg = 0x1004 0x5000;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 06e97a7..f5a0076 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -315,4 +315,13 @@
compatible = samsung,exynos5420-pmu, syscon;
reg = 0x1004 0x5000;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
 };
-- 
1.7.10.4

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Re: [PATCH V9 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-26 Thread Leela Krishna Amudala
Hi Doug,

Thanks for reviewing the patch series.

On Tue, Nov 26, 2013 at 4:14 AM, Doug Anderson diand...@chromium.org wrote:

 Hi Leela Krishna,

 On Mon, Nov 18, 2013 at 1:49 AM, Leela Krishna Amudala
 l.kris...@samsung.com wrote:
  Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
  interface
  to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST 
  registers of PMU
  to mask/unmask enable/disable of watchdog in probe and s2r scenarios.
 
  Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
  ---
   .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
   drivers/watchdog/Kconfig   |1 +
   drivers/watchdog/s3c2410_wdt.c |  145 
  ++--
   3 files changed, 157 insertions(+), 10 deletions(-)

 ...

  +struct s3c2410_wdt_variant {
  +   int disable_reg;
  +   int mask_reset_reg;
  +   int mask_bit;
  +   u32 quirks;
  +};

 Ideally you could add descriptions.  I added them in a patch based on
 yours 
 https://chromium-review.googlesource.com/#/c/177935/1/drivers/watchdog/s3c2410_wdt.c,
 but since yours hasn't landed perhaps you can do it directly?

 /**
  * struct s3c2410_wdt_variant - Per-variant config data
  *
  * @disable_reg: Offset in pmureg for the register that disables the watchdog
  * timer reset functionality.
  * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
  * timer reset functionality.
  * @mask_bit: Bit number for the watchdog timer in the disable register and 
 the
  * mask reset register.
  * @quirks: A bitfield of quirks.
  */


Okay, Added the above descriptions

  +
   struct s3c2410_wdt {
  struct device   *dev;
  struct clk  *clock;
  @@ -94,7 +107,49 @@ struct s3c2410_wdt {
  unsigned long   wtdat_save;
  struct watchdog_device  wdt_device;
  struct notifier_block   freq_transition;
  +   struct s3c2410_wdt_variant *drv_data;
  +   struct regmap *pmureg;

 Total nit, but everything else in this structure is tab aligned and
 your new elements are not.


Me and Tomasz had a discussion about it and he replied for this comment

   static int s3c2410wdt_probe(struct platform_device *pdev)
   {
  struct device *dev;
  @@ -354,6 +443,16 @@ static int s3c2410wdt_probe(struct platform_device 
  *pdev)
  spin_lock_init(wdt-lock);
  wdt-wdt_device = s3c2410_wdd;
 
  +   wdt-drv_data = get_wdt_drv_data(pdev);
  +   if (wdt-drv_data-quirks  QUIRK_NEEDS_PMU_CONFIG) {
  +   wdt-pmureg = syscon_regmap_lookup_by_phandle(dev-of_node,
  +   
  samsung,syscon-phandle);
  +   if (IS_ERR(wdt-pmureg)) {
  +   dev_err(dev, syscon regmap lookup failed.\n);
  +   return PTR_ERR(wdt-pmureg);

 nit: this function appears to never call return directly.  You'll
 match other error handling better if you do:

 ret = PTR_ERR(wdt-pmureg);
 goto err;

 (if someone else has already said they don't like that, just ignore me).


Will consider Tomasz suggestion for this

  +   }
  +   }
  +
  wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  if (wdt_irq == NULL) {
  dev_err(dev, no irq resource specified\n);
  @@ -444,6 +543,14 @@ static int s3c2410wdt_probe(struct platform_device 
  *pdev)
   (wtcon  S3C2410_WTCON_RSTEN) ? en : dis,
   (wtcon  S3C2410_WTCON_INTEN) ? en : dis);
 
  +   if (wdt-drv_data-quirks  QUIRK_NEEDS_PMU_CONFIG) {
  +   ret = s3c2410wdt_mask_and_disable_reset(wdt, false);
  +   if (ret  0) {
  +   dev_err(wdt-dev, failed to update pmu register);
  +   goto err_cpufreq;
  +   }
  +   }

 There are a few minor problems here:

 1. You're putting a potential failure condition _after_ printing that
 the watchdog is enabled.  You should put your code above the
 dev_info.


Yes moved it like below

static int s3c2410wdt_probe(struct platform_device *pdev)
{

[snip]

if (tmr_atboot  started == 0) {
dev_info(dev, starting watchdog timer\n);
s3c2410wdt_start(wdt-wdt_device);
}
[snip]


 2. Error handling doesn't seem quite right.  If you fail here you'll
 be returning an error but you might have started the watchdog already.
  Perhaps you should be moving the mask_and_disable up a little and
 then you an undo it if needed?


Above mentioned comment will take care of this

 3. I think it would be fine to put the dev_err directly in the
 s3c2410wdt_mask_and_disable_reset() as per Guenter, but still return
 the error code.  You'll still use the error code here, right?


Yes, used dev_err and moved it into s3c2410wdt_mask_and_disable_reset()
and removed the dev_err message in the if (ret  0) check

  +
  return 0

Re: [PATCH V9 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-11-20 Thread Leela Krishna Amudala
Hello Wim Van Sebroeck,

Can you please review this series and take necessary action.

Best Wishes,
Leela Krishna.

On Mon, Nov 18, 2013 at 4:35 PM, Tomasz Figa t.f...@samsung.com wrote:
 Hi Leela,

 On Monday 18 of November 2013 15:19:46 Leela Krishna Amudala wrote:
 This patchset does the following things
   - Adds pmusysreg device node to exynos5.dtsi file
   - Adds watchdog DT nodes to Exynos5250 and 5420
   - Uses syscon regmap interface to configure pmu registers
 to mask/unmask enable/disable of watchdog.

 For the whole series:

 Reviewed-by: Tomasz Figa t.f...@samsung.com

 Best regards,
 Tomasz

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Re: [PATCH V8 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-18 Thread Leela Krishna Amudala
Hi Tomasz,

On Sat, Nov 16, 2013 at 5:13 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 On Tuesday 12 of November 2013 12:04:46 Leela Krishna Amudala wrote:
 This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
 handle PMU register accesses in a centralized way using syscon driver

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Tomasz Figa t.f...@samsung.com
 ---
  Documentation/devicetree/bindings/arm/samsung/pmu.txt |   13 +
  arch/arm/boot/dts/exynos5250.dtsi |5 +
  arch/arm/boot/dts/exynos5420.dtsi |5 +
  3 files changed, 23 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

 diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
 b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 new file mode 100644
 index 000..90f975d
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
 @@ -0,0 +1,13 @@
 +SAMSUNG Exynos SoC series PMU Registers
 +
 +Properties:
 + - name : should be 'syscon';
 + - compatible : should contain samsung,chip name-pmu, syscon;

 AFAIR there was a discussion about using chip name wildcards some
 time ago and if I remember correctly, the conclusion was that the list
 of all supported compatible values should be provided anyway, so there
 is no point in using such wildcards.

 This is how I would write this:

  - compatible : should contain two values. First value must be one from
following list:
  - samsung,exynos5250-pmu - for Exynos5250 SoC,
  - samsung,exynos5420-pmu - for Exynos5420 SoC.
Second value must be always syscon.


Okay, will change it

Best Wishes,
Leela Krishna

 Best regards,
 Tomasz

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Re: [PATCH V8 2/3] watchdog: s3c2410_wdt: add device tree support and use syscon regmap interface to configure pmu register

2013-11-18 Thread Leela Krishna Amudala
Hi Tomasz

On Sat, Nov 16, 2013 at 5:27 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 On Thursday 14 of November 2013 18:49:34 Guenter Roeck wrote:
 On 11/11/2013 10:34 PM, Leela Krishna Amudala wrote:
  Add device tree support and use syscon regmap interface to configure
  AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU
  to mask/unmask enable/disable of watchdog in probe and s2r scenarios.
 
 If the driver didn't support devicetree before, why did it have #ifdef 
 CONFIG_OF, and
 why does its devicetree bindings file already exist ?

 Seems to me the description does not match the patch; it appears that you 
 are really
 adding Exynos5 support to the driver.

 Yes, the driver did support Device Tree before. Patch description needs
 to be corrected.


Okay, modified the patch description

  diff --git a/drivers/watchdog/s3c2410_wdt.c 
  b/drivers/watchdog/s3c2410_wdt.c
  index 23aad7c..ccf755d 100644
  --- a/drivers/watchdog/s3c2410_wdt.c
  +++ b/drivers/watchdog/s3c2410_wdt.c
 [snip]
  +
  +static const struct platform_device_id s3c2410_wdt_ids[] = {
  +   {
  +   .name = s3c2410-wdt,
  +   .driver_data = (unsigned long)pmu_config_s3c2410,
  +   },
  +   {}
  +};
  +MODULE_DEVICE_TABLE(platform, s3c2410_wdt_ids);
  +

 What is this second device ID and MODULE_DEVICE_TABLE for ?
 I assume it is to provide driver_data. If so, you should probably remove the
 platform MODULE_ALIAS at the end of the driver.

 Yes. I suggested adding it to simplify the code a bit by having driver
 data supplied even when booting without DT. Good catch with MODULE_ALIAS,
 though.


Okay, Deleted MODULE_ALIAS and tested non-dt case also on 5420 SoC


/* watchdog control routines */
 
#define DBG(fmt, ...) \
  @@ -111,6 +166,30 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
  notifier_block *nb)
  return container_of(nb, struct s3c2410_wdt, freq_transition);
}
 
  +static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, 
  bool mask)
  +{
  +   int ret;
  +   u32 mask_val = 1  wdt-pmu_config-mask_bit;
  +   u32 val = 0;
  +
  +   if (mask)
  +   val = mask_val;
  +
  +   ret = regmap_update_bits(wdt-pmureg,
  +   wdt-pmu_config-disable_reg,
  +   mask_val, val);
  +   if (ret  0)
  +   return ret;
  +
  +   ret = regmap_update_bits(wdt-pmureg,
  +   wdt-pmu_config-mask_reset_reg,
  +   mask_val, val);
  +   if (ret  0)
  +   return ret;
  +
  +   return 0;

 The above code is identical to
   return ret;

 I'd even say that the above code is identical to

 return regmap_update_bits(wdt-pmureg,
 wdt-pmu_config-mask_reset_reg,
 mask_val, val);


Okay, looks fine changed it


  +}
  +
static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
{
  struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
  @@ -332,6 +411,20 @@ static inline void 
  s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt)
}
#endif
 
  +/* s3c2410_get_wdt_driver_data */
  +static inline struct s3c2410_wdt_variant *
  +get_wdt_drv_data(struct platform_device *pdev)
  +{
  +   if (pdev-dev.of_node) {
  +   const struct of_device_id *match;
  +   match = of_match_node(s3c2410_wdt_match, pdev-dev.of_node);
  +   return (struct s3c2410_wdt_variant *)match-data;
  +   } else {
  +   return (struct s3c2410_wdt_variant *)
  +   platform_get_device_id(pdev)-driver_data;
  +   }
  +}
  +
static int s3c2410wdt_probe(struct platform_device *pdev)
{
  struct device *dev;
  @@ -354,6 +447,16 @@ static int s3c2410wdt_probe(struct platform_device 
  *pdev)
  spin_lock_init(wdt-lock);
  wdt-wdt_device = s3c2410_wdd;
 
  +   wdt-pmu_config = get_wdt_drv_data(pdev);
  +   if (wdt-pmu_config-quirks  QUIRK_NEEDS_PMU_CONFIG) {
  +   wdt-pmureg = syscon_regmap_lookup_by_phandle(dev-of_node,
  +   
  samsung,syscon-phandle);
  +   if (IS_ERR(wdt-pmureg)) {
  +   dev_err(dev, syscon regmap lookup failed.\n);
  +   return PTR_ERR(wdt-pmureg);
  +   }
  +   }
  +
  wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  if (wdt_irq == NULL) {
  dev_err(dev, no irq resource specified\n);
  @@ -444,6 +547,14 @@ static int s3c2410wdt_probe(struct platform_device 
  *pdev)
   (wtcon  S3C2410_WTCON_RSTEN) ? en : dis,
   (wtcon  S3C2410_WTCON_INTEN) ? en : dis);
 
  +   if (wdt-pmu_config-quirks  QUIRK_NEEDS_PMU_CONFIG) {

 Might be easier to check for wdt-pmureg in all those secondary conditionals.

 IMHO not really much easier and less meaningful. Furthermore, in case of
 other quirks showing up in future that wouldn't have alternative way
 of checking, they will have consistent style

[PATCH V9 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-18 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   16 
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..307e727
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,16 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - name : should be 'syscon';
+ - compatible : should contain two values. First value must be one from 
following list:
+  - samsung,exynos5250-pmu - for Exynos5250 SoC,
+  - samsung,exynos5420-pmu - for Exynos5420 SoC.
+   second value must be always syscon.
+
+ - reg : offset and length of the register set.
+
+Example :
+pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..6056a83 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,6 +158,11 @@
interrupts = 0 47 0;
};
 
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..39ce15a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,9 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V9 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-18 Thread Leela Krishna Amudala
Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
interface
to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers 
of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  145 ++--
 3 files changed, 157 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..5dea363 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_sys_reg;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d1d53f3..0d272ae 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..42e0fd3 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,7 +107,49 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *drv_data;
+   struct regmap *pmureg;
+};
+
+static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
+   .quirks = 0
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt,
+ .data = drv_data_s3c2410 },
+   { .compatible = samsung,exynos5250-wdt,
+ .data = drv_data_exynos5250 },
+   { .compatible = samsung,exynos5420-wdt,
+ .data = drv_data_exynos5420 },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
+
+static const struct

[PATCH V9 0/3] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-11-18 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V8:
- modified the patch description for the below patch
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu 
register
- removed MODULE_ALIAS in watchdog driver
- changed dev_warn to dev_err in one failure case handling (suggested 
by Guenter Roeck li...@roeck-us.net)
- renamed variable name from pmu_config to drv_data
- changed the compatible field description in documentation file
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V7:
- re-ordered the patches in the series
- moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
  and limited only this structure to platform match table
- renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
- removed exynos variants from platform match table
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

 .../devicetree/bindings/arm/samsung/pmu.txt|   16 +++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  145 ++--
 7 files changed, 197 insertions(+), 18 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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Re: [PATCH V9 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-18 Thread Leela Krishna Amudala
Hi Guenter Roeck,

Thanks for reviewing the patch.


On Mon, Nov 18, 2013 at 10:12 PM, Guenter Roeck li...@roeck-us.net wrote:
 On Mon, Nov 18, 2013 at 03:19:48PM +0530, Leela Krishna Amudala wrote:
 Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap 
 interface
 to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST 
 registers of PMU
 to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
  drivers/watchdog/Kconfig   |1 +
  drivers/watchdog/s3c2410_wdt.c |  145 
 ++--
  3 files changed, 157 insertions(+), 10 deletions(-)

 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
 b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 index 2aa486c..5dea363 100644
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
 event has not
  occurred.

  Required properties:
 -- compatible : should be samsung,s3c2410-wdt
 +- compatible : should be one among the following
 + (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
 + (b) samsung,exynos5250-wdt for Exynos5250
 + (c) samsung,exynos5420-wdt for Exynos5420
 +
  - reg : base physical address of the controller and length of memory mapped
   region.
  - interrupts : interrupt number to the cpu.
 +- samsung,syscon-phandle : reference to syscon node (This property required 
 only
 + in case of compatible being samsung,exynos5250-wdt or 
 samsung,exynos5420-wdt.
 + In case of Exynos5250 and 5420 this property points to syscon node 
 holding the PMU
 + base address)

  Optional properties:
  - timeout-sec : contains the watchdog timeout in seconds.
 +
 +Example:
 +
 +watchdog@101D {
 + compatible = samsung,exynos5250-wdt;
 + reg = 0x101D 0x100;
 + interrupts = 0 42 0;
 + clocks = clock 336;
 + clock-names = watchdog;
 + samsung,syscon-phandle = pmu_sys_reg;
 +};
 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
 index d1d53f3..0d272ae 100644
 --- a/drivers/watchdog/Kconfig
 +++ b/drivers/watchdog/Kconfig
 @@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
   tristate S3C2410 Watchdog
   depends on HAVE_S3C2410_WATCHDOG
   select WATCHDOG_CORE
 + select MFD_SYSCON if ARCH_EXYNOS5
   help
 Watchdog timer block in the Samsung SoCs. This will reboot
 the system when the timer expires with the watchdog enabled.
 diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
 index 23aad7c..42e0fd3 100644
 --- a/drivers/watchdog/s3c2410_wdt.c
 +++ b/drivers/watchdog/s3c2410_wdt.c
 @@ -41,6 +41,8 @@
  #include linux/slab.h
  #include linux/err.h
  #include linux/of.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h

  #define S3C2410_WTCON0x00
  #define S3C2410_WTDAT0x04
 @@ -61,6 +63,10 @@
  #define CONFIG_S3C2410_WATCHDOG_ATBOOT   (0)
  #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)

 +#define WDT_DISABLE_REG_OFFSET   0x0408
 +#define WDT_MASK_RESET_REG_OFFSET0x040c
 +#define QUIRK_NEEDS_PMU_CONFIG   (1  0)
 +
  static bool nowayout = WATCHDOG_NOWAYOUT;
  static int tmr_margin;
  static int tmr_atboot= CONFIG_S3C2410_WATCHDOG_ATBOOT;
 @@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 
 to ignore reboots, 
   0 to reboot (default 0));
  MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));

 +struct s3c2410_wdt_variant {
 + int disable_reg;
 + int mask_reset_reg;
 + int mask_bit;
 + u32 quirks;
 +};
 +
  struct s3c2410_wdt {
   struct device   *dev;
   struct clk  *clock;
 @@ -94,7 +107,49 @@ struct s3c2410_wdt {
   unsigned long   wtdat_save;
   struct watchdog_device  wdt_device;
   struct notifier_block   freq_transition;
 + struct s3c2410_wdt_variant *drv_data;
 + struct regmap *pmureg;
 +};
 +
 +static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
 + .quirks = 0
 +};
 +
 +#ifdef CONFIG_OF
 +static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 20,
 + .quirks = QUIRK_NEEDS_PMU_CONFIG
 +};
 +
 +static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 0,
 + .quirks = QUIRK_NEEDS_PMU_CONFIG
 +};
 +
 +static const struct of_device_id s3c2410_wdt_match[] = {
 + { .compatible = samsung,s3c2410-wdt,
 +   .data = drv_data_s3c2410

Re: [PATCH V9 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-18 Thread Leela Krishna Amudala
Hi Guenter Roeck,

On Tue, Nov 19, 2013 at 10:30 AM, Guenter Roeck li...@roeck-us.net wrote:
 On 11/18/2013 08:36 PM, Leela Krishna Amudala wrote:

 Hi Guenter Roeck,

 Thanks for reviewing the patch.


 On Mon, Nov 18, 2013 at 10:12 PM, Guenter Roeck li...@roeck-us.net
 wrote:

 On Mon, Nov 18, 2013 at 03:19:48PM +0530, Leela Krishna Amudala wrote:

 Add device tree support for exynos5250 and 5420 SoCs and use syscon
 regmap interface
 to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST
 registers of PMU
 to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
   .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
   drivers/watchdog/Kconfig   |1 +
   drivers/watchdog/s3c2410_wdt.c |  145
 ++--
   3 files changed, 157 insertions(+), 10 deletions(-)

 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 index 2aa486c..5dea363 100644
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -5,10 +5,29 @@ after a preset amount of time during which the WDT
 reset event has not
   occurred.

   Required properties:
 -- compatible : should be samsung,s3c2410-wdt
 +- compatible : should be one among the following
 + (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
 + (b) samsung,exynos5250-wdt for Exynos5250
 + (c) samsung,exynos5420-wdt for Exynos5420
 +
   - reg : base physical address of the controller and length of memory
 mapped
region.
   - interrupts : interrupt number to the cpu.
 +- samsung,syscon-phandle : reference to syscon node (This property
 required only
 + in case of compatible being samsung,exynos5250-wdt or
 samsung,exynos5420-wdt.
 + In case of Exynos5250 and 5420 this property points to syscon node
 holding the PMU
 + base address)

   Optional properties:
   - timeout-sec : contains the watchdog timeout in seconds.
 +
 +Example:
 +
 +watchdog@101D {
 + compatible = samsung,exynos5250-wdt;
 + reg = 0x101D 0x100;
 + interrupts = 0 42 0;
 + clocks = clock 336;
 + clock-names = watchdog;
 + samsung,syscon-phandle = pmu_sys_reg;
 +};
 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
 index d1d53f3..0d272ae 100644
 --- a/drivers/watchdog/Kconfig
 +++ b/drivers/watchdog/Kconfig
 @@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
 + select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
 diff --git a/drivers/watchdog/s3c2410_wdt.c
 b/drivers/watchdog/s3c2410_wdt.c
 index 23aad7c..42e0fd3 100644
 --- a/drivers/watchdog/s3c2410_wdt.c
 +++ b/drivers/watchdog/s3c2410_wdt.c
 @@ -41,6 +41,8 @@
   #include linux/slab.h
   #include linux/err.h
   #include linux/of.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h

   #define S3C2410_WTCON0x00
   #define S3C2410_WTDAT0x04
 @@ -61,6 +63,10 @@
   #define CONFIG_S3C2410_WATCHDOG_ATBOOT   (0)
   #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)

 +#define WDT_DISABLE_REG_OFFSET   0x0408
 +#define WDT_MASK_RESET_REG_OFFSET0x040c
 +#define QUIRK_NEEDS_PMU_CONFIG   (1  0)
 +
   static bool nowayout = WATCHDOG_NOWAYOUT;
   static int tmr_margin;
   static int tmr_atboot= CONFIG_S3C2410_WATCHDOG_ATBOOT;
 @@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set
 to 1 to ignore reboots, 
0 to reboot (default 0));
   MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default
 0));

 +struct s3c2410_wdt_variant {
 + int disable_reg;
 + int mask_reset_reg;
 + int mask_bit;
 + u32 quirks;
 +};
 +
   struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
 @@ -94,7 +107,49 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
 + struct s3c2410_wdt_variant *drv_data;
 + struct regmap *pmureg;
 +};
 +
 +static const struct s3c2410_wdt_variant drv_data_s3c2410 = {
 + .quirks = 0
 +};
 +
 +#ifdef CONFIG_OF
 +static const struct s3c2410_wdt_variant drv_data_exynos5250  = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 20,
 + .quirks = QUIRK_NEEDS_PMU_CONFIG
 +};
 +
 +static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 0

Re: [PATCH] ARM: dts: Add missing GPIO entries for sd_bus in

2013-11-12 Thread Leela Krishna Amudala
Hi Sachin,

On Tue, Nov 12, 2013 at 3:53 PM, Kukjin Kim kg...@kernel.org wrote:
 Sachin Kamat wrote:


 Following is more clear?

 ARM: dts: Add missing GPIO entries for sd_bus_width4 in exynos5420-pinctrl

 Adds missing GPIO entries for sd_bus nodes in exynos5420-pinctrl.


This is not a missing stuff, I did this purposefully.
Myself and Doug anderson discussed on this and the objective of doing this is to
eliminate the gpio pin configuration multiple times.

Please see the below explanation

The current code in main line kernel shows like
   sd0_bus1: sd0-bus-width1 {
   samsung,pins = gpc0-3;
 };

   sd0_bus4: sd0-bus-width4 {
   samsung,pins = gpc0-4, gpc0-5, gpc0-6;
   };

   sd0_bus8: sd0-bus-width8 {
   samsung,pins = gpc3-0, gpc3-1, gpc3-2, gpc3-3;
   };

and lets mmc wants to use 8 bit width then node should be like below

dwmmc0@1220 {
[snip]
pinctrl-names = default;
pinctrl-0 = sd0_clk sd0_cmd sd0_bus1 sd0_bus4 sd0_bus8;

Here it will configure all the 8 pins (gpc0-3, gpc0-4, gpc0-5,
gpc0-6, gpc3-0, gpc3-1, gpc3-2, gpc3-3)

slot@0 {
reg = 0;
bus-width = 8;
};
};

Similarly for using 1 bit width the property value should be like below
   pinctrl-0 = sd0_clk sd0_cmd sd0_bus1;

and if other mmc wants to use 4 bit width the property value should be
like below
   pinctrl-0 = sd0_clk sd0_cmd sd0_bus1 sd0_bus4;

But with the changes you made and if one mmc wants to use 1 bit width
and other wants to use 4 bit width
the pin gpc0-3 will be configured twice which is wrong.

So, I strongly feel it is better to change the existing mmc node
instead of changing the sd0_bus entries

Best Wishes,
Leela Krishna.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Signed-off-by: Tushar Behera tushar.beh...@linaro.org
 ---
  arch/arm/boot/dts/exynos5420-pinctrl.dtsi |6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
 b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
 index e695aba..fcb8206 100644
 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
 +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
 @@ -181,7 +181,7 @@
   };

   sd0_bus4: sd0-bus-width4 {
 - samsung,pins = gpc0-4, gpc0-5, gpc0-6;
 + samsung,pins = gpc0-3, gpc0-4, gpc0-5,
 gpc0-6;
   samsung,pin-function = 2;
   samsung,pin-pud = 3;
   samsung,pin-drv = 3;
 @@ -230,7 +230,7 @@
   };

   sd1_bus4: sd1-bus-width4 {
 - samsung,pins = gpc1-4, gpc1-5, gpc1-6;
 + samsung,pins = gpc1-3, gpc1-4, gpc1-5,
 gpc1-6;
   samsung,pin-function = 2;
   samsung,pin-pud = 3;
   samsung,pin-drv = 3;
 @@ -272,7 +272,7 @@
   };

   sd2_bus4: sd2-bus-width4 {
 - samsung,pins = gpc2-4, gpc2-5, gpc2-6;
 + samsung,pins = gpc2-3, gpc2-4, gpc2-5,
 gpc2-6;
   samsung,pin-function = 2;
   samsung,pin-pud = 3;
   samsung,pin-drv = 3;
 --
 1.7.9.5

 Looks ok to me, applied with updating title.

 Thanks,
 Kukjin

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Re: [PATCH] ARM: dts: Add SPI nodes to the exynos5420 device tree file

2013-11-12 Thread Leela Krishna Amudala
Hi Kukjin,

Thanks for reviewing the patch.

On Tue, Nov 12, 2013 at 4:46 PM, Kukjin Kim kg...@kernel.org wrote:
 Leela Krishna Amudala  wrote:

 Add SPI device tree nodes to Exynos5420 SoC

 Signed-off-by: Doug Anderson diand...@chromium.org
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 Reviewed-by: Andrew Bresticker abres...@chromium.org
 ---
 Note: This patch is rebased on Kgene's for-next branch and is dependent on
 [V3] ARM: dts: Add DMA controller node info on Exynos5420.
 https://patchwork.kernel.org/patch/2851790/

  arch/arm/boot/dts/exynos5420.dtsi |   51
 +
  1 file changed, 51 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi
 index 15465f8..8d9e980 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -27,6 +27,9 @@
   pinctrl2 = pinctrl_2;
   pinctrl3 = pinctrl_3;
   pinctrl4 = pinctrl_4;
 + spi0 = spi_0;
 + spi1 = spi_1;
 + spi2 = spi_2;
   };

   cpus {
 @@ -238,6 +241,54 @@
   };
   };

 + spi_0: spi@12d2 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d2 0x100;
 + interrupts = 0 66 0;
 + dmas = pdma0 5
 + pdma0 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi0_bus;
 + clocks = clock 271, clock 135;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_1: spi@12d3 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d3 0x100;
 + interrupts = 0 67 0;
 + dmas = pdma1 5
 + pdma1 4;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi1_bus;
 + clocks = clock 272, clock 136;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
 + spi_2: spi@12d4 {
 + compatible = samsung,exynos4210-spi;
 + reg = 0x12d4 0x100;
 + interrupts = 0 68 0;
 + dmas = pdma0 7
 + pdma0 6;
 + dma-names = tx, rx;
 + #address-cells = 1;
 + #size-cells = 0;
 + pinctrl-names = default;
 + pinctrl-0 = spi2_bus;
 + clocks = clock 273, clock 137;
 + clock-names = spi, spi_busclk0;
 + status = disabled;
 + };
 +
   serial@12C0 {
   clocks = clock 257, clock 128;
   clock-names = uart, clk_uart_baud0;
 --
 1.7.10.4

 Leela, do you still want to keep the status 'disabled' for SPIs?


Yes, the SPI client nodes will make status = okay in board file.

Best Wishes,
Leela Krishna.

 Others look good to me.

 Thanks,
 Kukjin

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[PATCH V7 3/3] watchdog: s3c2410_wdt: add device tree support and use syscon regmap interface to configure pmu register

2013-11-11 Thread Leela Krishna Amudala
Add device tree support and use syscon regmap interface to configure
AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  154 +++-
 3 files changed, 167 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..5dea363 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_sys_reg;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d1d53f3..0d272ae 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..b57ccae 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,8 +107,56 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *pmu_config;
+   struct regmap *pmureg;
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant pmu_config_s3c2410 = {
+   .quirks = 0
+};
+
+static const struct s3c2410_wdt_variant pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
 };
 
+static const struct s3c2410_wdt_variant pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt,
+ .data = pmu_config_s3c2410 },
+   { .compatible = samsung,exynos5250-wdt,
+ .data = pmu_config_5250 },
+   { .compatible = samsung,exynos5420-wdt,
+ .data = pmu_config_5420 },
+   {},
+};
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
+
+static const struct platform_device_id s3c_wdt_driver_ids

[PATCH V7 2/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-11-11 Thread Leela Krishna Amudala
In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..f1fea28 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 6056a83..69f6c6a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,9 +163,13 @@
reg = 0x1004 0x5000;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 39ce15a..61764bb 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -374,4 +374,13 @@
compatible = samsung,exynos5420-pmu, syscon;
reg = 0x1004 0x5000;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
 };
-- 
1.7.10.4

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[PATCH V7 0/3] Add watchdog DT nodes and use syscon regmap interfac to configure pmu registers

2013-11-11 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: add device tree support and use syscon
regmap interface to configure pmu register

 .../devicetree/bindings/arm/samsung/pmu.txt|   13 ++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  154 +++-
 7 files changed, 204 insertions(+), 17 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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[PATCH V7 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-11 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   13 +
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..90f975d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,13 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - name : should be 'syscon';
+ - compatible : should contain samsung,chip name-pmu, syscon;
+   For Exynos5250 SoC it should be samsung,exynos5250-pmu, syscon;
+ - reg : offset and length of the register set.
+
+Example :
+pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..6056a83 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,6 +158,11 @@
interrupts = 0 47 0;
};
 
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..39ce15a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,9 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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Re: [PATCH V7 2/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-11-11 Thread Leela Krishna Amudala
Hi Tomasz,

On Mon, Nov 11, 2013 at 6:36 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Leela,

 On Monday 11 of November 2013 18:14:56 Leela Krishna Amudala wrote:
 In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
 watchdog timer which is not the case with s3c series SoCs so, there is a
 need to have different compatible names for watchdog to handle these pmu
 registers access.

 Hence this patch removes watchdog node from Exynos5.dtsi common file and
 make it separate by updating existing node in Exynos5250 and adding new node
 to Exynos5420. This patch also makes the watchdog node enabled by default

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5.dtsi|7 ---
  arch/arm/boot/dts/exynos5250.dtsi |6 +-
  arch/arm/boot/dts/exynos5420.dtsi |9 +
  3 files changed, 14 insertions(+), 8 deletions(-)

 This patch should go as the last in this series, because otherwise it
 would change DTS files to use compatible values that are not yet
 supported.


Okay, will make it as last patch in the series

Best Wishes,
Leela Krishna

 The patch itself is fine, so

 Reviewed-by: Tomasz Figa t.f...@samsung.com

 Best regards,
 Tomasz

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Re: [PATCH V7 3/3] watchdog: s3c2410_wdt: add device tree support and use syscon regmap interface to configure pmu register

2013-11-11 Thread Leela Krishna Amudala
Hi Tomasz,

Thanks for reviewing the patch

On Mon, Nov 11, 2013 at 6:53 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Leela,

 Thanks for addressing my comments for previous version. However now this
 won't even build when CONFIG_OF is disabled. See my comments inline.


Yes, you are right, I didn't compile it disabling CONFIG_OF

 On Monday 11 of November 2013 18:14:57 Leela Krishna Amudala wrote:
 Add device tree support and use syscon regmap interface to configure
 AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU
 to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
  drivers/watchdog/Kconfig   |1 +
  drivers/watchdog/s3c2410_wdt.c |  154 
 +++-
  3 files changed, 167 insertions(+), 9 deletions(-)
 [snip]
 diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
 index 23aad7c..b57ccae 100644
 --- a/drivers/watchdog/s3c2410_wdt.c
 +++ b/drivers/watchdog/s3c2410_wdt.c
 [snip]
 @@ -94,8 +107,56 @@ struct s3c2410_wdt {
   unsigned long   wtdat_save;
   struct watchdog_device  wdt_device;
   struct notifier_block   freq_transition;
 + struct s3c2410_wdt_variant *pmu_config;
 + struct regmap *pmureg;
 +};
 +
 +#ifdef CONFIG_OF
 +static const struct s3c2410_wdt_variant pmu_config_s3c2410 = {
 + .quirks = 0
 +};
 +
 +static const struct s3c2410_wdt_variant pmu_config_5250  = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 20,
 + .quirks = QUIRK_NEEDS_PMU_CONFIG
  };

 +static const struct s3c2410_wdt_variant pmu_config_5420 = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 0,
 + .quirks = QUIRK_NEEDS_PMU_CONFIG
 +};

 The three variant data structs above are under #ifdef CONFIG_OF, while
 they are always needed for the platform match table.

 However, since Exynos supports only DT-based device instantation,
 I would move only the basic pmu_config_s3c2410 out of the ifdef and
 limit the platform match table only to this single variant.


Okay, Taken care

 +
 +static const struct of_device_id s3c2410_wdt_match[] = {
 + { .compatible = samsung,s3c2410-wdt,
 +   .data = pmu_config_s3c2410 },
 + { .compatible = samsung,exynos5250-wdt,
 +   .data = pmu_config_5250 },
 + { .compatible = samsung,exynos5420-wdt,
 +   .data = pmu_config_5420 },
 + {},
 +};
 +MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
 +#endif
 +
 +static const struct platform_device_id s3c_wdt_driver_ids[] = {

 nit: For consistency with other names in this file, what about
 calling this s3c2410_wdt_ids[] instead?


Okay, modified

 + {
 + .name = s3c2410-wdt,
 + .driver_data = (unsigned long)pmu_config_s3c2410,
 + }, {
 + .name = exynos5250-wdt,
 + .driver_data = (unsigned long)pmu_config_5250,
 + }, {
 + .name = exynos5420-wdt,
 + .driver_data = (unsigned long)pmu_config_5420,
 + },

 So, generally, you don't need the two Exynos variants above in this array.


Yes, removed from the array

Best Wishes,
Leela Krishna

 Otherwise, the patch is fine.

 Best regards,
 Tomasz

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[PATCH V8 3/3] ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

2013-11-11 Thread Leela Krishna Amudala
In Exynos5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..f1fea28 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 6056a83..69f6c6a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,9 +163,13 @@
reg = 0x1004 0x5000;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 39ce15a..61764bb 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -374,4 +374,13 @@
compatible = samsung,exynos5420-pmu, syscon;
reg = 0x1004 0x5000;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
 };
-- 
1.7.10.4

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[PATCH V8 0/3] Add watchdog DT nodes and use syscon regmap interfac to configure pmu registers

2013-11-11 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

changes since V7:
- re-ordered the patches in the series
- moved pmu_config_s3c2410 structure out of ifdef CONFIG_OF
  and limited only this structure to platform match table
- renamed structure name from s3c_wdt_driver_ids to s3c2410_wdt_ids
- removed exynos variants from platform match table
  (suggested by Tomasz Figa t.f...@samsung.com)

changes since V6:
- added SoC-specific compatible value to syscon node and documented it
- given more patch description for below patch
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420
- added platform_device_id array for watchdog devices
- selected MFD_SYSCON in Kconfig entry for watchdog

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files
  watchdog: s3c2410_wdt: add device tree support and use syscon regmap
interface to configure pmu register
  ARM: dts: update watchdog device nodes for Exynos5250 and Exynos5420

 .../devicetree/bindings/arm/samsung/pmu.txt|   13 ++
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |7 -
 arch/arm/boot/dts/exynos5250.dtsi  |   11 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   14 ++
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  148 ++--
 7 files changed, 198 insertions(+), 17 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

-- 
1.7.10.4

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[PATCH V8 1/3] ARM: dts: Add pmu sysreg node to exynos5250 and exynos5420 dtsi files

2013-11-11 Thread Leela Krishna Amudala
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 Documentation/devicetree/bindings/arm/samsung/pmu.txt |   13 +
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt 
b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000..90f975d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,13 @@
+SAMSUNG Exynos SoC series PMU Registers
+
+Properties:
+ - name : should be 'syscon';
+ - compatible : should contain samsung,chip name-pmu, syscon;
+   For Exynos5250 SoC it should be samsung,exynos5250-pmu, syscon;
+ - reg : offset and length of the register set.
+
+Example :
+pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..6056a83 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,6 +158,11 @@
interrupts = 0 47 0;
};
 
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5250-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
+
watchdog {
clocks = clock 336;
clock-names = watchdog;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..39ce15a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,9 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = samsung,exynos5420-pmu, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V8 2/3] watchdog: s3c2410_wdt: add device tree support and use syscon regmap interface to configure pmu register

2013-11-11 Thread Leela Krishna Amudala
Add device tree support and use syscon regmap interface to configure
AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU
to mask/unmask enable/disable of watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/Kconfig   |1 +
 drivers/watchdog/s3c2410_wdt.c |  148 ++--
 3 files changed, 161 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..5dea363 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_sys_reg;
+};
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d1d53f3..0d272ae 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -188,6 +188,7 @@ config S3C2410_WATCHDOG
tristate S3C2410 Watchdog
depends on HAVE_S3C2410_WATCHDOG
select WATCHDOG_CORE
+   select MFD_SYSCON if ARCH_EXYNOS5
help
  Watchdog timer block in the Samsung SoCs. This will reboot
  the system when the timer expires with the watchdog enabled.
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..ccf755d 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,8 +107,50 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *pmu_config;
+   struct regmap *pmureg;
+};
+
+static const struct s3c2410_wdt_variant pmu_config_s3c2410 = {
+   .quirks = 0
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
 };
 
+static const struct s3c2410_wdt_variant pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt,
+ .data = pmu_config_s3c2410 },
+   { .compatible = samsung,exynos5250-wdt,
+ .data = pmu_config_5250 },
+   { .compatible = samsung,exynos5420-wdt,
+ .data = pmu_config_5420 },
+   {},
+};
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
+
+static const struct platform_device_id s3c2410_wdt_ids

[PATCH V6 1/3] ARM: dts: Add pmu sysreg node to Exynos5 dtsi file

2013-11-07 Thread Leela Krishna Amudala
This patch adds pmusysreg node to Exynos5 dtsi file to handle PMU
register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Tomasz Figa t.f...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi |5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..ad6e47c9 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -106,4 +106,9 @@
#size-cells = 0;
status = disabled;
};
+
+   pmu_syscon: syscon@1004 {
+   compatible = syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V6 3/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-11-07 Thread Leela Krishna Amudala
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 drivers/watchdog/s3c2410_wdt.c |  139 ++--
 2 files changed, 151 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..5dea363 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,syscon-phandle : reference to syscon node (This property required 
only
+   in case of compatible being samsung,exynos5250-wdt or 
samsung,exynos5420-wdt.
+   In case of Exynos5250 and 5420 this property points to syscon node 
holding the PMU
+   base address)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_sys_reg;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..a151c20 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct s3c2410_wdt_variant {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+   u32 quirks;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,7 +107,40 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct s3c2410_wdt_variant *pmu_config;
+   struct regmap *pmureg;
+};
+
+#ifdef CONFIG_OF
+static const struct s3c2410_wdt_variant pmu_config_s3c2410 = {
+   .quirks = 0
+};
+
+static const struct s3c2410_wdt_variant pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct s3c2410_wdt_variant pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0,
+   .quirks = QUIRK_NEEDS_PMU_CONFIG
+};
+
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt,
+ .data = pmu_config_s3c2410 },
+   { .compatible = samsung,exynos5250-wdt,
+ .data = pmu_config_5250 },
+   { .compatible = samsung,exynos5420-wdt,
+ .data = pmu_config_5420 },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
 
 /* watchdog control routines */
 
@@ -111,6 +157,30 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool 
mask)
+{
+   int ret;
+   u32 mask_val = 1  wdt-pmu_config-mask_bit;
+   u32 val = 0;
+
+   if (mask)
+   val = mask_val;
+
+   ret = regmap_update_bits(wdt-pmureg,
+   wdt-pmu_config-disable_reg,
+   mask_val, val);
+   if (ret  0)
+   return ret;
+
+   ret

[PATCH V6 2/3] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-11-07 Thread Leela Krishna Amudala
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |6 +-
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 3 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index ad6e47c9..e6ab5d9 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..42b8682 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,13 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..4f5fda3 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,13 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+};
 };
-- 
1.7.10.4

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[PATCH V6 0/3] Add watchdog DT nodes and use syscon regmap interfac to configure pmu registers

2013-11-07 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V5:
- removed status property in DT nodes
- changed the return type for the function 
s3c2410wdt_mask_and_disable_reset()
  and handled error cases
- Handled to get driver data in non-DT cases
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to Exynos5 dtsi file
  ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   21 ++-
 arch/arm/boot/dts/exynos5.dtsi |   12 +-
 arch/arm/boot/dts/exynos5250.dtsi  |6 +-
 arch/arm/boot/dts/exynos5420.dtsi  |9 ++
 drivers/watchdog/s3c2410_wdt.c |  139 ++--
 5 files changed, 170 insertions(+), 17 deletions(-)

-- 
1.7.10.4

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[PATCH 0/2] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-10-30 Thread Leela Krishna Amudala
This patchset does the following things
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (2):
  ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   13 ++-
 arch/arm/boot/dts/exynos5.dtsi |   12 +--
 arch/arm/boot/dts/exynos5250.dtsi  |7 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   10 ++
 drivers/watchdog/s3c2410_wdt.c |  114 ++--
 5 files changed, 139 insertions(+), 17 deletions(-)

-- 
1.7.10.4

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[PATCH 1/2] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-10-30 Thread Leela Krishna Amudala
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|   12 +---
 arch/arm/boot/dts/exynos5250.dtsi |7 ++-
 arch/arm/boot/dts/exynos5420.dtsi |   10 ++
 3 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..e7b6dbd 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
@@ -106,4 +99,9 @@
#size-cells = 0;
status = disabled;
};
+
+   pmu_sys_reg: pmusysreg {
+   compatible = samsung,exynos5-pmureg, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..3ccd150 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,14 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,s3c5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..5fb7ae2 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,14 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+watchdog@101D {
+   compatible = samsung,s3c5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
+};
 };
-- 
1.7.10.4

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[PATCH 2/2] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-10-30 Thread Leela Krishna Amudala
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   13 ++-
 drivers/watchdog/s3c2410_wdt.c |  114 ++--
 2 files changed, 118 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..c46c7ce 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,21 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be samsung,s3c2410-wdt or samsung,s3c5250-wdt or 
samsung,s3c5420-wdt
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,pmusysreg : reference node to pmu sysreg (required only in case of 
Exynos5250 and 5420)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+watchdog@101D {
+   compatible = samsung,s3c5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..2a3429c 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,12 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct pmu_config {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,7 +106,34 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct pmu_config   *wdt_pmu_config;
+   struct regmap   *pmureg;
+   unsigned intquirks;
+};
+
+static struct pmu_config pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20
+};
+
+static struct pmu_config pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt },
+   { .compatible = samsung,s3c5250-wdt,
+ .data = (struct pmu_config *) pmu_config_5250 },
+   { .compatible = samsung,s3c5420-wdt,
+ .data = (struct pmu_config *) pmu_config_5420 },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
 
 /* watchdog control routines */
 
@@ -111,6 +150,40 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
*wdt)
+{
+   unsigned int disable, mask_reset;
+   int ret;
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-disable_reg,
+   disable);
+   if (ret  0) {
+   dev_err(wdt-dev, %s:%d fail to read disable reg(%d)\n,
+   __func__, __LINE__, ret);
+   return;
+   }
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-mask_reset_reg,
+   mask_reset);
+   if (ret  0) {
+   dev_err(wdt-dev, %s:%d fail to read mask reset reg(%d)\n,
+   __func__, __LINE__, ret);
+   return;
+   }
+
+   if (mask) {
+   disable |= (1  wdt-wdt_pmu_config-mask_bit

[RESEND] [PATCH V3 1/2] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-10-30 Thread Leela Krishna Amudala
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|   12 +---
 arch/arm/boot/dts/exynos5250.dtsi |7 ++-
 arch/arm/boot/dts/exynos5420.dtsi |   10 ++
 3 files changed, 21 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..e7b6dbd 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
@@ -106,4 +99,9 @@
#size-cells = 0;
status = disabled;
};
+
+   pmu_sys_reg: pmusysreg {
+   compatible = samsung,exynos5-pmureg, syscon;
+   reg = 0x1004 0x5000;
+   };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..3ccd150 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,14 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,s3c5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..5fb7ae2 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,14 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+watchdog@101D {
+   compatible = samsung,s3c5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
+};
 };
-- 
1.7.10.4

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[RESEND] [PATCH V3 2/2] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-10-30 Thread Leela Krishna Amudala
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   13 ++-
 drivers/watchdog/s3c2410_wdt.c |  114 ++--
 2 files changed, 118 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..c46c7ce 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,21 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be samsung,s3c2410-wdt or samsung,s3c5250-wdt or 
samsung,s3c5420-wdt
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,pmusysreg : reference node to pmu sysreg (required only in case of 
Exynos5250 and 5420)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+watchdog@101D {
+   compatible = samsung,s3c5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..2a3429c 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,12 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct pmu_config {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,7 +106,34 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct pmu_config   *wdt_pmu_config;
+   struct regmap   *pmureg;
+   unsigned intquirks;
+};
+
+static struct pmu_config pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20
+};
+
+static struct pmu_config pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt },
+   { .compatible = samsung,s3c5250-wdt,
+ .data = (struct pmu_config *) pmu_config_5250 },
+   { .compatible = samsung,s3c5420-wdt,
+ .data = (struct pmu_config *) pmu_config_5420 },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
 
 /* watchdog control routines */
 
@@ -111,6 +150,40 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
*wdt)
+{
+   unsigned int disable, mask_reset;
+   int ret;
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-disable_reg,
+   disable);
+   if (ret  0) {
+   dev_err(wdt-dev, %s:%d fail to read disable reg(%d)\n,
+   __func__, __LINE__, ret);
+   return;
+   }
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-mask_reset_reg,
+   mask_reset);
+   if (ret  0) {
+   dev_err(wdt-dev, %s:%d fail to read mask reset reg(%d)\n,
+   __func__, __LINE__, ret);
+   return;
+   }
+
+   if (mask) {
+   disable |= (1  wdt-wdt_pmu_config-mask_bit

[RESEND] [PATCH V3 0/2] Add watchdog DT nodes and use syscon regmap interface to configure pmu registers

2013-10-30 Thread Leela Krishna Amudala
This patchset does the following things
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (2):
  ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   13 ++-
 arch/arm/boot/dts/exynos5.dtsi |   12 +--
 arch/arm/boot/dts/exynos5250.dtsi  |7 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   10 ++
 drivers/watchdog/s3c2410_wdt.c |  114 ++--
 5 files changed, 139 insertions(+), 17 deletions(-)

-- 
1.7.10.4

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Re: [PATCH Resend 1/1] Documentation/watchdog: Add binding example in samsung-wdt

2013-10-30 Thread Leela Krishna Amudala
Hi Sachin,

On Wed, Oct 30, 2013 at 10:56 AM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Added an example for reference.

 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |9 +
  1 file changed, 9 insertions(+)

 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
 b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 index 2aa486c..7ddf461 100644
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -12,3 +12,12 @@ Required properties:

  Optional properties:
  - timeout-sec : contains the watchdog timeout in seconds.
 +
 +Example:
 +
 +watchdog@101D {
 +   compatible = samsung,s3c2410-wdt;
 +   reg = 0x101D 0x100;
 +   interrupts = 0 42 0;
 +   status = disabled;
 +};

This example node has been changed and I posted the latest version.
So, you can abandon this patch now.

Best Wishes,
Leela Krishna

 --
 1.7.9.5

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Re: [PATCH 2/2] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-10-30 Thread Leela Krishna Amudala
Hi Sachin,

Thanks for reviewing the patch

On Wed, Oct 30, 2013 at 12:33 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
 On 30 October 2013 12:23, Leela Krishna Amudala l.kris...@samsung.com wrote:
 The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
 and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
 watchdog in probe and s2r scenarios.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   13 ++-
  drivers/watchdog/s3c2410_wdt.c |  114 
 ++--
  2 files changed, 118 insertions(+), 9 deletions(-)

 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
 b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 index 2aa486c..c46c7ce 100644
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -5,10 +5,21 @@ after a preset amount of time during which the WDT reset 
 event has not
  occurred.

  Required properties:
 -- compatible : should be samsung,s3c2410-wdt
 +- compatible : should be samsung,s3c2410-wdt or samsung,s3c5250-wdt or 
 samsung,s3c5420-wdt

 This should be written as should be one among the following:
 (a) samsung,s3c2410-wdt for xyz SoC
 (b) 
 (c) ...


Okay, will change it.

  - reg : base physical address of the controller and length of memory mapped
 region.
  - interrupts : interrupt number to the cpu.
 +- samsung,pmusysreg : reference node to pmu sysreg (required only in case 
 of Exynos5250 and 5420)

 This property is samsung,sysreg.


Okay, will keep this as it is and take care in driver


  Optional properties:
  - timeout-sec : contains the watchdog timeout in seconds.
 +
 +watchdog@101D {
 +   compatible = samsung,s3c5250-wdt;
 +   reg = 0x101D 0x100;
 +   interrupts = 0 42 0;
 +   clocks = clock 336;
 +   clock-names = watchdog;
 +   samsung,sysreg = pmu_sys_reg;
 +   status = okay;
 +};
 diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
 index 23aad7c..2a3429c 100644
 --- a/drivers/watchdog/s3c2410_wdt.c
 +++ b/drivers/watchdog/s3c2410_wdt.c
 @@ -41,6 +41,8 @@
  #include linux/slab.h
  #include linux/err.h
  #include linux/of.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h

  #define S3C2410_WTCON  0x00
  #define S3C2410_WTDAT  0x04
 @@ -61,6 +63,10 @@
  #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
  #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)

 +#define WDT_DISABLE_REG_OFFSET 0x0408
 +#define WDT_MASK_RESET_REG_OFFSET  0x040c
 +#define QUIRK_NEEDS_PMU_CONFIG (1  0)
 +
  static bool nowayout   = WATCHDOG_NOWAYOUT;
  static int tmr_margin;
  static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
 @@ -84,6 +90,12 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 
 to ignore reboots, 
 0 to reboot (default 0));
  MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));

 +struct pmu_config {
 +   int disable_reg;
 +   int mask_reset_reg;
 +   int mask_bit;
 +};
 +
  struct s3c2410_wdt {
 struct device   *dev;
 struct clk  *clock;
 @@ -94,7 +106,34 @@ struct s3c2410_wdt {
 unsigned long   wtdat_save;
 struct watchdog_device  wdt_device;
 struct notifier_block   freq_transition;
 +   struct pmu_config   *wdt_pmu_config;
 +   struct regmap   *pmureg;
 +   unsigned intquirks;
 +};
 +
 +static struct pmu_config pmu_config_5250  = {
 +   .disable_reg = WDT_DISABLE_REG_OFFSET,
 +   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 +   .mask_bit = 20
 +};
 +
 +static struct pmu_config pmu_config_5420 = {
 +   .disable_reg = WDT_DISABLE_REG_OFFSET,
 +   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 +   .mask_bit = 0
 +};
 +

 The above 2 structures could also be under ifdef CONFIG_OF


Okay, will move it

 +#ifdef CONFIG_OF
 +static const struct of_device_id s3c2410_wdt_match[] = {
 +   { .compatible = samsung,s3c2410-wdt },
 +   { .compatible = samsung,s3c5250-wdt,
 + .data = (struct pmu_config *) pmu_config_5250 },
 +   { .compatible = samsung,s3c5420-wdt,
 + .data = (struct pmu_config *) pmu_config_5420 },
 +   {},
  };
 +MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
 +#endif

  /* watchdog control routines */

 @@ -111,6 +150,40 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
 notifier_block *nb)
 return container_of(nb, struct s3c2410_wdt, freq_transition);
  }

 +static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
 *wdt)
 +{
 +   unsigned int disable, mask_reset;
 +   int ret;
 +
 +   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-disable_reg

Re: [PATCH 1/2] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-10-30 Thread Leela Krishna Amudala
Hi,

On Wed, Oct 30, 2013 at 12:20 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Leela,

 On 30 October 2013 12:23, Leela Krishna Amudala l.kris...@samsung.com wrote:
 Adds watchdog device nodes to the DT device list for Exynos5250 and 
 Exynos5420

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5.dtsi|   12 +---
  arch/arm/boot/dts/exynos5250.dtsi |7 ++-
  arch/arm/boot/dts/exynos5420.dtsi |   10 ++
  3 files changed, 21 insertions(+), 8 deletions(-)

 diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
 index e52b038..e7b6dbd 100644
 --- a/arch/arm/boot/dts/exynos5.dtsi
 +++ b/arch/arm/boot/dts/exynos5.dtsi
 @@ -81,13 +81,6 @@
 status = disabled;
 };

 -   watchdog {
 -   compatible = samsung,s3c2410-wdt;
 -   reg = 0x101D 0x100;
 -   interrupts = 0 42 0;
 -   status = disabled;
 -   };
 -
 fimd@1440 {
 compatible = samsung,exynos5250-fimd;
 interrupt-parent = combiner;
 @@ -106,4 +99,9 @@
 #size-cells = 0;
 status = disabled;
 };
 +
 +   pmu_sys_reg: pmusysreg {

 Make this pmusysreg@1004.


Okay, will do it

 +   compatible = samsung,exynos5-pmureg, syscon;

 I do not see any reference to samsung,exynos5-pmureg in the tree.


Okay, will take care of it

 +   reg = 0x1004 0x5000;
 +   };

 Since this is a separate node, IMO it could be added in a separate patch.


Okay, will do it

  };
 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index c4a8662..3ccd150 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -158,9 +158,14 @@
 interrupts = 0 47 0;
 };

 -   watchdog {
 +   watchdog@101D {
 +   compatible = samsung,s3c5250-wdt;

 Exynos5 does not belong to S3C series. Please change this to
 exynos5250-wdt instead.


My mistake, will change it

 +   reg = 0x101D 0x100;
 +   interrupts = 0 42 0;
 clocks = clock 336;
 clock-names = watchdog;
 +   samsung,sysreg = pmu_sys_reg;
 +   status = okay;
 };

 g2d@1085 {
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
 b/arch/arm/boot/dts/exynos5420.dtsi
 index 6ffefd1..5fb7ae2 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -369,4 +369,14 @@
 clock-names = gscl;
 samsung,power-domain = gsc_pd;
 };
 +
 +watchdog@101D {
 +   compatible = samsung,s3c5420-wdt;

 ditto

 +   reg = 0x101D 0x100;
 +   interrupts = 0 42 0;
 +   clocks = clock 316;
 +   clock-names = watchdog;
 +   samsung,sysreg = pmu_sys_reg;
 +   status = okay;
 +};
  };
 --
 1.7.10.4




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 Sachin
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[PATCH V4 0/3] Add watchdog DT nodes and use syscon regmap interfac to configure pmu registers

2013-10-30 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to Exynos5 dtsi file
  ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   19 +++-
 arch/arm/boot/dts/exynos5.dtsi |   12 +--
 arch/arm/boot/dts/exynos5250.dtsi  |7 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   10 ++
 drivers/watchdog/s3c2410_wdt.c |  112 ++--
 5 files changed, 143 insertions(+), 17 deletions(-)

-- 
1.7.10.4

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[PATCH V4 1/3] ARM: dts: Add pmu sysreg node to Exynos5 dtsi file

2013-10-30 Thread Leela Krishna Amudala
This patch adds pmusysreg node to Exynos5 dtsi file to handle PMU
register accesses in a centralized way using syscon driver

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi |5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index e52b038..918e732 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -106,4 +106,9 @@
#size-cells = 0;
status = disabled;
};
+
+   pmu_sys_reg: pmusysreg@1004000 {
+   compatible = syscon;
+   reg = 0x1004 0x5000;
+   };
 };
-- 
1.7.10.4

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[PATCH V4 3/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-10-30 Thread Leela Krishna Amudala
The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
watchdog in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   19 +++-
 drivers/watchdog/s3c2410_wdt.c |  112 ++--
 2 files changed, 122 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..5a9889b 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,27 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be one among the following
+   (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
+   (b) samsung,exynos5250-wdt for Exynos5250
+   (c) samsung,exynos5420-wdt for Exynos5420
+
 - reg : base physical address of the controller and length of memory mapped
region.
 - interrupts : interrupt number to the cpu.
+- samsung,pmusysreg : reference node to pmu sysreg (required only in case of 
Exynos5250 and 5420)
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Example:
+
+watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 336;
+   clock-names = watchdog;
+   samsung,sysreg = pmu_sys_reg;
+   status = okay;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..d8aefef 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -41,6 +41,8 @@
 #include linux/slab.h
 #include linux/err.h
 #include linux/of.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
 
 #define S3C2410_WTCON  0x00
 #define S3C2410_WTDAT  0x04
@@ -61,6 +63,10 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define WDT_DISABLE_REG_OFFSET 0x0408
+#define WDT_MASK_RESET_REG_OFFSET  0x040c
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -84,6 +90,12 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 to 
ignore reboots, 
0 to reboot (default 0));
 MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));
 
+struct pmu_config {
+   int disable_reg;
+   int mask_reset_reg;
+   int mask_bit;
+};
+
 struct s3c2410_wdt {
struct device   *dev;
struct clk  *clock;
@@ -94,7 +106,34 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   struct pmu_config   *wdt_pmu_config;
+   struct regmap   *pmureg;
+   unsigned intquirks;
+};
+
+#ifdef CONFIG_OF
+static struct pmu_config pmu_config_5250  = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 20
+};
+
+static struct pmu_config pmu_config_5420 = {
+   .disable_reg = WDT_DISABLE_REG_OFFSET,
+   .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
+   .mask_bit = 0
+};
+
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt },
+   { .compatible = samsung,exynos5250-wdt,
+ .data = (struct pmu_config *) pmu_config_5250 },
+   { .compatible = samsung,exynos5420-wdt,
+ .data = (struct pmu_config *) pmu_config_5420 },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
 
 /* watchdog control routines */
 
@@ -111,6 +150,38 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
*wdt)
+{
+   unsigned int disable, mask_reset;
+   int ret;
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-disable_reg,
+   disable);
+   if (ret  0) {
+   dev_err(wdt-dev, failed to read disable reg(%d)\n, ret);
+   return;
+   }
+
+   ret = regmap_read(wdt-pmureg, wdt-wdt_pmu_config-mask_reset_reg,
+   mask_reset);
+   if (ret  0) {
+   dev_err(wdt-dev, failed to read mask reset reg(%d)\n, ret);
+   return;
+   }
+
+   if (mask) {
+   disable |= (1  wdt-wdt_pmu_config

[PATCH V4 2/3] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-10-30 Thread Leela Krishna Amudala
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |7 ++-
 arch/arm/boot/dts/exynos5420.dtsi |   10 ++
 3 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 918e732..fec8aa7 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..e46b5d9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,14 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,pmusysreg = pmu_sys_reg;
+   status = okay;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..c95385b 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,14 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,pmusysreg = pmu_sys_reg;
+   status = okay;
+};
 };
-- 
1.7.10.4

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Re: [PATCH V4 1/3] ARM: dts: Add pmu sysreg node to Exynos5 dtsi file

2013-10-30 Thread Leela Krishna Amudala
Hi,

On Wed, Oct 30, 2013 at 3:22 PM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Leela,

 On 30 October 2013 15:21, Leela Krishna Amudala l.kris...@samsung.com wrote:
 This patch adds pmusysreg node to Exynos5 dtsi file to handle PMU
 register accesses in a centralized way using syscon driver

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5.dtsi |5 +
  1 file changed, 5 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
 index e52b038..918e732 100644
 --- a/arch/arm/boot/dts/exynos5.dtsi
 +++ b/arch/arm/boot/dts/exynos5.dtsi
 @@ -106,4 +106,9 @@
 #size-cells = 0;
 status = disabled;
 };
 +
 +   pmu_sys_reg: pmusysreg@1004000 {
 +   compatible = syscon;
 +   reg = 0x1004 0x5000;
 +   };
  };

 Had a look at this in a bit detail and found the following.
 The register base address for this block on 5250 and 5420 as per the
 TRM is 0x1005.

 Also, the binding document specifies the naming convention. According
 to it this node
 should like:

 sys_reg: sysreg@1005 {
compatible = samsung,exynos5-sysreg, syscon;
reg = 0x1005 0x500;
 };


I know, but here my intention is not to regmap system register (0x1005),
but instead PMU register (0x1004), Hence created this node.

~Leela Krishna

 --
 With warm regards,
 Sachin
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Re: [PATCH V4 3/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register

2013-10-30 Thread Leela Krishna Amudala
Hi Tomasz,

On Wed, Oct 30, 2013 at 8:09 PM, Tomasz Figa t.f...@samsung.com wrote:
 Hi Leela,

 On Wednesday 30 of October 2013 15:21:13 Leela Krishna Amudala wrote:
 The syscon regmap interface is used to configure AUTOMATIC_WDT_RESET_DISABLE
 and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of
 watchdog in probe and s2r scenarios.

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  .../devicetree/bindings/watchdog/samsung-wdt.txt   |   19 +++-
  drivers/watchdog/s3c2410_wdt.c |  112 
 ++--
  2 files changed, 122 insertions(+), 9 deletions(-)

 diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
 b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 index 2aa486c..5a9889b 100644
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -5,10 +5,27 @@ after a preset amount of time during which the WDT reset 
 event has not
  occurred.

  Required properties:
 -- compatible : should be samsung,s3c2410-wdt
 +- compatible : should be one among the following
 + (a) samsung,s3c2410-wdt for Exynos4 and previous SoCs
 + (b) samsung,exynos5250-wdt for Exynos5250
 + (c) samsung,exynos5420-wdt for Exynos5420
 +
  - reg : base physical address of the controller and length of memory mapped
   region.
  - interrupts : interrupt number to the cpu.
 +- samsung,pmusysreg : reference node to pmu sysreg (required only in case 
 of Exynos5250 and 5420)

 I don't really like the name of this property. Maybe
 samsung,syscon-phandle would be better?

Okay, changed.

 I'm not sure if this property should be tied to PMU, as on future SoCs
 those registers might be located in another syscon-style IP. The
 description should note that in case of Exynos 5250 and 5420 this should
 point to the PMU node, though.


Added


  Optional properties:
  - timeout-sec : contains the watchdog timeout in seconds.
 +
 +Example:
 +
 +watchdog@101D {
 + compatible = samsung,exynos5250-wdt;
 + reg = 0x101D 0x100;
 + interrupts = 0 42 0;
 + clocks = clock 336;
 + clock-names = watchdog;
 + samsung,sysreg = pmu_sys_reg;
 + status = okay;
 +};
 diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
 index 23aad7c..d8aefef 100644
 --- a/drivers/watchdog/s3c2410_wdt.c
 +++ b/drivers/watchdog/s3c2410_wdt.c
 @@ -41,6 +41,8 @@
  #include linux/slab.h
  #include linux/err.h
  #include linux/of.h
 +#include linux/mfd/syscon.h
 +#include linux/regmap.h

  #define S3C2410_WTCON0x00
  #define S3C2410_WTDAT0x04
 @@ -61,6 +63,10 @@
  #define CONFIG_S3C2410_WATCHDOG_ATBOOT   (0)
  #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)

 +#define WDT_DISABLE_REG_OFFSET   0x0408
 +#define WDT_MASK_RESET_REG_OFFSET0x040c
 +#define QUIRK_NEEDS_PMU_CONFIG   (1  0)
 +
  static bool nowayout = WATCHDOG_NOWAYOUT;
  static int tmr_margin;
  static int tmr_atboot= CONFIG_S3C2410_WATCHDOG_ATBOOT;
 @@ -84,6 +90,12 @@ MODULE_PARM_DESC(soft_noboot, Watchdog action, set to 1 
 to ignore reboots, 
   0 to reboot (default 0));
  MODULE_PARM_DESC(debug, Watchdog debug, set to 1 for debug (default 0));

 +struct pmu_config {

 For the sake of future extensibility I'd rename this struct to
 s3c2410_wdt_variant and add an u32 quirks field, which would has
 the QUIRK_NEEDS_PMU_CONFIG set for 5250 and 5420 variants.


Modified

 + int disable_reg;
 + int mask_reset_reg;
 + int mask_bit;
 +};
 +
  struct s3c2410_wdt {
   struct device   *dev;
   struct clk  *clock;
 @@ -94,7 +106,34 @@ struct s3c2410_wdt {
   unsigned long   wtdat_save;
   struct watchdog_device  wdt_device;
   struct notifier_block   freq_transition;
 + struct pmu_config   *wdt_pmu_config;
 + struct regmap   *pmureg;
 + unsigned intquirks;

 Quirks should be a static per-variant property.


Taken care

 +};
 +
 +#ifdef CONFIG_OF
 +static struct pmu_config pmu_config_5250  = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 20
 +};
 +
 +static struct pmu_config pmu_config_5420 = {
 + .disable_reg = WDT_DISABLE_REG_OFFSET,
 + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET,
 + .mask_bit = 0
 +};
 +
 +static const struct of_device_id s3c2410_wdt_match[] = {
 + { .compatible = samsung,s3c2410-wdt },

 If you follow what I suggested above, the basic variant would also have
 a variant struct associated with it, which would be more consistent.

 + { .compatible = samsung,exynos5250-wdt,
 +   .data = (struct pmu_config *) pmu_config_5250 },
 + { .compatible = samsung,exynos5420-wdt,
 +   .data = (struct pmu_config *) pmu_config_5420 },
 + {},
  };
 +MODULE_DEVICE_TABLE

[PATCH V5 2/3] ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420

2013-10-30 Thread Leela Krishna Amudala
Adds watchdog device nodes to the DT device list for Exynos5250 and Exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|7 ---
 arch/arm/boot/dts/exynos5250.dtsi |7 ++-
 arch/arm/boot/dts/exynos5420.dtsi |   10 ++
 3 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index ad6e47c9..e6ab5d9 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
status = disabled;
};
 
-   watchdog {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
-   interrupts = 0 42 0;
-   status = disabled;
-   };
-
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index c4a8662..7e4867f 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,14 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
+   compatible = samsung,exynos5250-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
clocks = clock 336;
clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+   status = okay;
};
 
g2d@1085 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..8585fe7 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,14 @@
clock-names = gscl;
samsung,power-domain = gsc_pd;
};
+
+watchdog@101D {
+   compatible = samsung,exynos5420-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   clocks = clock 316;
+   clock-names = watchdog;
+   samsung,syscon-phandle = pmu_syscon;
+   status = okay;
+};
 };
-- 
1.7.10.4

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[PATCH V5 0/3] Add watchdog DT nodes and use syscon regmap interfac to configure pmu registers

2013-10-30 Thread Leela Krishna Amudala
This patchset does the following things
- Adds pmusysreg device node to exynos5.dtsi file
- Adds watchdog DT nodes to Exynos5250 and 5420
- Uses syscon regmap interface to configure pmu registers
  to mask/unmask enable/disable of watchdog.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V4:
- changed the node name from pmusysreg to syscon and node label from 
pmu_sys_reg to pmu_syscon
- changed the property name from samsung,pmusysreg to 
samsung,syscon-phandle
- used regmap_update_bits instead of remap_read/regmap_write
- Addressed other comments given by Tomasz Figa t.f...@samsung.com

Changes since V3:
- changed the compatible strings for watchdog node
- splitted up adding pmusysreg node and made it separate patch
- Addressed comments given by Sachin Kamat sachin.ka...@linaro.org

Changes since V2:
- used syscon regmap interface to configure pmu registers in WDT driver
  (suggested by Tomasz Figa t.f...@samsung.com)

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (3):
  ARM: dts: Add pmu sysreg node to Exynos5 dtsi file
  ARM: dts: add watchdog device nodes for Exynos5250 and Exynos5420
  watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu
register

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   22 ++-
 arch/arm/boot/dts/exynos5.dtsi |   12 +-
 arch/arm/boot/dts/exynos5250.dtsi  |7 +-
 arch/arm/boot/dts/exynos5420.dtsi  |   10 ++
 drivers/watchdog/s3c2410_wdt.c |  150 +---
 5 files changed, 175 insertions(+), 26 deletions(-)

-- 
1.7.10.4

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[PATCH] ARM: dts: Exynos5420: Add device nodes for TMU blocks

2013-10-17 Thread Leela Krishna Amudala
Exynos5420 SoC has per core thermal management unit, this patch adds
tmu device nodes to the DT device list.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---

Note: This patch has been tested on kgene's for-next branch 
after applying Naveen's patchset

[1/3,v6] thermal: samsung: add intclr_fall_shift bit in exynos_tmu_register
https://patchwork.kernel.org/patch/3058501/
[2/3,v6] thermal: samsung: change base_common to more meaningful base_second
https://patchwork.kernel.org/patch/3058541/
[3/3,v6] thermal: samsung: Add TMU support for Exynos5420 SoCs
https://patchwork.kernel.org/patch/3058571/

 arch/arm/boot/dts/exynos5420.dtsi |   45 +
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..c6270cd 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -190,6 +190,51 @@
status = okay;
};
 
+   /* tmu for CPU0 */
+   tmu@1006 {
+   compatible = samsung,exynos5420-tmu;
+   reg = 0x1006 0x100;
+   interrupts = 0 65 0;
+   clocks = clock 318;
+   clock-names = tmu_apbif;
+   };
+
+   /* tmu for CPU1 */
+   tmu@10064000 {
+   compatible = samsung,exynos5420-tmu;
+   reg = 0x10064000 0x100;
+   interrupts = 0 183 0;
+   clocks = clock 318;
+   clock-names = tmu_apbif;
+   };
+
+   /* tmu for CPU2 */
+   tmu@10068000 {
+   compatible = samsung,exynos5420-tmu;
+   reg = 0x10068000 0x100;
+   interrupts = 0 184 0;
+   clocks = clock 318;
+   clock-names = tmu_apbif;
+   };
+
+   /* tmu for CPU3 */
+   tmu@1006c000 {
+   compatible = samsung,exynos5420-tmu;
+   reg = 0x1006c000 0x100;
+   interrupts = 0 185 0;
+   clocks = clock 318;
+   clock-names = tmu_apbif;
+   };
+
+   /* tmu for GPU */
+   tmu@100a {
+   compatible = samsung,exynos5420-tmu;
+   reg = 0x100a 0x100;
+   interrupts = 0 215 0;
+   clocks = clock 318;
+   clock-names = tmu_apbif;
+   };
+
serial@12C0 {
clocks = clock 257, clock 128;
clock-names = uart, clk_uart_baud0;
-- 
1.7.10.4

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Re: [PATCH 1/2] ARM: dts: Exynos5420: add clock entries to gsc power domain

2013-10-16 Thread Leela Krishna Amudala
Hi Tomasz,

On Wed, Oct 16, 2013 at 12:19 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Leela,

 On Tuesday 15 of October 2013 16:50:53 Leela Krishna Amudala wrote:
 Add clock nodes for oscillator clock, input clocks and parents of input
 clocks to gsc power domain so that we can set/restore the input
 clocks while powering on and powering off a domain.

 Signed-off-by: Prathyush K prathyus...@samsung.com
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5420.dtsi |3 +++
  1 file changed, 3 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi index 09aa06c..7f0296c 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -116,6 +116,9 @@
   gsc_pd: power-domain@10044000 {
   compatible = samsung,exynos4210-pd;
   reg = 0x10044000 0x20;
 + clocks = clock 1, clock 1032, clock 1033,
 +  clock 1034, clock 1035;
 + clock-names = oscclk, pclk0, clk0, pclk1, clk1;

 This does not seem right. Do you have any actual code that uses this?


I'm not sure whether the code that uses this is present or not.
For time being I'll discard this patch from the series and will post it later.

Best Wishes,
Leela Krishna.

 Best regards,
 Tomasz

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Re: [PATCH 2/2] ARM: dts: Exynos5420: Add dt support for gscaler

2013-10-16 Thread Leela Krishna Amudala
Hi Tomasz,

On Wed, Oct 16, 2013 at 12:21 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Leela,

 On Tuesday 15 of October 2013 16:50:54 Leela Krishna Amudala wrote:
 Adds G-Scaler devices to the DT device list

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5420.dtsi |   20 
  1 file changed, 20 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi index 7f0296c..f86aeea 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -31,6 +31,8 @@
   i2c1 = i2c_1;
   i2c2 = i2c_2;
   i2c3 = i2c_3;
 + gsc0 = gsc_0;
 + gsc1 = gsc_1;

 Do you really need these aliases?


Yes, without these aliases probe function fails saying
[1.04] exynos-gsc 13e0.gsc: Invalid platform device id: 65517
[1.045000] exynos-gsc: probe of 13e0.gsc failed with error -22

   };

   cpus {
 @@ -313,4 +315,22 @@
   clocks = clock 431, clock 143;
   clock-names = mixer, sclk_hdmi;
   };
 +
 + gsc_0:  gsc@0x13e0 {

 coding style: There should be no 0x in node name and the name should
 be more meaningful, e.g. video-scaler.


Okay, will change it and post next version of this patch.

Best Wishes,
Leela Krishna.

 Best regards,
 Tomasz

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Re: [PATCH 2/2] ARM: dts: Exynos5420: Add dt support for gscaler

2013-10-16 Thread Leela Krishna Amudala
On Wed, Oct 16, 2013 at 3:38 PM, Leela Krishna Amudala
l.kris...@samsung.com wrote:
 Hi Tomasz,

 On Wed, Oct 16, 2013 at 12:21 AM, Tomasz Figa tomasz.f...@gmail.com wrote:
 Hi Leela,

 On Tuesday 15 of October 2013 16:50:54 Leela Krishna Amudala wrote:
 Adds G-Scaler devices to the DT device list

 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5420.dtsi |   20 
  1 file changed, 20 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5420.dtsi
 b/arch/arm/boot/dts/exynos5420.dtsi index 7f0296c..f86aeea 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -31,6 +31,8 @@
   i2c1 = i2c_1;
   i2c2 = i2c_2;
   i2c3 = i2c_3;
 + gsc0 = gsc_0;
 + gsc1 = gsc_1;

 Do you really need these aliases?


 Yes, without these aliases probe function fails saying
 [1.04] exynos-gsc 13e0.gsc: Invalid platform device id: 65517
 [1.045000] exynos-gsc: probe of 13e0.gsc failed with error -22


In gsc_probe() function, of_alias_get_id(pdev-dev.of_node, gsc) is
returning error value,
Hence probe failing.

   };

   cpus {
 @@ -313,4 +315,22 @@
   clocks = clock 431, clock 143;
   clock-names = mixer, sclk_hdmi;
   };
 +
 + gsc_0:  gsc@0x13e0 {

 coding style: There should be no 0x in node name and the name should
 be more meaningful, e.g. video-scaler.


 Okay, will change it and post next version of this patch.

 Best Wishes,
 Leela Krishna.

 Best regards,
 Tomasz

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[PATCH] ARM: dts: Exynos5420: Add dt support for gscaler

2013-10-16 Thread Leela Krishna Amudala
Adds G-Scaler devices to the DT device list

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5420.dtsi |   20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..c4210dc 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -31,6 +31,8 @@
i2c1 = i2c_1;
i2c2 = i2c_2;
i2c3 = i2c_3;
+   gsc0 = gsc_0;
+   gsc1 = gsc_1;
};
 
cpus {
@@ -310,4 +312,22 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+   gsc_0:  g-scaler@13e0 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e0 0x1000;
+   interrupts = 0 85 0;
+   clocks = clock 465;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
+
+   gsc_1:  g-scaler@13e1 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e1 0x1000;
+   interrupts = 0 86 0;
+   clocks = clock 466;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
 };
-- 
1.7.9.5

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[PATCH V2] ARM: dts: Exynos5420: Add device nodes for GScaler blocks

2013-10-16 Thread Leela Krishna Amudala
Adds G-Scaler device nodes to the DT device list

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---

Changes since V1:
- Changed the patch subject
- Changed the node name to video-scaler 
  suggested by Tomasz Figa t.f...@samsung.com

Note: G-scaler probe test done on Kgene's for-next branch.

 arch/arm/boot/dts/exynos5420.dtsi |   20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..2c45986 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -31,6 +31,8 @@
i2c1 = i2c_1;
i2c2 = i2c_2;
i2c3 = i2c_3;
+   gsc0 = gsc_0;
+   gsc1 = gsc_1;
};
 
cpus {
@@ -310,4 +312,22 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+   gsc_0: video-scaler@13e0 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e0 0x1000;
+   interrupts = 0 85 0;
+   clocks = clock 465;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
+
+   gsc_1: video-scaler@13e1 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e1 0x1000;
+   interrupts = 0 86 0;
+   clocks = clock 466;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
 };
-- 
1.7.9.5

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[PATCH 0/2] Add G-Scaler device nodes to dt file

2013-10-15 Thread Leela Krishna Amudala
This patchset adds clock entries to gsc power domain and gsc device
nodes to DT file

Note: This pathcset is rebased and tested on Kgene's for-next branch.

Leela Krishna Amudala (2):
  ARM: dts: Exynos5420: add clock entries to gsc power domain
  ARM: dts: Exynos5420: Add dt support for gscaler

 arch/arm/boot/dts/exynos5420.dtsi |   23 +++
 1 file changed, 23 insertions(+)

-- 
1.7.9.5

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[PATCH 2/2] ARM: dts: Exynos5420: Add dt support for gscaler

2013-10-15 Thread Leela Krishna Amudala
Adds G-Scaler devices to the DT device list

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5420.dtsi |   20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 7f0296c..f86aeea 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -31,6 +31,8 @@
i2c1 = i2c_1;
i2c2 = i2c_2;
i2c3 = i2c_3;
+   gsc0 = gsc_0;
+   gsc1 = gsc_1;
};
 
cpus {
@@ -313,4 +315,22 @@
clocks = clock 431, clock 143;
clock-names = mixer, sclk_hdmi;
};
+
+   gsc_0:  gsc@0x13e0 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e0 0x1000;
+   interrupts = 0 85 0;
+   clocks = clock 465;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
+
+   gsc_1:  gsc@0x13e1 {
+   compatible = samsung,exynos5-gsc;
+   reg = 0x13e1 0x1000;
+   interrupts = 0 86 0;
+   clocks = clock 466;
+   clock-names = gscl;
+   samsung,power-domain = gsc_pd;
+   };
 };
-- 
1.7.9.5

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Re: [RESEND] [PATCH] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420

2013-10-10 Thread Leela Krishna Amudala
Hi Sachin,

On Thu, Oct 10, 2013 at 11:18 AM, Sachin Kamat sachin.ka...@linaro.org wrote:
 Hi Leela,

 On 10 October 2013 11:12, Leela Krishna Amudala l.kris...@samsung.com wrote:
 Add the device-tree binding for the PWM controller to Exynos5250 and 
 Exynos5420

 Signed-off-by: Andrew Bresticker abres...@chromium.org
 Signed-off-by: Olof Johansson ol...@chromium.org
 Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
 ---
  arch/arm/boot/dts/exynos5250.dtsi |9 +
  arch/arm/boot/dts/exynos5420.dtsi |9 +
  2 files changed, 18 insertions(+)

 diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
 b/arch/arm/boot/dts/exynos5250.dtsi
 index 864ae90..99abc72 100644
 --- a/arch/arm/boot/dts/exynos5250.dtsi
 +++ b/arch/arm/boot/dts/exynos5250.dtsi
 @@ -521,6 +521,15 @@
 };
 };

 +   pwm: pwm@12dd {
 +   compatible = samsung,exynos4210-pwm;
 +   reg = 0x12dd 0x100;
 +   samsung,pwm-outputs = 0, 1, 2, 3;
 +   #pwm-cells = 3;
 +   clocks = clock 311;
 +   clock-names = timers;
 +   };
 +
 amba {
 #address-cells = 1;
 #size-cells = 1;
 diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
 b/arch/arm/boot/dts/exynos5420.dtsi
 index d537cd7..80afc8b 100644
 --- a/arch/arm/boot/dts/exynos5420.dtsi
 +++ b/arch/arm/boot/dts/exynos5420.dtsi
 @@ -206,6 +206,15 @@
 clock-names = uart, clk_uart_baud0;
 };

 +   pwm: pwm@12dd {
 +   compatible = samsung,exynos4210-pwm;
 +   reg = 0x12dd 0x100;
 +   samsung,pwm-outputs = 0, 1, 2, 3;
 +   #pwm-cells = 3;
 +   clocks = clock 279;
 +   clock-names = timers;
 +   };
 +

 Looking at the properties in the above 2 nodes, can't we have the
 common ones defined in exynos5.dtsi?


Yes, we can do it, will change and post the next version

 --
 With warm regards,
 Sachin
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[PATCH V2] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420

2013-10-10 Thread Leela Krishna Amudala
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420

Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Olof Johansson ol...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
changes since v1:
- Moved the common properties in the node to exynos5.dtsi file
  suggested by Sachin Kamat sachin.ka...@linaro.org 

 arch/arm/boot/dts/exynos5.dtsi|7 +++
 arch/arm/boot/dts/exynos5250.dtsi |5 +
 arch/arm/boot/dts/exynos5420.dtsi |5 +
 3 files changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d..eb74ebc 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -109,6 +109,13 @@
status = disabled;
};
 
+   pwm: pwm@12dd {
+   compatible = samsung,exynos4210-pwm;
+   reg = 0x12dd 0x100;
+   samsung,pwm-outputs = 0, 1, 2, 3;
+   #pwm-cells = 3;
+   };
+
fimd@1440 {
compatible = samsung,exynos5250-fimd;
interrupt-parent = combiner;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 7cb5c4b..52bf8d2 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -521,6 +521,11 @@
};
};
 
+   pwm: pwm@12dd {
+   clocks = clock 311;
+   clock-names = timers;
+   };
+
amba {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..9387b15 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -210,6 +210,11 @@
clock-names = uart, clk_uart_baud0;
};
 
+   pwm: pwm@12dd {
+   clocks = clock 279;
+   clock-names = timers;
+   };
+
dp_phy: video-phy@10040728 {
compatible = samsung,exynos5250-dp-video-phy;
reg = 0x10040728 4;
-- 
1.7.10.4

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Re: [RFC/PATCH V2] spi: s3c64xx: Enable Word transfer

2013-10-10 Thread Leela Krishna Amudala
Hi Rajeshwari,

On Thu, Oct 10, 2013 at 4:11 PM, Rajeshwari S Shinde
rajeshwar...@samsung.com wrote:
 This patch enables word transfer for s3c64xx spi driver.
 User can set bits_per_word to 32 before calling spi_setup,
 which would enable the word transfer mode.

 Signed-off-by: Rajeshwari S Shinde rajeshwar...@samsung.com
 ---
 Chnages in V2:
 - Reduced the call for s3c64xx_spi_config
  drivers/spi/spi-s3c64xx.c | 24 +---
  1 file changed, 17 insertions(+), 7 deletions(-)

 diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
 index 512b889..d1b0a2b 100644
 --- a/drivers/spi/spi-s3c64xx.c
 +++ b/drivers/spi/spi-s3c64xx.c
 @@ -498,6 +498,17 @@ static void enable_datapath(struct 
 s3c64xx_spi_driver_data *sdd,
 chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
 chcfg = ~S3C64XX_SPI_CH_TXCH_ON;

 +   if(sdd-cur_bpw == 32) {
 +   /* For word transfer we need to swap bytes */
 +   u32 swapcfg = (S3C64XX_SPI_SWAP_TX_EN | 
 S3C64XX_SPI_SWAP_TX_BYTE |
 +   S3C64XX_SPI_SWAP_TX_HALF_WORD |
 +   S3C64XX_SPI_SWAP_RX_EN |
 +   S3C64XX_SPI_SWAP_RX_BYTE |
 +   S3C64XX_SPI_SWAP_RX_HALF_WORD);
 +   writel(swapcfg, regs + S3C64XX_SPI_SWAP_CFG);

In s3c64xx_spi_probe() function
sdd-cur_bpw is hard coded to 8

is there any provision somehow to configure cur_bpw to 32 ?

wouldn't 16 bits per word transfers also need swapping?

Best Wishes,
Leela Krishna.

 +   } else
 +   writel(0, regs + S3C64XX_SPI_SWAP_CFG);
 +
 if (dma_mode) {
 chcfg = ~S3C64XX_SPI_CH_RXCH_ON;
 } else {
 @@ -905,13 +916,12 @@ static int s3c64xx_spi_transfer_one_message(struct 
 spi_master *master,
 bpw = xfer-bits_per_word;
 speed = xfer-speed_hz ? : spi-max_speed_hz;

 -   if (xfer-len % (bpw / 8)) {
 -   dev_err(spi-dev,
 -   Xfer length(%u) not a multiple of word 
 size(%u)\n,
 -   xfer-len, bpw / 8);
 -   status = -EIO;
 -   goto out;
 -   }
 +   /*
 +* Enable byte tranfer if transfer length not a multiple of
 +* word size
 +*/
 +   if (xfer-len % (bpw / 8))
 +   bpw = 8;

 if (bpw != sdd-cur_bpw || speed != sdd-cur_speed) {
 sdd-cur_bpw = bpw;
 --
 1.7.12.4

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[RESEND] [PATCH] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420

2013-10-09 Thread Leela Krishna Amudala
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420

Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Olof Johansson ol...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5250.dtsi |9 +
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 2 files changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 864ae90..99abc72 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -521,6 +521,15 @@
};
};
 
+   pwm: pwm@12dd {
+   compatible = samsung,exynos4210-pwm;
+   reg = 0x12dd 0x100;
+   samsung,pwm-outputs = 0, 1, 2, 3;
+   #pwm-cells = 3;
+   clocks = clock 311;
+   clock-names = timers;
+   };
+
amba {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d537cd7..80afc8b 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -206,6 +206,15 @@
clock-names = uart, clk_uart_baud0;
};
 
+   pwm: pwm@12dd {
+   compatible = samsung,exynos4210-pwm;
+   reg = 0x12dd 0x100;
+   samsung,pwm-outputs = 0, 1, 2, 3;
+   #pwm-cells = 3;
+   clocks = clock 279;
+   clock-names = timers;
+   };
+
dp_phy: video-phy@10040728 {
compatible = samsung,exynos5250-dp-video-phy;
reg = 0x10040728 4;
-- 
1.7.10.4

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[RESEND] [PATCH V3] ARM: dts: Add DMA controller node info on Exynos5420.

2013-10-07 Thread Leela Krishna Amudala
From: Padmavathi Venna padm...@samsung.com

This patch adds dma controller node info on Exynos5420.
Exynos5420 has adma for audio IPs. As adma clk is dependent
on audss clk provider that will be added later.

Signed-off-by: Padmavathi Venna padm...@samsung.com
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
Change since V2:
- Removed adma node as adma clock is dependent audss clock provider.

Changes since V1:
- In V1, dma node common stuff was added in common exynos5.dtsi file.
  This was removed as per Kukjin comment and added in exynos5420.dtsi.

 arch/arm/boot/dts/exynos5420.dtsi |   52 +
 1 file changed, 52 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d537cd7..15465f8 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -186,6 +186,58 @@
status = okay;
};
 
+   amba {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = arm,amba-bus;
+   interrupt-parent = gic;
+   ranges;
+
+   pdma0: pdma@121A {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x121A 0x1000;
+   interrupts = 0 34 0;
+   clocks = clock 362;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 32;
+   };
+
+   pdma1: pdma@121B {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x121B 0x1000;
+   interrupts = 0 35 0;
+   clocks = clock 363;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 32;
+   };
+
+   mdma0: mdma@1080 {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x1080 0x1000;
+   interrupts = 0 33 0;
+   clocks = clock 473;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 1;
+   };
+
+   mdma1: mdma@11C1 {
+   compatible = arm,pl330, arm,primecell;
+   reg = 0x11C1 0x1000;
+   interrupts = 0 124 0;
+   clocks = clock 442;
+   clock-names = apb_pclk;
+   #dma-cells = 1;
+   #dma-channels = 8;
+   #dma-requests = 1;
+   };
+   };
+
serial@12C0 {
clocks = clock 257, clock 128;
clock-names = uart, clk_uart_baud0;
-- 
1.7.10.4

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[RESEND] [PATCH] ARM: dts: Add SPI nodes to the exynos5420 device tree file

2013-10-07 Thread Leela Krishna Amudala
Add SPI device tree nodes to Exynos5420 SoC

Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Reviewed-by: Andrew Bresticker abres...@chromium.org
---
Note: This patch is rebased on Kgene's for-next branch and is dependent on
[RESEND,V3] ARM: dts: Add DMA controller node info on Exynos5420.
https://patchwork.kernel.org/patch/2995181/

 arch/arm/boot/dts/exynos5420.dtsi |   51 +
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 15465f8..8d9e980 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -27,6 +27,9 @@
pinctrl2 = pinctrl_2;
pinctrl3 = pinctrl_3;
pinctrl4 = pinctrl_4;
+   spi0 = spi_0;
+   spi1 = spi_1;
+   spi2 = spi_2;
};
 
cpus {
@@ -238,6 +241,54 @@
};
};
 
+   spi_0: spi@12d2 {
+   compatible = samsung,exynos4210-spi;
+   reg = 0x12d2 0x100;
+   interrupts = 0 66 0;
+   dmas = pdma0 5
+   pdma0 4;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   pinctrl-names = default;
+   pinctrl-0 = spi0_bus;
+   clocks = clock 271, clock 135;
+   clock-names = spi, spi_busclk0;
+   status = disabled;
+   };
+
+   spi_1: spi@12d3 {
+   compatible = samsung,exynos4210-spi;
+   reg = 0x12d3 0x100;
+   interrupts = 0 67 0;
+   dmas = pdma1 5
+   pdma1 4;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   pinctrl-names = default;
+   pinctrl-0 = spi1_bus;
+   clocks = clock 272, clock 136;
+   clock-names = spi, spi_busclk0;
+   status = disabled;
+   };
+
+   spi_2: spi@12d4 {
+   compatible = samsung,exynos4210-spi;
+   reg = 0x12d4 0x100;
+   interrupts = 0 68 0;
+   dmas = pdma0 7
+   pdma0 6;
+   dma-names = tx, rx;
+   #address-cells = 1;
+   #size-cells = 0;
+   pinctrl-names = default;
+   pinctrl-0 = spi2_bus;
+   clocks = clock 273, clock 137;
+   clock-names = spi, spi_busclk0;
+   status = disabled;
+   };
+
serial@12C0 {
clocks = clock 257, clock 128;
clock-names = uart, clk_uart_baud0;
-- 
1.7.10.4

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[PATCH V2 2/4] ARM: dts: add watchdog device tree node for exynos5420

2013-09-27 Thread Leela Krishna Amudala
Add watchdog device tree node for exynos5420

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5420.dtsi |6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d537cd7..9fadc23 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -186,6 +186,12 @@
status = okay;
};
 
+   watchdog@101D {
+   clocks = clock 316;
+   clock-names = watchdog;
+   status = okay;
+   };
+
serial@12C0 {
clocks = clock 257, clock 128;
clock-names = uart, clk_uart_baud0;
-- 
1.7.9.5

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[PATCH V2 3/4] watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers adresses

2013-09-27 Thread Leela Krishna Amudala
This patch parses the watchdog node to read pmu wdt sys registers addresses
and do mask/unmask enable/disable of WDT in probe and s2r scenarios.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   24 -
 drivers/watchdog/s3c2410_wdt.c |   94 ++--
 2 files changed, 108 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..f78b802 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -5,10 +5,30 @@ after a preset amount of time during which the WDT reset 
event has not
 occurred.
 
 Required properties:
-- compatible : should be samsung,s3c2410-wdt
+- compatible : should be samsung,s3c2410-wdt or samsung,s3c5250-wdt
 - reg : base physical address of the controller and length of memory mapped
-   region.
+   region and additional (addresses and length of memory mapped regions
+   of) PMU registers for masking/unmasking WDT only in case of Exynos5250 
and 5420.
 - interrupts : interrupt number to the cpu.
+- reset-mask-bit: bit number in the PMU registers to program mask/unmask WDT 
(required only
+   in case of Exynos5250 and 5420).
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+
+Examples:
+
+watchdog {
+   compatible = samsung,s3c2410-wdt;
+   reg = 0x101D 0x100;
+   interrupts = 0 42 0;
+   status = disabled;
+};
+
+watchdog {
+compatible = samsung,s3c5250-wdt;
+reg = 0x101D 0x100, 0x10040408 0x4, 0x1004040c 0x4;
+interrupts = 0 42 0;
+status = disabled;
+reset-mask-bit = 0;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..89eabca 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -61,6 +61,8 @@
 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME   (15)
 
+#define QUIRK_NEEDS_PMU_CONFIG (1  0)
+
 static bool nowayout   = WATCHDOG_NOWAYOUT;
 static int tmr_margin;
 static int tmr_atboot  = CONFIG_S3C2410_WATCHDOG_ATBOOT;
@@ -94,7 +96,21 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   void __iomem*pmu_disable_reg;
+   void __iomem*pmu_mask_reset_reg;
+   int pmu_mask_bit;
+   unsigned intquirks;
+};
+
+#ifdef CONFIG_OF
+static const struct of_device_id s3c2410_wdt_match[] = {
+   { .compatible = samsung,s3c2410-wdt },
+   { .compatible = samsung,s3c5250-wdt,
+ .data = (void *) QUIRK_NEEDS_PMU_CONFIG },
+   {},
 };
+MODULE_DEVICE_TABLE(of, s3c2410_wdt_match);
+#endif
 
 /* watchdog control routines */
 
@@ -111,6 +127,25 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
*wdt)
+{
+   unsigned int disable, mask_reset;
+
+   disable = readl(wdt-pmu_disable_reg);
+   mask_reset = readl(wdt-pmu_mask_reset_reg);
+
+   if (mask) {
+   disable |= (1  wdt-pmu_mask_bit);
+   mask_reset |= (1  wdt-pmu_mask_bit);
+   } else {
+   disable = ~(1  wdt-pmu_mask_bit);
+   mask_reset = ~(1  wdt-pmu_mask_bit);
+   }
+
+   writel(disable, wdt-pmu_disable_reg);
+   writel(mask_reset, wdt-pmu_mask_reset_reg);
+}
+
 static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
 {
struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
@@ -332,6 +367,14 @@ static inline void s3c2410wdt_cpufreq_deregister(struct 
s3c2410_wdt *wdt)
 }
 #endif
 
+/* s3c2410_get_wdt_quirks */
+static inline unsigned int s3c2410_get_wdt_quirks(struct platform_device *pdev)
+{
+   const struct of_device_id *match;
+   match = of_match_node(s3c2410_wdt_match, pdev-dev.of_node);
+   return (unsigned int)match-data;
+}
+
 static int s3c2410wdt_probe(struct platform_device *pdev)
 {
struct device *dev;
@@ -341,6 +384,8 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
unsigned int wtcon;
int started = 0;
int ret;
+   struct resource *res;
+   unsigned int mask_bit;
 
DBG(%s: probe=%p\n, __func__, pdev);
 
@@ -369,6 +414,37 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
goto err;
}
 
+   wdt-quirks = s3c2410_get_wdt_quirks(pdev);
+   if (wdt-quirks  QUIRK_NEEDS_PMU_CONFIG) {
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+   wdt-pmu_disable_reg = devm_ioremap_resource(pdev-dev, res

[PATCH V2 1/4] ARM: dts: Fix the watchdog DT node name for Exynos5

2013-09-27 Thread Leela Krishna Amudala
Fixes the watchdog DT node name for Exynos5 as per the DT node naming
convention also update status property for Exynos5250 SoC.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|2 +-
 arch/arm/boot/dts/exynos5250.dtsi |3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 074739d..a8bf0c2 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -102,7 +102,7 @@
status = disabled;
};
 
-   watchdog {
+   watchdog@101D {
compatible = samsung,s3c2410-wdt;
reg = 0x101D 0x100;
interrupts = 0 42 0;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 7d7cc77..6bb42cf 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -158,9 +158,10 @@
interrupts = 0 47 0;
};
 
-   watchdog {
+   watchdog@101D {
clocks = clock 336;
clock-names = watchdog;
+   status = okay;
};
 
g2d@1085 {
-- 
1.7.9.5

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[PATCH V2 0/4] Add watchdog DT nodes and parse it to read PMU registers addresses

2013-09-27 Thread Leela Krishna Amudala
This patchset does the following things
- Fixes the watchdog DT node name to follow convention
- Adds watchdog DT node to Exynos5420 SoC
- parse the watchdog device node to read pmu wdt sys registers
  addresses and do mask/unmask enable/disable of WDT in probe
  and s2r scenarios.

This patch set is rebased on Kgene's for-next branch and tested on SMDK5420

Changes since V1:
- Added new compatible string for Exynos5 SoCs
- Introduced quirk mechanism to program PMU registers
- Addressed comments given by Tomasz Figa t.f...@samsung.com

Leela Krishna Amudala (4):
  ARM: dts: Fix the watchdog DT node name for Exynos5
  ARM: dts: add watchdog device tree node for exynos5420
  watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers
adresses
  ARM: dts: exynos: add PMU registers addresses and mask bit to
watchdog node

 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   24 -
 arch/arm/boot/dts/exynos5.dtsi |6 +-
 arch/arm/boot/dts/exynos5250.dtsi  |4 +-
 arch/arm/boot/dts/exynos5420.dtsi  |7 ++
 drivers/watchdog/s3c2410_wdt.c |   94 ++--
 5 files changed, 121 insertions(+), 14 deletions(-)

-- 
1.7.9.5

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[PATCH V2 4/4] ARM: dts: exynos: add PMU registers addresses and mask bit to watchdog node

2013-09-27 Thread Leela Krishna Amudala
This patch adds support for specifying the pmu registers and masking bit
for watchdog to enable/disable and mask/unmask the watchdog reset request.

Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|4 ++--
 arch/arm/boot/dts/exynos5250.dtsi |1 +
 arch/arm/boot/dts/exynos5420.dtsi |1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index a8bf0c2..764c290 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -103,8 +103,8 @@
};
 
watchdog@101D {
-   compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
+   compatible = samsung,s3c5250-wdt;
+   reg = 0x101D 0x100, 0x10040408 0x4, 0x1004040c 0x4;
interrupts = 0 42 0;
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 6bb42cf..8bf28a7a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -161,6 +161,7 @@
watchdog@101D {
clocks = clock 336;
clock-names = watchdog;
+   reset-mask-bit = 20;
status = okay;
};
 
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 9fadc23..29235ea 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -189,6 +189,7 @@
watchdog@101D {
clocks = clock 316;
clock-names = watchdog;
+   reset-mask-bit = 0;
status = okay;
};
 
-- 
1.7.9.5

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Re: [PATCH 3/4] watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers adresses

2013-09-27 Thread Leela Krishna Amudala
Tomasz,

On Fri, Sep 27, 2013 at 3:42 PM, Tomasz Figa t.f...@samsung.com wrote:
 On Monday 23 of September 2013 19:11:11 Tomasz Figa wrote:
 On Monday 23 of September 2013 19:03:10 Bartlomiej Zolnierkiewicz wrote:
 
  Hi,
 
  On Wednesday, September 18, 2013 12:20:31 PM Leela Krishna Amudala wrote:
   Tomasz,
  
   On Wed, Sep 18, 2013 at 10:04 AM, Doug Anderson diand...@chromium.org 
   wrote:
Tomasz,
   
On Tue, Sep 17, 2013 at 6:30 AM, Tomasz Figa t.f...@samsung.com 
wrote:
I believe this is mandatory on Exynos 5420 and unused on previous 
SoCs. It
should be handled depending on compatible value.
   
I think at least 5250 needs something similar.  I believe we got away
with it in the past since other (non-WDT) code was tweaking with this
bit, but that was a little bit gross.  Leela Krishna can correct me if
I'm wrong.
   
  
   Yes, 5250 also needs this reset-mask-bit, but not required by SoCs
   other than Exynos5xxx.
   Hence I kept it as optional parameter.
  
   I took care of this code such that it won't break on older SoCs.
  
   If you notice the code in probe function, I used the check condition
  
   if (!IS_ERR(wdt-pmu_disable_reg)  !IS_ERR(wdt-pmu_mask_reset_reg)) {
   }
  
   i.e., if any of the PMU register address is not mentioned in the DT
   node it simply skips reading reset-mask-bit
   and continues execution (which may happen in older SoC DT node).
  
   ..also, in s3c2410wdt_mask_and_disable_reset() function, below
   condition check is happening
  
   if (IS_ERR(wdt-pmu_disable_reg) || IS_ERR(wdt-pmu_mask_reset_reg)
   || (wdt-pmu_mask_bit  0))
   return;
  
   i.e., if any of the registers is not specified in DT node simply
   return without programming
   PMU registers(which is true in case of older SoCs).
  
   If you think this doesn't sounds good way of handling older SoCs.
   I'll add new compatible string for Exynos5xxx and do like what you said. 
   :)
 
  Yes, please re-do the code per Tomasz's suggestions.
 
  This would also allow you to check return values of devm_ioremap_resource()
  calls in the probe method and require them to succeed in order to register
  watchdog device (which is unfortunately not what happens currently).

 Now as I think of it, the driver doesn't seem to reconfigure those PMU
 registers in any watchdog API callback, only in probe, remove, suspend
 and resume.

 Since we already have PMU driver in mach-exynos, which already has
 suspend/resume syscore ops, what about placing such configuration there
 instead?

 Any opinions on this?


In PMU we have control registers for other IPs (like USB, MIPI etc.,)
also and I'm not sure where those registers are getting configured.
If we want to configure WDT register in PMU driver then we have to
consider configuring control regs for other IPs also and the DT node
has to have all these control bit numbers. So instead of that I feel
configuring it in WDT driver looks fine.

Best Wishes,
Leela Krishna.

 Best regards,
 Tomasz

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Re: [PATCH 3/4] watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers adresses

2013-09-18 Thread Leela Krishna Amudala
Tomasz,

On Wed, Sep 18, 2013 at 10:04 AM, Doug Anderson diand...@chromium.org wrote:
 Tomasz,

 On Tue, Sep 17, 2013 at 6:30 AM, Tomasz Figa t.f...@samsung.com wrote:
 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
 @@ -7,8 +7,20 @@ occurred.
  Required properties:
  - compatible : should be samsung,s3c2410-wdt

 Since the WDT block of Exynos 5420 needs some extra configuration in PMU
 registers, it is no longer compatible with samsung.s3c2410-wdt. Please
 introduce separate compatible (samsung,exynos5420-wdt) and make the
 driver handle the additional configuration only if running on a device with
 this compatible value.

 I'd suggest introducing quirk system to the driver and adding a
 NEEDS_PMU_CONFIG quirk selected by DT match entry with samsung,exynos5420-
 wdt compatible.

  - reg : base physical address of the controller and length of memory
 mapped -  region.
 + region and the optional (addresses and length of memory mapped regions
 + of) PMU registers for masking/unmasking WDT.
  - interrupts : interrupt number to the cpu.

  Optional properties:
  - timeout-sec : contains the watchdog timeout in seconds.
 +- reset-mask-bit: bit number in the PMU registers to program mask/unmask
 WDT. +

 I believe this is mandatory on Exynos 5420 and unused on previous SoCs. It
 should be handled depending on compatible value.

 I think at least 5250 needs something similar.  I believe we got away
 with it in the past since other (non-WDT) code was tweaking with this
 bit, but that was a little bit gross.  Leela Krishna can correct me if
 I'm wrong.


Yes, 5250 also needs this reset-mask-bit, but not required by SoCs
other than Exynos5xxx.
Hence I kept it as optional parameter.

I took care of this code such that it won't break on older SoCs.

If you notice the code in probe function, I used the check condition

if (!IS_ERR(wdt-pmu_disable_reg)  !IS_ERR(wdt-pmu_mask_reset_reg)) {
}

i.e., if any of the PMU register address is not mentioned in the DT
node it simply skips reading reset-mask-bit
and continues execution (which may happen in older SoC DT node).

..also, in s3c2410wdt_mask_and_disable_reset() function, below
condition check is happening

if (IS_ERR(wdt-pmu_disable_reg) || IS_ERR(wdt-pmu_mask_reset_reg)
|| (wdt-pmu_mask_bit  0))
return;

i.e., if any of the registers is not specified in DT node simply
return without programming
PMU registers(which is true in case of older SoCs).

If you think this doesn't sounds good way of handling older SoCs.
I'll add new compatible string for Exynos5xxx and do like what you said. :)

Best Wishes,
Leela Krishna Amudala

 -Doug
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[PATCH] ARM: dts: exynos5: add pwm DT nodes to Exynos5250 and Exynos5420

2013-09-18 Thread Leela Krishna Amudala
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420

Signed-off-by: Andrew Bresticker abres...@chromium.org
Signed-off-by: Olof Johansson ol...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5250.dtsi |9 +
 arch/arm/boot/dts/exynos5420.dtsi |9 +
 2 files changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 864ae90..99abc72 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -521,6 +521,15 @@
};
};
 
+   pwm: pwm@12dd {
+   compatible = samsung,exynos4210-pwm;
+   reg = 0x12dd 0x100;
+   samsung,pwm-outputs = 0, 1, 2, 3;
+   #pwm-cells = 3;
+   clocks = clock 311;
+   clock-names = timers;
+   };
+
amba {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d537cd7..80afc8b 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -206,6 +206,15 @@
clock-names = uart, clk_uart_baud0;
};
 
+   pwm: pwm@12dd {
+   compatible = samsung,exynos4210-pwm;
+   reg = 0x12dd 0x100;
+   samsung,pwm-outputs = 0, 1, 2, 3;
+   #pwm-cells = 3;
+   clocks = clock 279;
+   clock-names = timers;
+   };
+
dp_phy: video-phy@10040728 {
compatible = samsung,exynos5250-dp-video-phy;
reg = 0x10040728 4;
-- 
1.7.10.4

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[PATCH 4/4] ARM: dts: exynos: add PMU registers addresses and mask bit to watchdog node

2013-09-17 Thread Leela Krishna Amudala
This patch adds support for specifying the pmu registers and masking bit
for watchdog to enable/disable and mask/unmask the watchdog reset request.

Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 arch/arm/boot/dts/exynos5.dtsi|2 +-
 arch/arm/boot/dts/exynos5250.dtsi |1 +
 arch/arm/boot/dts/exynos5420.dtsi |1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index a8bf0c2..e1cc6ef 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -104,7 +104,7 @@
 
watchdog@101D {
compatible = samsung,s3c2410-wdt;
-   reg = 0x101D 0x100;
+   reg = 0x101D 0x100, 0x10040408 0x4, 0x1004040c 0x4;
interrupts = 0 42 0;
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index 6bb42cf..8bf28a7a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -161,6 +161,7 @@
watchdog@101D {
clocks = clock 336;
clock-names = watchdog;
+   reset-mask-bit = 20;
status = okay;
};
 
diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 9fadc23..29235ea 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -189,6 +189,7 @@
watchdog@101D {
clocks = clock 316;
clock-names = watchdog;
+   reset-mask-bit = 0;
status = okay;
};
 
-- 
1.7.9.5

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[PATCH 3/4] watchdog: s3c2410_wdt: parse watchdog dt node to read PMU registers adresses

2013-09-17 Thread Leela Krishna Amudala
This patch parses the watchdog node to read pmu wdt sys registers addresses
and do mask/unmask enable/disable of WDT in probe and s2r scenarios.

Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
 .../devicetree/bindings/watchdog/samsung-wdt.txt   |   14 -
 drivers/watchdog/s3c2410_wdt.c |   56 
 2 files changed, 69 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
index 2aa486c..4c798e3 100644
--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt
@@ -7,8 +7,20 @@ occurred.
 Required properties:
 - compatible : should be samsung,s3c2410-wdt
 - reg : base physical address of the controller and length of memory mapped
-   region.
+   region and the optional (addresses and length of memory mapped regions
+   of) PMU registers for masking/unmasking WDT.
 - interrupts : interrupt number to the cpu.
 
 Optional properties:
 - timeout-sec : contains the watchdog timeout in seconds.
+- reset-mask-bit: bit number in the PMU registers to program mask/unmask WDT.
+
+Example:
+
+watchdog {
+   compatible = samsung,s3c2410-wdt;
+   reg = 0x101D 0x100, 0x10040408 0x4, 0x1004040c 0x4;
+   interrupts = 0 42 0;
+   status = disabled;
+   reset-mask-bit = 0;
+};
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 23aad7c..a68e4dd 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -94,6 +94,9 @@ struct s3c2410_wdt {
unsigned long   wtdat_save;
struct watchdog_device  wdt_device;
struct notifier_block   freq_transition;
+   void __iomem*pmu_disable_reg;
+   void __iomem*pmu_mask_reset_reg;
+   int pmu_mask_bit;
 };
 
 /* watchdog control routines */
@@ -111,6 +114,33 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct 
notifier_block *nb)
return container_of(nb, struct s3c2410_wdt, freq_transition);
 }
 
+static void s3c2410wdt_mask_and_disable_reset(int mask, struct s3c2410_wdt 
*wdt)
+{
+   unsigned int value;
+
+   if (IS_ERR(wdt-pmu_disable_reg) || IS_ERR(wdt-pmu_mask_reset_reg)
+|| (wdt-pmu_mask_bit  0))
+   return;
+
+   if (mask) {
+   value = readl(wdt-pmu_disable_reg);
+   value |= (1  wdt-pmu_mask_bit);
+   writel(value, wdt-pmu_disable_reg);
+
+   value = readl(wdt-pmu_mask_reset_reg);
+   value |= (1  wdt-pmu_mask_bit);
+   writel(value, wdt-pmu_mask_reset_reg);
+   } else {
+   value = readl(wdt-pmu_disable_reg);
+   value = ~(1  wdt-pmu_mask_bit);
+   writel(value, wdt-pmu_disable_reg);
+
+   value = readl(wdt-pmu_mask_reset_reg);
+   value = ~(1  wdt-pmu_mask_bit);
+   writel(value, wdt-pmu_mask_reset_reg);
+   }
+}
+
 static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
 {
struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
@@ -341,6 +371,8 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
unsigned int wtcon;
int started = 0;
int ret;
+   struct resource *res;
+   unsigned int mask_bit;
 
DBG(%s: probe=%p\n, __func__, pdev);
 
@@ -369,6 +401,25 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
goto err;
}
 
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+   wdt-pmu_disable_reg = devm_ioremap_resource(pdev-dev, res);
+
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+   wdt-pmu_mask_reset_reg = devm_ioremap_resource(pdev-dev, res);
+
+   if (!IS_ERR(wdt-pmu_disable_reg)  !IS_ERR(wdt-pmu_mask_reset_reg)) {
+   if (pdev-dev.of_node) {
+   if (of_property_read_u32(pdev-dev.of_node,
+   reset-mask-bit,
+   mask_bit)) {
+   dev_warn(dev, reset-mask-bit not specified\n);
+   wdt-pmu_mask_bit = -EINVAL;
+   } else {
+   wdt-pmu_mask_bit = mask_bit;
+   }
+   }
+   }
+
DBG(probe: mapped reg_base=%p\n, wdt-reg_base);
 
wdt-clock = devm_clk_get(dev, watchdog);
@@ -444,6 +495,7 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
 (wtcon  S3C2410_WTCON_RSTEN) ? en : dis,
 (wtcon  S3C2410_WTCON_INTEN) ? en : dis);
 
+   s3c2410wdt_mask_and_disable_reset(0, wdt);
return 0;
 
  err_cpufreq:
@@ -461,6 +513,7 @@ static int s3c2410wdt_remove(struct

  1   2   3   >