a generic
node name instead of using the chip's name.
Suggested-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
Signed-off-by: Javier Martinez Canillas jav...@osg.samsung.com
MBR, Sergei
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Hello.
On 7/13/2015 10:42 AM, Javier Martinez Canillas wrote:
The MAX77802 is a chip that contains regulators, 2 32kHz clocks,
a RTC and an I2C interface to program the individual components.
The are already DT bindings for the regulators and clocks and
these reference to a
Hello.
On 02/18/2015 09:25 PM, Andreas Färber wrote:
maxim,max98089 will be used for the Spring Chromebook.
Signed-off-by: Andreas Färber afaer...@suse.de
---
sound/soc/codecs/max98088.c | 8
1 file changed, 8 insertions(+)
diff --git a/sound/soc/codecs/max98088.c
Hello.
On 2/10/2015 2:46 PM, Krzysztof Kozlowski wrote:
All the device nodes for the Exynos5420 power-domains have a quite
generic power-domain name.
And this is in conformance to the ePAPR standard.
True, I forgot that the ePAPR recommends that the node names should be
somewhat
On 2/10/2015 3:17 PM, Krzysztof Kozlowski wrote:
Additionally (on Arndale Octa):
$ cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain status slaves
/device runtime status
Hello.
On 02/06/2015 08:37 PM, Javier Martinez Canillas wrote:
All the device nodes for the Exynos5420 power-domains have a quite
generic power-domain name.
And this is in conformance to the ePAPR standard.
So in case of an error, the Exynos PD
driver shows the following (not very
Fix using the bare numbers to set the 'wHubCharacteristics' field of the Hub
Descriptor while the values are #define'd in linux/usb/ch11.h.
While at it, stop setting already set HUB_CHAR_INDV_PORT_LPSM once again.
Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
---
drivers
Hello.
On 11/17/2014 9:36 AM, Vivek Gautam wrote:
The host controller by itself may sometimes need to handle PHY
and re-initialize it to re-configure some of the PHY parameters
to get full support out of the PHY controller.
Therefore, facilitate getting the two possible PHYs, viz.
USB 2.0 type
Hello.
On 10/31/2014 4:26 PM, Vivek Gautam wrote:
The host controller by itself may sometimes need to handle PHY
and re-initialize it to re-configure some of the PHY parameters
to get full support out of the PHY controller.
Therefore, facilitate getting the two possible PHYs, viz.
USB 2.0 type
Hello.
On 10/6/2014 1:08 PM, Paul Bolle wrote:
Commit d78c16ccde96 (ARM: SAMSUNG: Remove remaining legacy code)
removed the Kconfig symbol PLAT_S5P. Remove an optional dependency on
that symbol from this Kconfig file too.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Hello.
On 8/23/2014 3:03 AM, Sjoerd Simons wrote:
To enable the cros_ec_keyb driver to be auto-loaded when build as
module add an of match table (and export it) to match the modalias
information passed on to userspace as the Cros EC MFD driver registers
the MFD subdevices with an
Hello.
On 06/25/2014 12:44 PM, Vivek Gautam wrote:
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 9ffecd5..453d89e 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1582,6 +1582,9 @@ struct xhci_hcd {
u32 port_status_u0;
Hello.
On 06/10/2014 12:22 AM, Julius Werner wrote:
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 9ffecd5..453d89e 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1582,6 +1582,9 @@ struct xhci_hcd {
u32 port_status_u0;
Hello.
On 05/10/2014 01:57 PM, Vivek Gautam wrote:
Using devm_ioremap_resource() API should actually be preferred over
devm_ioremap(), since the former request the mem region first and then
gives back the ioremap'ed memory pointer.
devm_ioremap_resource() calls request_mem_region(), therby
Hello.
On 04/23/2014 11:34 PM, Heiko Stübner wrote:
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and
On 04/24/2014 12:42 AM, Sergei Shtylyov wrote:
The s3c24xx cpufreq driver needs to change the mpll speed and was doing
this by writing raw values from a translation table into the MPLLCON
register.
Change this to use a regular clk_set_rate call when using the common
clock framework and only
Hello.
On 01/10/2014 06:04 AM, Pankaj Dubey wrote:
If used 64 bit compiler GCC warns that:
drivers/net/ethernet/smsc/smc91x.c:1897:7:
warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
This patch fixes this by changing typecase from unsigned int to unsigned
Hello.
On 23-07-2013 3:49, Tomasz Figa wrote:
Some platforms have read-only clock muxes that are preconfigured at
reset and cannot be changed at runtime. This patch extends mux clock
driver to allow handling such read-only muxes by adding new
CLK_MUX_READ_ONLY mux flag.
Signed-off-by:
Hello.
On 09-04-2013 13:21, Vivek Gautam wrote:
7edb3da makes ehci-s5p as a separate driver. But,
Please also provide the summary line of that commit in parens.
it raised an issue with its driver data.
Now that 's5p_ehci_hcd' doesn't maintain pointer to 'usb_hcd'
and s5p_ehci is nothing
Hello.
On 14-03-2013 4:59, Alexander Graf wrote:
When running on an exynos 5250 SoC, we don't initialize the architected
timers. The chip however supports architected timers.
When we don't initialize them, KVM will try to access them and run into
NULL pointer dereferences attempting to do
Hello.
On 12/26/2012 09:42 PM, Dongjin Kim wrote:
This patch support to get interrupt resource from device tree as well as
platform device if ehci node is defined in device tree and it's irq is
described.
Signed-off-by: Dongjin Kim tobet...@gmail.com
---
drivers/usb/host/ehci-s5p.c |
Hello.
On 02-11-2012 17:01, Dimitris Papastamos wrote:
We are using S3C_EINT(4) instead of S3C_EINT(5).
Change-Id: I84e77fd75d59c6b8fecbcb11e81dc78dbf07f156
You still hasven't removed this line. :-)
Signed-off-by: Dimitris Papastamos d...@opensource.wolfsonmicro.com
WBR, Sergei
Hello.
On 02-11-2012 14:38, Dimitris Papastamos wrote:
We are using S3C_EINT(4) instead of S3C_EINT(5).
Change-Id: Ia197069ddc736813f2711c763469eaf655ea58ac
Remove this line please -- it has no place in the upstream patch.
Signed-off-by: Dimitris Papastamos
Hello.
On 31-07-2012 16:23, Leela Krishna Amudala wrote:
Exynos5 has VIDTCON and VIDCON registers at different offsets
from the previous SOCs. Hence, adding the macros.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
---
include/video/samsung_fimd.h |7 +++
1 files
Hello.
On 04/25/2012 08:12 AM, Tushar Behera wrote:
CC: Ben Dooksben-li...@fluff.org
CC: Kukjin Kimkgene@samsung.com
Signed-off-by: Tushar Beheratushar.beh...@linaro.org
---
arch/arm/mach-s3c24xx/mach-qt2410.c | 12 ++--
1 files changed, 2 insertions(+), 10 deletions(-)
Hello.
On 04/25/2012 08:12 AM, Tushar Behera wrote:
CC: Ben Dooksben-li...@fluff.org
CC: Kukjin Kimkgene@samsung.com
Signed-off-by: Tushar Beheratushar.beh...@linaro.org
---
arch/arm/mach-s3c24xx/mach-osiris.c | 12 ++--
1 files changed, 2 insertions(+), 10 deletions(-)
Hello.
Marek Szyprowski wrote:
Fix registration to runtime pw and add missing resume callback.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/iommu/exynos-iommu.c | 20 ++--
1 files changed, 18
Hello.
On 06-04-2012 12:00, Marek Szyprowski wrote:
Some bootloadered
Bootloaders?
disable unused power domains, so kernel code should
read the actual state from the hardware registers instead of assuming
that their initial state is 'on'.
Signed-off-by: Marek
Hello.
On 29-03-2012 4:14, Kukjin Kim wrote:
This patch fixes missing mach-s3c24xx/common.h which has been
lost when regarding s3c24xx directories merged.
Signed-off-by: Kukjin Kimkgene@samsung.com
---
arch/arm/mach-s3c24xx/common.h | 23 +++
1 files changed, 23
Hello.
On 01/31/2012 08:56 PM, Thomas Abraham wrote:
max_width member in platform data can be used to derive the mmc bus transfer
width that can be supported by the controller.
Signed-off-by: Thomas Abrahamthomas.abra...@linaro.org
---
drivers/mmc/host/sdhci-s3c.c |8
1
Hello.
On 13-01-2012 17:47, Gusakov Andrey wrote:
In commit bb072c3cf21d1c9a5a2eeb5a00679ee7bf39675b suspend/resume
Please also specify that commit's summary in parens.
hooks were added. s3c2410_dma_suspend suspends channels from 0 to
dma_channels. s3c2410_dma_resume resumes channels in
Hello.
On 08-08-2011 17:11, Sylwester Nawrocki wrote:
This is a regression fix after migration to the external GIC.
The breakage has been introduced in commit:
ARM: EXYNOS4: modify interrupt mappings for external GIC
Would be good to also cite that commit's ID for gitweb.
Signed-off-by:
Hello.
On 09-08-2011 12:06, Russell King - ARM Linux wrote:
CCing linux-usb and Felipe...
Signed-off-by: Russell Kingrmk+ker...@arm.linux.org.uk
---
drivers/usb/musb/davinci.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/musb/davinci.c
Hello.
On 22-06-2011 12:46, Kukjin Kim wrote:
From: Jaecheol Leejc@samsung.com
We need to balance between set and check S5P_CENTRAL_SEQ_CONFIGURATION
register in syscore_ops suspend/resume function when failure in enter
suspend mode. Moved this register setting for PM for the purpose of
Hello.
On 21-06-2011 11:03, p.pan...@samsung.com wrote:
From: Praveen Panerip.pan...@samsung.com
Adding dwc driver name in existing platform device
to probe DWC OTG driver.
Introduced otg_set_platdata function to pass platform data
Added selectable config option to add DWC OTG driver for
Hello.
On 21-06-2011 15:49, Felipe Balbi wrote:
From: Praveen Panerip.pan...@samsung.com
Adding dwc driver name in existing platform device
to probe DWC OTG driver.
Introduced otg_set_platdata function to pass platform data
Added selectable config option to add DWC OTG driver for different
Hello.
Heiko Stübner wrote:
s3c2410_dma_chan is not a type itself, so struct is required.
Your signoffs are missing, so your patches can't be applied...
WBR, Sergei
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Hello.
On 31-05-2011 0:34, Heiko Stübner wrote:
s3c24xx_irq_syscore_ops is only defined in mach-s3c2410/irq.c which is
not used by s3c2416.
Also s3c2410_dma_chan needs a struct prefix
Saying also seems a good sign that you should do two patches instead.
WBR, Sergei
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Hello.
On 13-05-2011 11:03, Kukjin Kim wrote:
From: Jonghwan Choijhbird.c...@samsung.com
Signed-off-by: Jonghwan Choijhbird.c...@samsung.com
Signed-off-by: Kukjin Kimkgene@samsung.com
---
arch/arm/mach-s5pv210/cpufreq.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
Hello.
On 08-05-2011 0:26, Heiko Stübner wrote:
From: Thomas Abrahamthomas...@samsung.com
S3C2416, S3C2443 and S3C2450 includes a USB High-Speed Gadget controller module.
This patch adds the following for supporting this controller.
1. Definition for USB High-Speed controller base
Hello.
On 21-10-2010 12:04, Kukjin Kim wrote:
From: Daein Moonmoon9...@samsung.com
This patch adds the s3c_gpio_getpull() API that has been missed in the
plat-samsung/gpio-config.c and actullay there is its extern declaration
in plat/gpio-cfg.h.
Signed-off-by: Daein
Hello.
On 28-09-2010 5:31, Kukjin Kim wrote:
From: Changhwan Younchaos.y...@samsung.com
It is reported by Junseok Jung that using clz instruction is
better instead of using for-loop to find the interrupt source.
This patch modifies interrupt source searching code using __fls().
The __fls()
Hello.
Kukjin Kim wrote:
Fix this warning:
arch/arm/mm/init.c: In function 'mem_init':
arch/arm/mm/init.c:644: warning: format '%08lx' expects type
'long unsigned int', but argument 12 has type 'unsigned int'
Reported-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Kukjin Kim
Hello.
Kukjin Kim wrote:
This patch fixes on following build warnings.
warning: (CPU_S3C2440 ARCH_S3C2410 S3C2410_DMA) selects S3C2440_DMA which
has unmet direct dependencies (ARCH_S3C2410 CPU_S3C24405B)
warning: (CPU_S3C2440 ARCH_S3C2410 || CPU_S3C2442 ARCH_S3C2410)
Hello.
MyungJoo Ham wrote:
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by:
Hello.
Kukjin Kim wrote:
From: Changhwan Youn chaos.y...@samsung.com
FRACVAL register provides the same function as UDIVSLOT register which is
the 1/16ths adjustment to the baud rate but the implementaiton is easier.
To support UDIVSLOT register, UDIVSLOT table search is necessary though
Hello.
Kukjin Kim wrote:
From: Taekgyun Ko taeggyun...@samsung.com
RTC needs to be initialized when BCD registers have invalid value.
Signed-off-by: Taekgyun Ko taeggyun...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
[...]
diff --git a/drivers/rtc/rtc-s3c.c
-by: Kukjin Kim kgene@samsung.com
Cc: Ben Dooks ben-li...@fluff.org
There's probably still a place for improvement... sorry that I dind't
notice before. Other than that:
Acked-by: Sergei Shtylyov sshtyl...@mvista.com
[...]
diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata
Hello.
Kukjin Kim wrote:
From: Abhilash Kesavan a.kesa...@samsung.com
Adds support for the Samsung PATA controller. This driver is based on the
Libata subsystem and references the earlier patches sent for IDE subsystem.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by:
Hello.
Ben Dooks wrote:
Limit the IN FIFO write to a single packet per attempt at writing,
as per the specifications and ensure that we don't return fifo-full
so that we can continue writing packets if we have the space.
Signed-off-by: Ben Dooks ben-li...@fluff.org
[...]
diff --git
Hello.
Kukjin Kim wrote:
This patch fixes on SECTION_SIZE_BITS for Sparsemem on S5PV210/S5PC110.
Because smallest size of a bank on S5PV210/S5PC110 is aligned by 16MB.
So each section's maximum size should be 16MB.
Reported-by: Kyongho Cho pullip@samsung.com
Signed-off-by: Kukjin Kim
Hello.
Russell King - ARM Linux wrote:
How do you think?
May I send this to your patch tracking system?
Or...how should I handle this?
If Jeff is happy, then I'm happy. However, shouldn't it also have Ben's
ack?
I for one still have comments to be addressed, will post in a jiffy...
Hello.
Kukjin Kim wrote:
From: Abhilash Kesavan a.kesa...@samsung.com
Adds support for the Samsung PATA controller. This driver is based on the
Libata subsystem and references the earlier patches sent for IDE subsystem.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by:
Hello.
Kukjin Kim wrote:
From: Abhilash Kesavan a.kesa...@samsung.com
Adds support for the Samsung PATA controller. This driver is based on the
Libata subsystem and references the earlier patches sent for IDE subsystem.
Hi,
Thanks for your comments.
Signed-off-by: Abhilash Kesavan
Hello.
Kukjin Kim wrote:
From: Abhilash Kesavan a.kesa...@samsung.com
Adds support for the Samsung PATA controller. This driver is based on the
Libata subsystem and references the earlier patches sent for IDE subsystem.
Where I those I wonder? :-)
It's a pity they didn't get accepted.
Hello.
Ben Dooks wrote:
Add s3c_gpio_cfgpin_range() to configure a range of pins to the given
value. This is useful for a number of blocks where the pins are in order
and saves multiple calls to s3c_gpio_cfgpin().
Signed-off-by: Ben Dooks ben-li...@fluff.org
A little kerneldoc
Hello.
Ben Dooks wrote:
Add a function to configure a range of GPIOs function and
pull in one go, mainly for the SDHCI and framebuffer helpers
which tend to do this.
Signed-off-by: Ben Dooks ben-li...@fluff.org
Another little correction.
diff --git
Hello.
Ben Dooks wrote:
From: Thomas Abraham thomas...@samsung.com
This patch modifies the following in S3C hsotg driver.
1. Gets a reference to the USB OTG hclk clock and enables it. This is
required for plaforms on which the USB OTG hclk is disabled during
the boot time clock
Hello.
Kukjin Kim wrote:
From: Abhilash Kesavan a.kesa...@samsung.com
Adds support for the Samsung PATA controller. This driver is based on the
Libata subsystem and references the earlier patches sent for IDE subsystem.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by:
Hello.
Kukjin Kim wrote:
From: Banajit Goswami banaji...@samsung.com
In case the WDT device memory allocation fails, this patch modifies the
This is not memory allocation.
driver such that, it does not try to free the memory on exit.
Signed-off-by: Banajit Goswami
Hello.
Ben Dooks wrote:
Add the required DMA masks to the hs-otg device definition to allow DMA
to work with it.
Signed-off-by: Ben Dooks ben-li...@fluff.org
---
arch/arm/plat-samsung/dev-usb-hsotg.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git
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