On 9 May 2014 14:04, Chander Kashyap chander.kash...@linaro.org wrote:
On 9 May 2014 13:47, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On 09.05.2014 09:50, Chander Kashyap wrote:
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of
Hi Chander,
On 09.05.2014 09:50, Chander Kashyap wrote:
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power registers in pmu is based on cpu number
offsets. This function
On 9 May 2014 13:47, Tomasz Figa t.f...@samsung.com wrote:
Hi Chander,
On 09.05.2014 09:50, Chander Kashyap wrote:
On 5 May 2014 09:37, Chander Kashyap chander.kash...@linaro.org wrote:
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power
On 25 April 2014 11:14, Chander Kashyap chander.kash...@linaro.org wrote:
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multicluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multicluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
---
