On 20 July 2012 16:08, Seungwon Jeon tgih@samsung.com wrote:
July 20, 2012, Thomas Abraham thomas.abra...@linaro.org wrote:
On 19 July 2012 09:21, Seungwon Jeon tgih@samsung.com wrote:
[...]
+static unsigned long exynos5250_dwmmc_caps[4] = {
+ MMC_CAP_UHS_DDR50 |
July 23, 2012, Thomas Abraham thomas.abra...@linaro.org wrote:
On 20 July 2012 16:08, Seungwon Jeon tgih@samsung.com wrote:
July 20, 2012, Thomas Abraham thomas.abra...@linaro.org wrote:
On 19 July 2012 09:21, Seungwon Jeon tgih@samsung.com wrote:
[...]
+static unsigned long
On 19 July 2012 09:21, Seungwon Jeon tgih@samsung.com wrote:
Hi,
This version does not seems to consider previous reviews fully.
Could you check the comments below?
I did try to address all the comments. I will check again and resubmit
if I have missed anything.
July 12, 2012, Thomas
Hi,
This version does not seems to consider previous reviews fully.
Could you check the comments below?
July 12, 2012, Thomas Abraham thomas.abra...@linaro.org wrote:
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase
The instantiation of the Synopsis Designware controller on Exynos5250
include extension for SDR and DDR specific tx/rx phase shift timing
and CIU internal divider. In addition to that, the option to skip the
command hold stage is also introduced. Add support for these Exynos5250
specfic
