On Tue, Feb 12, 2013 at 1:05 AM, Heiko Stübner he...@sntech.de wrote:
The s3c2412 handles the eints 0 to 3 different than all the other SoCs
of the 24xx range. These eints must be acked and masked in the regular
bits as well as the bits 0 to 3 of the eint registers, which are unused
on the
Am Freitag, 15. Februar 2013, 15:48:52 schrieb Linus Walleij:
On Tue, Feb 12, 2013 at 1:05 AM, Heiko Stübner he...@sntech.de wrote:
The s3c2412 handles the eints 0 to 3 different than all the other SoCs
of the 24xx range. These eints must be acked and masked in the regular
bits as well as
The s3c2412 handles the eints 0 to 3 different than all the other SoCs
of the 24xx range. These eints must be acked and masked in the regular
bits as well as the bits 0 to 3 of the eint registers, which are unused
on the other SoCs.
This of course can be realized using the new infrastructure with