RE: [PATCH v2 1/2] mmc: sdhci-s3c: add default controller configuration

[Kukjin Kim]

Chris Ball wrote:
> 
> Hi,
> 
> On Wed, Sep 21 2011, Kukjin Kim wrote:
> > Acked-by: Kukjin Kim 
> >
> > Hi Chris,
> >
> > This is ok to me. Could you please pick this up in your tree so that I
can
> > pick 2nd patch up in my tree.
> >
> > As you know, this patch has no dependency with patch2/2 so that you can
> > handle without any conflicts.
> 
> Thanks, pushed to mmc-next for 3.2.
> 
Thanks!

> I've been waiting for kernel.org to come back up, but I think later

Yeah, I know...

> today I'll just move mmc-next to git://dev.laptop.org/users/cjb/mmc,
> so this will be available in linux-next soon.
> 
Yes, I also moved my tree to git://github.com/kgene/linux-samsung.git...

Anyway, thanks for your information.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCH v2 1/2] mmc: sdhci-s3c: add default controller configuration

[Chris Ball]

Hi,

On Wed, Sep 21 2011, Kukjin Kim wrote:
> Acked-by: Kukjin Kim 
>
> Hi Chris,
>
> This is ok to me. Could you please pick this up in your tree so that I can
> pick 2nd patch up in my tree.
>
> As you know, this patch has no dependency with patch2/2 so that you can
> handle without any conflicts.

Thanks, pushed to mmc-next for 3.2.

I've been waiting for kernel.org to come back up, but I think later
today I'll just move mmc-next to git://dev.laptop.org/users/cjb/mmc,
so this will be available in linux-next soon.

- Chris.
-- 
Chris Ball  
One Laptop Per Child
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RE: [PATCH v2 1/2] mmc: sdhci-s3c: add default controller configuration

[Kukjin Kim]

Thomas Abraham wrote:
> 
> The default controller configuration which was previously setup by
> platform helper functions is moved into the driver.
> 
> Cc: Ben Dooks 
> Signed-off-by: Thomas Abraham 

Acked-by: Kukjin Kim 

Hi Chris,

This is ok to me. Could you please pick this up in your tree so that I can
pick 2nd patch up in my tree.

As you know, this patch has no dependency with patch2/2 so that you can
handle without any conflicts.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

> ---
>  drivers/mmc/host/sdhci-s3c.c |   28 +---
>  1 files changed, 17 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index 2bd7bf4..d891682 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host
*host,
> unsigned int clock)
>   writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
>   }
> 
> - /* reconfigure the hardware for new clock rate */
> -
> - {
> - struct mmc_ios ios;
> -
> - ios.clock = clock;
> -
> - if (ourhost->pdata->cfg_card)
> - (ourhost->pdata->cfg_card)(ourhost->pdev, host-
> >ioaddr,
> -&ios, NULL);
> - }
> + /* reprogram default hardware configuration */
> + writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
> + host->ioaddr + S3C64XX_SDHCI_CONTROL4);
> +
> + ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
> + ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
> +   S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
> +   S3C_SDHCI_CTRL2_ENFBCLKRX |
> +   S3C_SDHCI_CTRL2_DFCNT_NONE |
> +   S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
> + writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
> +
> + /* reconfigure the controller for new clock rate */
> + ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
> + if (clock < 25 * 100)
> + ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 |
> S3C_SDHCI_CTRL3_FCSEL2);
> + writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
>  }
> 
>  /**
> --
> 1.6.6.rc2

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[PATCH v2 1/2] mmc: sdhci-s3c: add default controller configuration

[Thomas Abraham]

The default controller configuration which was previously setup by
platform helper functions is moved into the driver.

Cc: Ben Dooks 
Signed-off-by: Thomas Abraham 
---
 drivers/mmc/host/sdhci-s3c.c |   28 +---
 1 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index 2bd7bf4..d891682 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, 
unsigned int clock)
writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
}
 
-   /* reconfigure the hardware for new clock rate */
-
-   {
-   struct mmc_ios ios;
-
-   ios.clock = clock;
-
-   if (ourhost->pdata->cfg_card)
-   (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
-  &ios, NULL);
-   }
+   /* reprogram default hardware configuration */
+   writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+   host->ioaddr + S3C64XX_SDHCI_CONTROL4);
+
+   ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
+   ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+ S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+ S3C_SDHCI_CTRL2_ENFBCLKRX |
+ S3C_SDHCI_CTRL2_DFCNT_NONE |
+ S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+   writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+   /* reconfigure the controller for new clock rate */
+   ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+   if (clock < 25 * 100)
+   ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
+   writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 }
 
 /**
-- 
1.6.6.rc2

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