Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
On 2015년 06월 12일 18:05, Marek Szyprowski wrote:
Hello,
On 2015-06-11 17:04, Inki Dae wrote:
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 96618534358e..3ec9d4299a86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,12 +242,21 @@ static void
fimd_enable_shadow_channel_path(struct fimd_context *ctx,
writel(val, ctx-regs + SHADOWCON);
}
+static int fimd_enable_vblank(struct exynos_drm_crtc *crtc);
+static void fimd_disable_vblank(struct exynos_drm_crtc *crtc);
You can remove abvoe declarations. See the below comment.
+
static void fimd_clear_channel(struct fimd_context *ctx)
{
unsigned int win, ch_enabled = 0;
DRM_DEBUG_KMS(%s\n, __FILE__);
+/* Hardware is in unknown state, so ensure it gets enabled
properly */
+pm_runtime_get_sync(ctx-dev);
+
+clk_prepare_enable(ctx-bus_clk);
+clk_prepare_enable(ctx-lcd_clk);
+
/* Check if any channel is enabled. */
for (win = 0; win WINDOWS_NR; win++) {
u32 val = readl(ctx-regs + WINCON(win));
@@ -265,12 +274,17 @@ static void fimd_clear_channel(struct
fimd_context *ctx)
/* Wait for vsync, as disable channel takes effect at next
vsync */
if (ch_enabled) {
-unsigned int state = ctx-suspended;
-
-ctx-suspended = 0;
+ctx-suspended = false;
+fimd_enable_vblank(ctx-crtc);
I think you can call enable_vblank callback instead of
fimd_enable_vblank function because ctx object has exynos_crtc object.
i.e.,
struct exynos_drm_crtc_ops *ops = ctx-crtc-ops;
...
if (ops-enable_vblank)
ops-enable_vblank(ctx-crtc);
...
Well, I don't like such indirect calls to known functions, but if you
prefer
this approach I will send an updated patch in a minute. There is also
alternative
way of getting rid of forward declarations. Code of fimd_enable_vblank and
fimd_disable_vblank can be moved closer to fimd_wait_vblank function.
I will also send such alternative patch. Feel free to select the one
that better
fits your preferences.
Latter one it's better.
Thanks,
Inki Dae
fimd_wait_for_vblank(ctx-crtc);
-ctx-suspended = state;
+fimd_disable_vblank(ctx-crtc);
Ditto.
Thanks,
Inki Dae
+ctx-suspended = true;
}
+
+clk_disable_unprepare(ctx-lcd_clk);
+clk_disable_unprepare(ctx-bus_clk);
+
+pm_runtime_put(ctx-dev);
}
static int fimd_iommu_attach_devices(struct fimd_context *ctx,
Best regards
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Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
Hello,
On 2015-06-11 17:04, Inki Dae wrote:
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 96618534358e..3ec9d4299a86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,12 +242,21 @@ static void fimd_enable_shadow_channel_path(struct
fimd_context *ctx,
writel(val, ctx-regs + SHADOWCON);
}
+static int fimd_enable_vblank(struct exynos_drm_crtc *crtc);
+static void fimd_disable_vblank(struct exynos_drm_crtc *crtc);
You can remove abvoe declarations. See the below comment.
+
static void fimd_clear_channel(struct fimd_context *ctx)
{
unsigned int win, ch_enabled = 0;
DRM_DEBUG_KMS(%s\n, __FILE__);
+ /* Hardware is in unknown state, so ensure it gets enabled properly */
+ pm_runtime_get_sync(ctx-dev);
+
+ clk_prepare_enable(ctx-bus_clk);
+ clk_prepare_enable(ctx-lcd_clk);
+
/* Check if any channel is enabled. */
for (win = 0; win WINDOWS_NR; win++) {
u32 val = readl(ctx-regs + WINCON(win));
@@ -265,12 +274,17 @@ static void fimd_clear_channel(struct fimd_context *ctx)
/* Wait for vsync, as disable channel takes effect at next vsync */
if (ch_enabled) {
- unsigned int state = ctx-suspended;
-
- ctx-suspended = 0;
+ ctx-suspended = false;
+ fimd_enable_vblank(ctx-crtc);
I think you can call enable_vblank callback instead of
fimd_enable_vblank function because ctx object has exynos_crtc object.
i.e.,
struct exynos_drm_crtc_ops *ops = ctx-crtc-ops;
...
if (ops-enable_vblank)
ops-enable_vblank(ctx-crtc);
...
Well, I don't like such indirect calls to known functions, but if you prefer
this approach I will send an updated patch in a minute. There is also
alternative
way of getting rid of forward declarations. Code of fimd_enable_vblank and
fimd_disable_vblank can be moved closer to fimd_wait_vblank function.
I will also send such alternative patch. Feel free to select the one
that better
fits your preferences.
fimd_wait_for_vblank(ctx-crtc);
- ctx-suspended = state;
+ fimd_disable_vblank(ctx-crtc);
Ditto.
Thanks,
Inki Dae
+ ctx-suspended = true;
}
+
+ clk_disable_unprepare(ctx-lcd_clk);
+ clk_disable_unprepare(ctx-bus_clk);
+
+ pm_runtime_put(ctx-dev);
}
static int fimd_iommu_attach_devices(struct fimd_context *ctx,
Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland
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Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 96618534358e..3ec9d4299a86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,12 +242,21 @@ static void fimd_enable_shadow_channel_path(struct
fimd_context *ctx,
writel(val, ctx-regs + SHADOWCON);
}
+static int fimd_enable_vblank(struct exynos_drm_crtc *crtc);
+static void fimd_disable_vblank(struct exynos_drm_crtc *crtc);
You can remove abvoe declarations. See the below comment.
+
static void fimd_clear_channel(struct fimd_context *ctx)
{
unsigned int win, ch_enabled = 0;
DRM_DEBUG_KMS(%s\n, __FILE__);
+ /* Hardware is in unknown state, so ensure it gets enabled properly */
+ pm_runtime_get_sync(ctx-dev);
+
+ clk_prepare_enable(ctx-bus_clk);
+ clk_prepare_enable(ctx-lcd_clk);
+
/* Check if any channel is enabled. */
for (win = 0; win WINDOWS_NR; win++) {
u32 val = readl(ctx-regs + WINCON(win));
@@ -265,12 +274,17 @@ static void fimd_clear_channel(struct fimd_context *ctx)
/* Wait for vsync, as disable channel takes effect at next vsync */
if (ch_enabled) {
- unsigned int state = ctx-suspended;
-
- ctx-suspended = 0;
+ ctx-suspended = false;
+ fimd_enable_vblank(ctx-crtc);
I think you can call enable_vblank callback instead of
fimd_enable_vblank function because ctx object has exynos_crtc object.
i.e.,
struct exynos_drm_crtc_ops *ops = ctx-crtc-ops;
...
if (ops-enable_vblank)
ops-enable_vblank(ctx-crtc);
...
fimd_wait_for_vblank(ctx-crtc);
- ctx-suspended = state;
+ fimd_disable_vblank(ctx-crtc);
Ditto.
Thanks,
Inki Dae
+ ctx-suspended = true;
}
+
+ clk_disable_unprepare(ctx-lcd_clk);
+ clk_disable_unprepare(ctx-bus_clk);
+
+ pm_runtime_put(ctx-dev);
}
static int fimd_iommu_attach_devices(struct fimd_context *ctx,
--
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Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
Hello,
On 2015-06-04 15:13, Inki Dae wrote:
On 2015년 06월 04일 22:08, Inki Dae wrote:
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
I have tested this patch series on trats2 board which uses Exynos4412
SoC. However, the booting is halted out. Without iommu, the booting and
display works well.
For this test, I also merged another your patch series in iommu exynos
tree and added device node relevant codes like below,
in exynos4.dtsi file:
fimd: fimd@11c0 {
...
iommus = sysmmu_fimd0;
...
sysmmu_fimd0: sysmmu@11E2 {
compatible = samsung,exynos-sysmmu;
reg = 0x11E2 0x1000;
interrupt-parent = combiner;
interrupts = 5 2;
clock-names = sysmmu, master;
clocks = clock CLK_SMMU_FIMD0, clock CLK_FIMD0;
power-domains = pd_lcd0;
#iommu-cells = 0;
};
in exynos4412-trats2.dts file:
fimd@11c0 {
status = okay;
iommu-reserved-mapping = 0x4000 0x4000 0x4000;
};
Can you check it out?
In addition, sometimes I see below kernel panic logs which means page
fault to fimd occurs while booting:
It looks that you didn't apply patch '[PATCH v7 24/25] ARM: DMA-mapping: add
support for creating reserved mappings in iova space'
(http://thread.gmane.org/gmane.linux.kernel.samsung-soc/45416/focus=45429 ).
There was no consensus on it and it was left unmerged. I will check if it
can be reworked on top of recently introduced iommu default domains feature,
however it would be great if the fixed for FIMD and DRM gets merged earlier,
so the issues in the drivers will no longer be a source of the problem.
[0.394228] 1380.serial: ttySAC0 at MMIO 0x1380 (irq = 56,
base_baud = 0) is a S3C6400/10
[0.394788] 1381.serial: ttySAC1 at MMIO 0x1381 (irq = 57,
base_baud = 0) is a S3C6400/10
[0.395281] 1382.serial: ttySAC2 at MMIO 0x1382 (irq = 58,
base_baud = 0) is a S3C6400/10
[1.122219] console [ttySAC2] enabled
[1.126419] 1383.serial: ttySAC3 at MMIO 0x1383 (irq = 59,
base_baud = 0) is a S3C6400/10
[1.136250] [drm] Initialized drm 1.1.0 20060810
[1.142710] PAGE FAULT occurred at 0x52188000 by 11e2.sysmmu(Page
table base: 0x6ea8)
[1.149754] Lv1 entry: 0x6e92dc01
[1.153172] [ cut here ]
[1.157740] kernel BUG at drivers/iommu/exynos-iommu.c:364!
[1.163296] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[1.169110] Modules linked in:
[1.172154] CPU: 0 PID: 0 Comm: swapper/0 Not tainted
4.1.0-rc4-00563-gee14f4e-dirty #1384
[1.180394] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[1.186472] task: c06d2df0 ti: c06ce000 task.ti: c06ce000
[1.191861] PC is at exynos_sysmmu_irq+0x184/0x208
[1.196628] LR is at exynos_sysmmu_irq+0xd4/0x208
[1.201316] pc : [c02677cc]lr : [c026771c]psr: 6193
[1.201316] sp : c06cfe90 ip : fp :
[1.212772] r10: c06ff6a3 r9 : 0521 r8 : 52188000
[1.217980] r7 : eea8 r6 : ee9b3428 r5 : ee9b3410 r4 :
[1.224489] r3 : 6e92dc01 r2 : 6e92dc01 r1 : eea55810 r0 : ee9c4e00
[1.231002] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[1.238378] Control: 10c5387d Table: 4000404a DAC: 0015
[1.244107] Process swapper/0 (pid: 0, stack limit = 0xc06ce210)
[1.250096] Stack: (0xc06cfe90 to 0xc06d)
[1.254438] fe80: c06cfe9c
c039caac eef82b80 6ea8
[1.262599] fea0: 16b1580f ee9b4240 ee84ad20
0026 ee84acc0 c0060308
[1.270757] fec0: eef81380 ee84acc0 ee84ad20 ee9b4240
0015 ee804450 c06cff68
[1.278916] fee0: ee808000 c0060400 ee84acc0 ee84ad20 ee807000
c00630a8 0026 c06dddb8
[1.287075] ff00: ee807000 c005f98c 000a c0200ccc 0015
0015
[1.295235] ff20: 0001 c005f98c c06caaac c005fc58 f002000c
0015 c06d07a0 c06cff68
[1.303394] ff40: f002 c06ff6a1 0001 c0009434 c0010068
6113 c06cff9c
[1.311553] ff60: c06cffb8 c0012f40 1288
c001c880 c06ce000 c06d04f8
[1.319712] ff80: c04a1f50 c06c92c4 c06cffb8 c06ff6a1 0001
0100 c06cffb0
[1.327871] ffa0: c0010064 c0010068 6113 c06ce000
c0053f58 c067bc54
[1.336031] ffc0: c067b678
c06a70b8 c07023d4 c06d0480
[1.344190] ffe0: c06a70b4 c06d3f04 4000406a 413fc090
4000807c
[
Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
Hi Marek,
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
I have tested this patch series on trats2 board which uses Exynos4412
SoC. However, the booting is halted out. Without iommu, the booting and
display works well.
For this test, I also merged another your patch series in iommu exynos
tree and added device node relevant codes like below,
in exynos4.dtsi file:
fimd: fimd@11c0 {
...
iommus = sysmmu_fimd0;
...
sysmmu_fimd0: sysmmu@11E2 {
compatible = samsung,exynos-sysmmu;
reg = 0x11E2 0x1000;
interrupt-parent = combiner;
interrupts = 5 2;
clock-names = sysmmu, master;
clocks = clock CLK_SMMU_FIMD0, clock CLK_FIMD0;
power-domains = pd_lcd0;
#iommu-cells = 0;
};
in exynos4412-trats2.dts file:
fimd@11c0 {
status = okay;
iommu-reserved-mapping = 0x4000 0x4000 0x4000;
};
Can you check it out?
Thanks,
Inki Dae
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 96618534358e..3ec9d4299a86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,12 +242,21 @@ static void fimd_enable_shadow_channel_path(struct
fimd_context *ctx,
writel(val, ctx-regs + SHADOWCON);
}
+static int fimd_enable_vblank(struct exynos_drm_crtc *crtc);
+static void fimd_disable_vblank(struct exynos_drm_crtc *crtc);
+
static void fimd_clear_channel(struct fimd_context *ctx)
{
unsigned int win, ch_enabled = 0;
DRM_DEBUG_KMS(%s\n, __FILE__);
+ /* Hardware is in unknown state, so ensure it gets enabled properly */
+ pm_runtime_get_sync(ctx-dev);
+
+ clk_prepare_enable(ctx-bus_clk);
+ clk_prepare_enable(ctx-lcd_clk);
+
/* Check if any channel is enabled. */
for (win = 0; win WINDOWS_NR; win++) {
u32 val = readl(ctx-regs + WINCON(win));
@@ -265,12 +274,17 @@ static void fimd_clear_channel(struct fimd_context *ctx)
/* Wait for vsync, as disable channel takes effect at next vsync */
if (ch_enabled) {
- unsigned int state = ctx-suspended;
-
- ctx-suspended = 0;
+ ctx-suspended = false;
+ fimd_enable_vblank(ctx-crtc);
fimd_wait_for_vblank(ctx-crtc);
- ctx-suspended = state;
+ fimd_disable_vblank(ctx-crtc);
+ ctx-suspended = true;
}
+
+ clk_disable_unprepare(ctx-lcd_clk);
+ clk_disable_unprepare(ctx-bus_clk);
+
+ pm_runtime_put(ctx-dev);
}
static int fimd_iommu_attach_devices(struct fimd_context *ctx,
--
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Re: [PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
On 2015년 06월 04일 22:08, Inki Dae wrote:
Hi Marek,
On 2015년 06월 03일 17:26, Marek Szyprowski wrote:
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
I have tested this patch series on trats2 board which uses Exynos4412
SoC. However, the booting is halted out. Without iommu, the booting and
display works well.
For this test, I also merged another your patch series in iommu exynos
tree and added device node relevant codes like below,
in exynos4.dtsi file:
fimd: fimd@11c0 {
...
iommus = sysmmu_fimd0;
...
sysmmu_fimd0: sysmmu@11E2 {
compatible = samsung,exynos-sysmmu;
reg = 0x11E2 0x1000;
interrupt-parent = combiner;
interrupts = 5 2;
clock-names = sysmmu, master;
clocks = clock CLK_SMMU_FIMD0, clock CLK_FIMD0;
power-domains = pd_lcd0;
#iommu-cells = 0;
};
in exynos4412-trats2.dts file:
fimd@11c0 {
status = okay;
iommu-reserved-mapping = 0x4000 0x4000 0x4000;
};
Can you check it out?
In addition, sometimes I see below kernel panic logs which means page
fault to fimd occurs while booting:
[0.394228] 1380.serial: ttySAC0 at MMIO 0x1380 (irq = 56,
base_baud = 0) is a S3C6400/10
[0.394788] 1381.serial: ttySAC1 at MMIO 0x1381 (irq = 57,
base_baud = 0) is a S3C6400/10
[0.395281] 1382.serial: ttySAC2 at MMIO 0x1382 (irq = 58,
base_baud = 0) is a S3C6400/10
[1.122219] console [ttySAC2] enabled
[1.126419] 1383.serial: ttySAC3 at MMIO 0x1383 (irq = 59,
base_baud = 0) is a S3C6400/10
[1.136250] [drm] Initialized drm 1.1.0 20060810
[1.142710] PAGE FAULT occurred at 0x52188000 by 11e2.sysmmu(Page
table base: 0x6ea8)
[1.149754] Lv1 entry: 0x6e92dc01
[1.153172] [ cut here ]
[1.157740] kernel BUG at drivers/iommu/exynos-iommu.c:364!
[1.163296] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[1.169110] Modules linked in:
[1.172154] CPU: 0 PID: 0 Comm: swapper/0 Not tainted
4.1.0-rc4-00563-gee14f4e-dirty #1384
[1.180394] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[1.186472] task: c06d2df0 ti: c06ce000 task.ti: c06ce000
[1.191861] PC is at exynos_sysmmu_irq+0x184/0x208
[1.196628] LR is at exynos_sysmmu_irq+0xd4/0x208
[1.201316] pc : [c02677cc]lr : [c026771c]psr: 6193
[1.201316] sp : c06cfe90 ip : fp :
[1.212772] r10: c06ff6a3 r9 : 0521 r8 : 52188000
[1.217980] r7 : eea8 r6 : ee9b3428 r5 : ee9b3410 r4 :
[1.224489] r3 : 6e92dc01 r2 : 6e92dc01 r1 : eea55810 r0 : ee9c4e00
[1.231002] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM
Segment kernel
[1.238378] Control: 10c5387d Table: 4000404a DAC: 0015
[1.244107] Process swapper/0 (pid: 0, stack limit = 0xc06ce210)
[1.250096] Stack: (0xc06cfe90 to 0xc06d)
[1.254438] fe80: c06cfe9c
c039caac eef82b80 6ea8
[1.262599] fea0: 16b1580f ee9b4240 ee84ad20
0026 ee84acc0 c0060308
[1.270757] fec0: eef81380 ee84acc0 ee84ad20 ee9b4240
0015 ee804450 c06cff68
[1.278916] fee0: ee808000 c0060400 ee84acc0 ee84ad20 ee807000
c00630a8 0026 c06dddb8
[1.287075] ff00: ee807000 c005f98c 000a c0200ccc 0015
0015
[1.295235] ff20: 0001 c005f98c c06caaac c005fc58 f002000c
0015 c06d07a0 c06cff68
[1.303394] ff40: f002 c06ff6a1 0001 c0009434 c0010068
6113 c06cff9c
[1.311553] ff60: c06cffb8 c0012f40 1288
c001c880 c06ce000 c06d04f8
[1.319712] ff80: c04a1f50 c06c92c4 c06cffb8 c06ff6a1 0001
0100 c06cffb0
[1.327871] ffa0: c0010064 c0010068 6113 c06ce000
c0053f58 c067bc54
[1.336031] ffc0: c067b678
c06a70b8 c07023d4 c06d0480
[1.344190] ffe0: c06a70b4 c06d3f04 4000406a 413fc090
4000807c
[1.352366] [c02677cc] (exynos_sysmmu_irq) from [c0060308]
(handle_irq_event_percpu+0x78/0x134)
[1.361382] [c0060308] (handle_irq_event_percpu) from [c0060400]
(handle_irq_event+0x3c/0x5c)
[1.370235] [c0060400] (handle_irq_event) from [c00630a8]
(handle_level_irq+0xc4/0x13c)
[1.378567] [c00630a8] (handle_level_irq) from [c005f98c]
(generic_handle_irq+0x2c/0x3c)
[1.386990] [c005f98c] (generic_handle_irq) from [c0200ccc]
(combiner_handle_cascade_irq+0x94/0x100)
[1.396448] [c0200ccc]
[PATCH v2 1/3] drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
Tested-by: Javier Martinez Canillas javier.marti...@collabora.co.uk
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 96618534358e..3ec9d4299a86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -242,12 +242,21 @@ static void fimd_enable_shadow_channel_path(struct
fimd_context *ctx,
writel(val, ctx-regs + SHADOWCON);
}
+static int fimd_enable_vblank(struct exynos_drm_crtc *crtc);
+static void fimd_disable_vblank(struct exynos_drm_crtc *crtc);
+
static void fimd_clear_channel(struct fimd_context *ctx)
{
unsigned int win, ch_enabled = 0;
DRM_DEBUG_KMS(%s\n, __FILE__);
+ /* Hardware is in unknown state, so ensure it gets enabled properly */
+ pm_runtime_get_sync(ctx-dev);
+
+ clk_prepare_enable(ctx-bus_clk);
+ clk_prepare_enable(ctx-lcd_clk);
+
/* Check if any channel is enabled. */
for (win = 0; win WINDOWS_NR; win++) {
u32 val = readl(ctx-regs + WINCON(win));
@@ -265,12 +274,17 @@ static void fimd_clear_channel(struct fimd_context *ctx)
/* Wait for vsync, as disable channel takes effect at next vsync */
if (ch_enabled) {
- unsigned int state = ctx-suspended;
-
- ctx-suspended = 0;
+ ctx-suspended = false;
+ fimd_enable_vblank(ctx-crtc);
fimd_wait_for_vblank(ctx-crtc);
- ctx-suspended = state;
+ fimd_disable_vblank(ctx-crtc);
+ ctx-suspended = true;
}
+
+ clk_disable_unprepare(ctx-lcd_clk);
+ clk_disable_unprepare(ctx-bus_clk);
+
+ pm_runtime_put(ctx-dev);
}
static int fimd_iommu_attach_devices(struct fimd_context *ctx,
--
1.9.2
--
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