Re: [PATCH v2 12/19] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

2015-12-09 Thread Krzysztof Kozlowski
On 09.12.2015 13:08, Chanwoo Choi wrote: > This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. > Exynos3250 has following AXI buses to translate data between > DRAM and sub-blocks. > > Following list specifies the detailed relation between DRAM and sub-blocks: > - ACLK400 clock for

Re: [PATCH v2 12/19] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

2015-12-09 Thread Chanwoo Choi
On 2015년 12월 10일 11:09, Krzysztof Kozlowski wrote: > On 09.12.2015 13:08, Chanwoo Choi wrote: >> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. >> Exynos3250 has following AXI buses to translate data between >> DRAM and sub-blocks. >> >> Following list specifies the detailed

[PATCH v2 12/19] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

2015-12-08 Thread Chanwoo Choi
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. Exynos3250 has following AXI buses to translate data between DRAM and sub-blocks. Following list specifies the detailed relation between DRAM and sub-blocks: - ACLK400 clock for MCUISP - ACLK266 clock for ISP - ACLK200 clock for FSYS