Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-15 Thread Tony Lindgren 
* Marc Zyngier marc.zyng...@arm.com [150115 09:31]:
 On 15/01/15 17:04, Tony Lindgren wrote:
  * Marc Zyngier marc.zyng...@arm.com [150115 06:53]:
  On Thu, Jan 15 2015 at  2:40:16 pm GMT, Nishanth Menon n...@ti.com wrote:
  On 14:28-20150115, Marc Zyngier wrote:
  Assuming the workaround I posted earlier works, the OMAP/DRA7 part of
  this series is going to require some rework too (I need to know where
  these legacy interrupts are attached: crossbar, WUGEN, or GIC?).
 
  crossbar will never work with legacy static interrupts anyways - since
  there was never a static interrupt possible - I believe we had removed
  all the legacy hardcoded interrupt definitions for DRA7. ideally, they
  should all be dt only now.
 
  Yes, I guessed as much after looking at the DRA7XX hwmod.
 
  So only OMAP4/5 is b0rken at the moment. I can probably work around it
  as I did in this example patch, just by changing the compatible strings
  for the xlate callback. Very ugly.
  
  For the -rc, it seems the wakeupen still needs a fix as based on grepping
  for OMAP44XX_IRQ_GIC_START. Got any great ideas for that?
 
 I think this one is fine. It computes the SPI number based on the hwirq
 coming from the GIC. That direction is completely unaffected by the
 linear domain stuff. It is only when you try to use a hardware IRQ as a
 Linux IRQ that you run into trouble.

Yes OK that makes sense.

Thanks,

Tony
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-15 Thread Tony Lindgren 
* Tony Lindgren t...@atomide.com [150115 10:04]:
 * Marc Zyngier marc.zyng...@arm.com [150115 09:31]:
  On 15/01/15 17:04, Tony Lindgren wrote:
   * Marc Zyngier marc.zyng...@arm.com [150115 06:53]:
   On Thu, Jan 15 2015 at  2:40:16 pm GMT, Nishanth Menon n...@ti.com 
   wrote:
   On 14:28-20150115, Marc Zyngier wrote:
   Assuming the workaround I posted earlier works, the OMAP/DRA7 part of
   this series is going to require some rework too (I need to know where
   these legacy interrupts are attached: crossbar, WUGEN, or GIC?).
  
   crossbar will never work with legacy static interrupts anyways - since
   there was never a static interrupt possible - I believe we had removed
   all the legacy hardcoded interrupt definitions for DRA7. ideally, they
   should all be dt only now.
  
   Yes, I guessed as much after looking at the DRA7XX hwmod.
  
   So only OMAP4/5 is b0rken at the moment. I can probably work around it
   as I did in this example patch, just by changing the compatible strings
   for the xlate callback. Very ugly.
   
   For the -rc, it seems the wakeupen still needs a fix as based on grepping
   for OMAP44XX_IRQ_GIC_START. Got any great ideas for that?
  
  I think this one is fine. It computes the SPI number based on the hwirq
  coming from the GIC. That direction is completely unaffected by the
  linear domain stuff. It is only when you try to use a hardware IRQ as a
  Linux IRQ that you run into trouble.
 
 Yes OK that makes sense.

And suspend and resume seem to work with your fix.

FYI, to test suspend and resume with wakeups from the serial console,
the uart wakeup events need to be enabled under sys:

#!/bin/bash

uarts=$(find /sys/class/tty/tty[SO]*/power/ -type d 2/dev/null)
for uart in $uarts; do
echo enabled  $uart/wakeup 21
done

And after that suspending with echo mem  /sys/power/state should wake
to a serial interrupt.

Regards,

Tony
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-15 Thread Nishanth Menon 
On 14:28-20150115, Marc Zyngier wrote:
 Assuming the workaround I posted earlier works, the OMAP/DRA7 part of
 this series is going to require some rework too (I need to know where
 these legacy interrupts are attached: crossbar, WUGEN, or GIC?).
 
crossbar will never work with legacy static interrupts anyways - since there
was never a static interrupt possible - I believe we had removed all the
legacy hardcoded interrupt definitions for DRA7. ideally, they should
all be dt only now.

-- 
Regards,
Nishanth Menon
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-15 Thread Marc Zyngier 
On Thu, Jan 15 2015 at  2:40:16 pm GMT, Nishanth Menon n...@ti.com wrote:
 On 14:28-20150115, Marc Zyngier wrote:
 Assuming the workaround I posted earlier works, the OMAP/DRA7 part of
 this series is going to require some rework too (I need to know where
 these legacy interrupts are attached: crossbar, WUGEN, or GIC?).
 
 crossbar will never work with legacy static interrupts anyways - since
 there was never a static interrupt possible - I believe we had removed
 all the legacy hardcoded interrupt definitions for DRA7. ideally, they
 should all be dt only now.

Yes, I guessed as much after looking at the DRA7XX hwmod.

So only OMAP4/5 is b0rken at the moment. I can probably work around it
as I did in this example patch, just by changing the compatible strings
for the xlate callback. Very ugly.

M.
-- 
Jazz is not dead. It just smells funny.
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-15 Thread Marc Zyngier 
On Wed, Jan 14 2015 at 10:28:14 pm GMT, Tony Lindgren t...@atomide.com wrote:
 * Marc Zyngier marc.zyng...@arm.com [150112 10:30]:
 OMAP4/5 has been (ab)using the gic_arch_extn to provide
 wakeup from suspend, and it makes a lot of sense to convert
 this code to use stacked domains instead.
 
 This patch does just this, updating the DT files to actually
 reflect what the HW provides.
 
 BIG FAT WARNING: because the DTs were so far lying by not
 exposing the WUGEN HW block, kernels with this patch applied
 won't have any suspend-resume facility when booted with old DTs,
 and old kernels with updated DTs won't even boot.
 
 On a platform with this patch applied, the system looks like
 this:
 
 root@bacon-fat:~# cat /proc/interrupts
 CPU0   CPU1
  16:  0  0 WUGEN  37  gp_timer
  19: 233799 155916   GIC  27  arch_timer
  23:  0  0 WUGEN   9  l3-dbg-irq
  24:  1  0 WUGEN  10  l3-app-irq
  27:282  0 WUGEN  13  omap-dma-engine
  44:  0  0  4ae1.gpio  13  DMA

 FYI, the legacy irq numbers are now all wrong since commit
 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain.).

 Started a separate thread Regression with legacy IRQ numbers
 caused by 9a1091ef0017 on it, will give these a try once
 that's sorted out.

Assuming the workaround I posted earlier works, the OMAP/DRA7 part of
this series is going to require some rework too (I need to know where
these legacy interrupts are attached: crossbar, WUGEN, or GIC?).

Thanks,

M.
-- 
Jazz is not dead. It just smells funny.
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Re: [PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-14 Thread Tony Lindgren 
* Marc Zyngier marc.zyng...@arm.com [150112 10:30]:
 OMAP4/5 has been (ab)using the gic_arch_extn to provide
 wakeup from suspend, and it makes a lot of sense to convert
 this code to use stacked domains instead.
 
 This patch does just this, updating the DT files to actually
 reflect what the HW provides.
 
 BIG FAT WARNING: because the DTs were so far lying by not
 exposing the WUGEN HW block, kernels with this patch applied
 won't have any suspend-resume facility when booted with old DTs,
 and old kernels with updated DTs won't even boot.
 
 On a platform with this patch applied, the system looks like
 this:
 
 root@bacon-fat:~# cat /proc/interrupts
 CPU0   CPU1
  16:  0  0 WUGEN  37  gp_timer
  19: 233799 155916   GIC  27  arch_timer
  23:  0  0 WUGEN   9  l3-dbg-irq
  24:  1  0 WUGEN  10  l3-app-irq
  27:282  0 WUGEN  13  omap-dma-engine
  44:  0  0  4ae1.gpio  13  DMA

FYI, the legacy irq numbers are now all wrong since commit
9a1091ef0017 (irqchip: gic: Support hierarchy irq domain.).

Started a separate thread Regression with legacy IRQ numbers
caused by 9a1091ef0017 on it, will give these a try once
that's sorted out.

Regards,

Tony
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[PATCH v3 13/21] ARM: omap: convert wakeupgen to stacked domains

2015-01-12 Thread Marc Zyngier 
OMAP4/5 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.

This patch does just this, updating the DT files to actually
reflect what the HW provides.

BIG FAT WARNING: because the DTs were so far lying by not
exposing the WUGEN HW block, kernels with this patch applied
won't have any suspend-resume facility when booted with old DTs,
and old kernels with updated DTs won't even boot.

On a platform with this patch applied, the system looks like
this:

root@bacon-fat:~# cat /proc/interrupts
CPU0   CPU1
 16:  0  0 WUGEN  37  gp_timer
 19: 233799 155916   GIC  27  arch_timer
 23:  0  0 WUGEN   9  l3-dbg-irq
 24:  1  0 WUGEN  10  l3-app-irq
 27:282  0 WUGEN  13  omap-dma-engine
 44:  0  0  4ae1.gpio  13  DMA
294:  0  0 WUGEN  20  gpmc
297:506  0 WUGEN  56  4807.i2c
298:  0  0 WUGEN  57  48072000.i2c
299:  0  0 WUGEN  61  4806.i2c
300:  0  0 WUGEN  62  4807a000.i2c
301:  8  0 WUGEN  60  4807c000.i2c
308:   2439  0 WUGEN  74  OMAP UART2
312:362  0 WUGEN  83  mmc2
313:502  0 WUGEN  86  mmc0
314: 13  0 WUGEN  94  mmc1
350:  0  0  PRCM  pinctrl, pinctrl
406:   35155709  0   GIC 109  ehci_hcd:usb1
407:  0  0 WUGEN   7  palmas
409:  0  0 WUGEN 119  twl6040
410:  0  0   twl6040   5  twl6040_irq_ready
411:  0  0   twl6040   0  twl6040_irq_th
IPI0:  0  1  CPU wakeup interrupts
IPI1:  0  0  Timer broadcast interrupts
IPI2:  95334 902334  Rescheduling interrupts
IPI3:  0  0  Function call interrupts
IPI4:479648  Single function call interrupts
IPI5:  0  0  CPU stop interrupts
IPI6:  0  0  IRQ work interrupts
IPI7:  0  0  completion interrupts
Err:  0

Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
 arch/arm/boot/dts/am4372.dtsi |  11 ++-
 arch/arm/boot/dts/am437x-gp-evm.dts   |   1 -
 arch/arm/boot/dts/am437x-sk-evm.dts   |   1 -
 arch/arm/boot/dts/am43x-epos-evm.dts  |   1 -
 arch/arm/boot/dts/dra7.dtsi   |  12 ++-
 arch/arm/boot/dts/dra72x.dtsi |   2 +-
 arch/arm/boot/dts/dra74x.dtsi |   2 +-
 arch/arm/boot/dts/omap4-duovero.dtsi  |   2 -
 arch/arm/boot/dts/omap4-panda-common.dtsi |   8 +-
 arch/arm/boot/dts/omap4-sdp.dts   |   8 +-
 arch/arm/boot/dts/omap4-var-som-om44.dtsi |   2 -
 arch/arm/boot/dts/omap4.dtsi  |  18 -
 arch/arm/boot/dts/omap5-cm-t54.dts|   1 -
 arch/arm/boot/dts/omap5-uevm.dts  |   2 -
 arch/arm/boot/dts/omap5.dtsi  |  26 ---
 arch/arm/mach-omap2/omap-wakeupgen.c  | 125 +++---
 arch/arm/mach-omap2/omap-wakeupgen.h  |   1 -
 arch/arm/mach-omap2/omap4-common.c|   1 -
 18 files changed, 154 insertions(+), 70 deletions(-)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index b62a1cd..9d672a7 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -15,7 +15,7 @@
 
 / {
compatible = ti,am4372, ti,am43;
-   interrupt-parent = gic;
+   interrupt-parent = wakeupgen;
 
 
aliases {
@@ -48,6 +48,15 @@
#interrupt-cells = 3;
reg = 0x48241000 0x1000,
  0x48240100 0x0100;
+   interrupt-parent = gic;
+   };
+
+   wakeupgen: interrupt-controller@48281000 {
+   compatible = ti,omap4-wugen-mpu;
+   interrupt-controller;
+   #interrupt-cells = 3;
+   reg = 0x48281000 0x1000;
+   interrupt-parent = gic;
};
 
l2-cache-controller@48242000 {
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts 
b/arch/arm/boot/dts/am437x-gp-evm.dts
index 7eaae4c..69f2313 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -280,7 +280,6 @@
reg = 0x24;
compatible = ti,tps65218;
interrupts = GIC_SPI 7 IRQ_TYPE_NONE; /* NMIn */
-   interrupt-parent = gic;
interrupt-controller;
#interrupt-cells = 2;
 
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts 
b/arch/arm/boot/dts/am437x-sk-evm.dts
index 53bbfc9..029bade 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -334,7 +334,6 @@
tps@24 {
compatible = ti,tps65218;
reg = 0x24;
-   interrupt-parent = gic;
interrupts = GIC_SPI 7