Re: [PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
On 7 September 2012 16:21, Seungwon Jeon wrote:
> On Friday, September 07, 2012, Thomas Abraham
> wrote:
>> Hi Seungwon,
>>
>> Thanks for reviewing the patch.
>>
>> On 5 September 2012 16:13, Seungwon Jeon wrote:
>> > On Wednesday, September 05, 2012, Thomas Abraham
>> > wrote:
>> > Version 6 is right?
>> >
>> >> Samsung Exynos SoC's extend the dw-mshc controller for additional clock
>> >> and bus
>> >> control. Add support for these extensions and include provide device tree
>> >> based
>> >> discovery suppory as well.
>> >>
>> >> Signed-off-by: Thomas Abraham
>> >> Acked-by: Will Newton
>> >> ---
>> >> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
>> >> drivers/mmc/host/Kconfig |9 +
>> >> drivers/mmc/host/Makefile |1 +
>> >> drivers/mmc/host/dw_mmc-exynos.c | 253
>> >>
>> >> 4 files changed, 349 insertions(+), 0 deletions(-)
>> >> create mode 100644
>> >> Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> >> create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> >> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> >> new file mode 100644
>> >> index 000..323a891
>> >> --- /dev/null
>> >> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> >> @@ -0,0 +1,86 @@
>> >> +* Samsung Exynos specific extensions to the Synopsis Designware Mobile
>> >> + Storage Host Controller
>> >> +
>> >> +The Synopsis designware mobile storage host controller is used to
>> >> interface
>> >> +a SoC with storage medium such as eMMC or SD/MMC cards. This file
>> >> documents
>> >> +differences between the core Synopsis dw mshc controller properties
>> >> described
>> >> +by synposis-dw-mshc.txt and the properties used by the Samsung Exynos
>> >> specific
>> >> +extensions to the Synopsis Designware Mobile Storage Host Controller.
>> >> +
>> >> +Required Properties:
>> >> +
>> >> +* compatible: should be
>> >> + - "samsung,exynos4210-dw-mshc": for controllers with Samsung
>> >> Exynos4210
>> >> + specific extentions.
>> >> + - "samsung,exynos4412-dw-mshc": for controllers with Samsung
>> >> Exynos4412
>> >> + specific extentions.
>> >> + - "samsung,exynos5250-dw-mshc": for controllers with Samsung
>> >> Exynos5250
>> >> + specific extentions.
>> >> +
>> >> +* samsung,dw-mshc-ciu-div: Specifies the divider value for the card
>> >> interface
>> >> + unit (ciu) clock. This property is applicable only for Exynos5 SoC's
>> >> and
>> >> + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
>> >> +
>> >> +* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase
>> >> shift value
>> >> + in transmit mode and CIU clock phase shift value in receive mode for
>> >> single
>> >> + data rate mode operation. Refer notes below for the order of the cells
>> >> and the
>> >> + valid values.
>> >> +
>> >> +* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase
>> >> shift value
>> >> + in transmit mode and CIU clock phase shift value in receive mode for
>> >> double
>> >> + data rate mode operation. Refer notes below for the order of the cells
>> >> and the
>> >> + valid values.
>> >> +
>> >> + Notes for the sdr-timing and ddr-timing values:
>> >> +
>> >> +The order of the cells should be
>> >> + - First Cell: CIU clock phase shift value for tx mode.
>> >> + - Second Cell: CIU clock phase shift value for rx mode.
>> >> +
>> >> +Valid values for SDR and DDR CIU clock timing for Exynos5250:
>> >> + - valid value for tx phase shift and rx phase shift is 0 to 7.
>> >> + - when CIU clock divider value is set to 3, all possible 8 phase
>> >> shift
>> >> +values can be used.
>> >> + - if CIU clock divider value is 0 (that is divide by 1), both tx
>> >> and rx
>> >> +phase shift clocks should be 0.
>> >> +
>> >> +Required properties for a slot:
>> >> +
>> >> +* gpios: specifies a list of gpios used for command, clock and data bus.
>> >> The
>> >> + first gpio is the command line and the second gpio is the clock line.
>> >> The
>> >> + rest of the gpios (depending on the bus-width property) are the data
>> >> lines in
>> >> + no particular order. The format of the gpio specifier depends on the
>> >> gpio
>> >> + controller.
>> >> +
>> >> +Example:
>> >> +
>> >> + The MSHC controller node can be split into two portions, SoC specific
>> >> and
>> >> + board specific portions as listed below.
>> >> +
>> >> + dwmmc0@1220 {
>> >> + compatible = "samsung,exynos5250-dw-mshc";
>> >> + reg = <0x1220 0x1000>;
>> >> + interrupts = <0 75 0>;
>> >> + #address-cells = <1>;
>> >> + #size-cells = <0>;
>> >> + };
>> >> +
>> >> + dwmmc0@1220 {
>> >> + num-slots = <1>;
>
RE: [PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
On Friday, September 07, 2012, Thomas Abraham wrote:
> Hi Seungwon,
>
> Thanks for reviewing the patch.
>
> On 5 September 2012 16:13, Seungwon Jeon wrote:
> > On Wednesday, September 05, 2012, Thomas Abraham
> > wrote:
> > Version 6 is right?
> >
> >> Samsung Exynos SoC's extend the dw-mshc controller for additional clock
> >> and bus
> >> control. Add support for these extensions and include provide device tree
> >> based
> >> discovery suppory as well.
> >>
> >> Signed-off-by: Thomas Abraham
> >> Acked-by: Will Newton
> >> ---
> >> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
> >> drivers/mmc/host/Kconfig |9 +
> >> drivers/mmc/host/Makefile |1 +
> >> drivers/mmc/host/dw_mmc-exynos.c | 253
> >>
> >> 4 files changed, 349 insertions(+), 0 deletions(-)
> >> create mode 100644
> >> Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> >> create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
> >>
> >> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> >> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> >> new file mode 100644
> >> index 000..323a891
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> >> @@ -0,0 +1,86 @@
> >> +* Samsung Exynos specific extensions to the Synopsis Designware Mobile
> >> + Storage Host Controller
> >> +
> >> +The Synopsis designware mobile storage host controller is used to
> >> interface
> >> +a SoC with storage medium such as eMMC or SD/MMC cards. This file
> >> documents
> >> +differences between the core Synopsis dw mshc controller properties
> >> described
> >> +by synposis-dw-mshc.txt and the properties used by the Samsung Exynos
> >> specific
> >> +extensions to the Synopsis Designware Mobile Storage Host Controller.
> >> +
> >> +Required Properties:
> >> +
> >> +* compatible: should be
> >> + - "samsung,exynos4210-dw-mshc": for controllers with Samsung
> >> Exynos4210
> >> + specific extentions.
> >> + - "samsung,exynos4412-dw-mshc": for controllers with Samsung
> >> Exynos4412
> >> + specific extentions.
> >> + - "samsung,exynos5250-dw-mshc": for controllers with Samsung
> >> Exynos5250
> >> + specific extentions.
> >> +
> >> +* samsung,dw-mshc-ciu-div: Specifies the divider value for the card
> >> interface
> >> + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
> >> + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
> >> +
> >> +* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase
> >> shift value
> >> + in transmit mode and CIU clock phase shift value in receive mode for
> >> single
> >> + data rate mode operation. Refer notes below for the order of the cells
> >> and the
> >> + valid values.
> >> +
> >> +* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase
> >> shift value
> >> + in transmit mode and CIU clock phase shift value in receive mode for
> >> double
> >> + data rate mode operation. Refer notes below for the order of the cells
> >> and the
> >> + valid values.
> >> +
> >> + Notes for the sdr-timing and ddr-timing values:
> >> +
> >> +The order of the cells should be
> >> + - First Cell: CIU clock phase shift value for tx mode.
> >> + - Second Cell: CIU clock phase shift value for rx mode.
> >> +
> >> +Valid values for SDR and DDR CIU clock timing for Exynos5250:
> >> + - valid value for tx phase shift and rx phase shift is 0 to 7.
> >> + - when CIU clock divider value is set to 3, all possible 8 phase
> >> shift
> >> +values can be used.
> >> + - if CIU clock divider value is 0 (that is divide by 1), both tx
> >> and rx
> >> +phase shift clocks should be 0.
> >> +
> >> +Required properties for a slot:
> >> +
> >> +* gpios: specifies a list of gpios used for command, clock and data bus.
> >> The
> >> + first gpio is the command line and the second gpio is the clock line.
> >> The
> >> + rest of the gpios (depending on the bus-width property) are the data
> >> lines in
> >> + no particular order. The format of the gpio specifier depends on the
> >> gpio
> >> + controller.
> >> +
> >> +Example:
> >> +
> >> + The MSHC controller node can be split into two portions, SoC specific
> >> and
> >> + board specific portions as listed below.
> >> +
> >> + dwmmc0@1220 {
> >> + compatible = "samsung,exynos5250-dw-mshc";
> >> + reg = <0x1220 0x1000>;
> >> + interrupts = <0 75 0>;
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + };
> >> +
> >> + dwmmc0@1220 {
> >> + num-slots = <1>;
> >> + supports-highspeed;
> >> + broken-cd;
> >> + fifo-depth = <0x80>;
> >> + card-detect-delay = <200>;
> >> + samsung,dw-
[PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus
control. Add support for these extensions and include provide device tree based
discovery suppory as well.
Signed-off-by: Thomas Abraham
Acked-by: Will Newton
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 87 +++
drivers/mmc/host/Kconfig |9 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/dw_mmc-exynos.c | 253
4 files changed, 350 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
new file mode 100644
index 000..7927689
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -0,0 +1,87 @@
+* Samsung Exynos specific extensions to the Synopsis Designware Mobile
+ Storage Host Controller
+
+The Synopsis designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsis dw mshc controller properties described
+by synposis-dw-mshc.txt and the properties used by the Samsung Exynos specific
+extensions to the Synopsis Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+ - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
+ specific extentions.
+ - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
+ specific extentions.
+ - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
+ specific extentions.
+
+* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
+ unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
+ ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for single
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for double
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+ Notes for the sdr-timing and ddr-timing values:
+
+The order of the cells should be
+ - First Cell: CIU clock phase shift value for tx mode.
+ - Second Cell: CIU clock phase shift value for rx mode.
+
+Valid values for SDR and DDR CIU clock timing for Exynos5250:
+ - valid value for tx phase shift and rx phase shift is 0 to 7.
+ - when CIU clock divider value is set to 3, all possible 8 phase shift
+values can be used.
+ - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
+phase shift clocks should be 0.
+
+Required properties for a slot:
+
+* gpios: specifies a list of gpios used for command, clock and data bus. The
+ first gpio is the command line and the second gpio is the clock line. The
+ rest of the gpios (depending on the bus-width property) are the data lines in
+ no particular order. The format of the gpio specifier depends on the gpio
+ controller.
+
+Example:
+
+ The MSHC controller node can be split into two portions, SoC specific and
+ board specific portions as listed below.
+
+ dwmmc0@1220 {
+ compatible = "samsung,exynos5250-dw-mshc";
+ reg = <0x1220 0x1000>;
+ interrupts = <0 75 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ dwmmc0@1220 {
+ num-slots = <1>;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = <0x80>;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <2 3>;
+ samsung,dw-mshc-ddr-timing = <1 2>;
+
+ slot@0 {
+ reg = <0>;
+ bus-width = <8>;
+ gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+ <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+ <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+ <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+ <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+ };
+ };
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index aa131b3..9bf10e7 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -540,6 +540,15 @@ config MMC_DW_PLTFM
If unsure, say Y.
+config MMC_DW_EXYNO
Re: [PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
Hi Seungwon,
Thanks for reviewing the patch.
On 5 September 2012 16:13, Seungwon Jeon wrote:
> On Wednesday, September 05, 2012, Thomas Abraham
> wrote:
> Version 6 is right?
>
>> Samsung Exynos SoC's extend the dw-mshc controller for additional clock and
>> bus
>> control. Add support for these extensions and include provide device tree
>> based
>> discovery suppory as well.
>>
>> Signed-off-by: Thomas Abraham
>> Acked-by: Will Newton
>> ---
>> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
>> drivers/mmc/host/Kconfig |9 +
>> drivers/mmc/host/Makefile |1 +
>> drivers/mmc/host/dw_mmc-exynos.c | 253
>>
>> 4 files changed, 349 insertions(+), 0 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> new file mode 100644
>> index 000..323a891
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
>> @@ -0,0 +1,86 @@
>> +* Samsung Exynos specific extensions to the Synopsis Designware Mobile
>> + Storage Host Controller
>> +
>> +The Synopsis designware mobile storage host controller is used to interface
>> +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
>> +differences between the core Synopsis dw mshc controller properties
>> described
>> +by synposis-dw-mshc.txt and the properties used by the Samsung Exynos
>> specific
>> +extensions to the Synopsis Designware Mobile Storage Host Controller.
>> +
>> +Required Properties:
>> +
>> +* compatible: should be
>> + - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
>> + specific extentions.
>> + - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
>> + specific extentions.
>> + - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
>> + specific extentions.
>> +
>> +* samsung,dw-mshc-ciu-div: Specifies the divider value for the card
>> interface
>> + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
>> + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
>> +
>> +* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift
>> value
>> + in transmit mode and CIU clock phase shift value in receive mode for
>> single
>> + data rate mode operation. Refer notes below for the order of the cells
>> and the
>> + valid values.
>> +
>> +* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift
>> value
>> + in transmit mode and CIU clock phase shift value in receive mode for
>> double
>> + data rate mode operation. Refer notes below for the order of the cells
>> and the
>> + valid values.
>> +
>> + Notes for the sdr-timing and ddr-timing values:
>> +
>> +The order of the cells should be
>> + - First Cell: CIU clock phase shift value for tx mode.
>> + - Second Cell: CIU clock phase shift value for rx mode.
>> +
>> +Valid values for SDR and DDR CIU clock timing for Exynos5250:
>> + - valid value for tx phase shift and rx phase shift is 0 to 7.
>> + - when CIU clock divider value is set to 3, all possible 8 phase shift
>> +values can be used.
>> + - if CIU clock divider value is 0 (that is divide by 1), both tx and
>> rx
>> +phase shift clocks should be 0.
>> +
>> +Required properties for a slot:
>> +
>> +* gpios: specifies a list of gpios used for command, clock and data bus. The
>> + first gpio is the command line and the second gpio is the clock line. The
>> + rest of the gpios (depending on the bus-width property) are the data
>> lines in
>> + no particular order. The format of the gpio specifier depends on the gpio
>> + controller.
>> +
>> +Example:
>> +
>> + The MSHC controller node can be split into two portions, SoC specific and
>> + board specific portions as listed below.
>> +
>> + dwmmc0@1220 {
>> + compatible = "samsung,exynos5250-dw-mshc";
>> + reg = <0x1220 0x1000>;
>> + interrupts = <0 75 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> +
>> + dwmmc0@1220 {
>> + num-slots = <1>;
>> + supports-highspeed;
>> + broken-cd;
>> + fifo-depth = <0x80>;
>> + card-detect-delay = <200>;
>> + samsung,dw-mshc-sdr-timing = <2 3 3>;
>> + samsung,dw-mshc-ddr-timing = <1 2 3>;
> Third filed is still useful?
No, it is not used anymore. Thanks for pointing this out.
>
>
>> +
>> + slot@0 {
>> + reg = <0>;
>> + bus-width = <8>;
>> + gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
>> +
RE: [PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
On Wednesday, September 05, 2012, Thomas Abraham
wrote:
Version 6 is right?
> Samsung Exynos SoC's extend the dw-mshc controller for additional clock and
> bus
> control. Add support for these extensions and include provide device tree
> based
> discovery suppory as well.
>
> Signed-off-by: Thomas Abraham
> Acked-by: Will Newton
> ---
> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
> drivers/mmc/host/Kconfig |9 +
> drivers/mmc/host/Makefile |1 +
> drivers/mmc/host/dw_mmc-exynos.c | 253
>
> 4 files changed, 349 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
>
> diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> new file mode 100644
> index 000..323a891
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
> @@ -0,0 +1,86 @@
> +* Samsung Exynos specific extensions to the Synopsis Designware Mobile
> + Storage Host Controller
> +
> +The Synopsis designware mobile storage host controller is used to interface
> +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
> +differences between the core Synopsis dw mshc controller properties described
> +by synposis-dw-mshc.txt and the properties used by the Samsung Exynos
> specific
> +extensions to the Synopsis Designware Mobile Storage Host Controller.
> +
> +Required Properties:
> +
> +* compatible: should be
> + - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
> + specific extentions.
> + - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
> + specific extentions.
> + - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
> + specific extentions.
> +
> +* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
> + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
> + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
> +
> +* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift
> value
> + in transmit mode and CIU clock phase shift value in receive mode for single
> + data rate mode operation. Refer notes below for the order of the cells and
> the
> + valid values.
> +
> +* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift
> value
> + in transmit mode and CIU clock phase shift value in receive mode for double
> + data rate mode operation. Refer notes below for the order of the cells and
> the
> + valid values.
> +
> + Notes for the sdr-timing and ddr-timing values:
> +
> +The order of the cells should be
> + - First Cell: CIU clock phase shift value for tx mode.
> + - Second Cell: CIU clock phase shift value for rx mode.
> +
> +Valid values for SDR and DDR CIU clock timing for Exynos5250:
> + - valid value for tx phase shift and rx phase shift is 0 to 7.
> + - when CIU clock divider value is set to 3, all possible 8 phase shift
> +values can be used.
> + - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
> +phase shift clocks should be 0.
> +
> +Required properties for a slot:
> +
> +* gpios: specifies a list of gpios used for command, clock and data bus. The
> + first gpio is the command line and the second gpio is the clock line. The
> + rest of the gpios (depending on the bus-width property) are the data lines
> in
> + no particular order. The format of the gpio specifier depends on the gpio
> + controller.
> +
> +Example:
> +
> + The MSHC controller node can be split into two portions, SoC specific and
> + board specific portions as listed below.
> +
> + dwmmc0@1220 {
> + compatible = "samsung,exynos5250-dw-mshc";
> + reg = <0x1220 0x1000>;
> + interrupts = <0 75 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + dwmmc0@1220 {
> + num-slots = <1>;
> + supports-highspeed;
> + broken-cd;
> + fifo-depth = <0x80>;
> + card-detect-delay = <200>;
> + samsung,dw-mshc-sdr-timing = <2 3 3>;
> + samsung,dw-mshc-ddr-timing = <1 2 3>;
Third filed is still useful?
> +
> + slot@0 {
> + reg = <0>;
> + bus-width = <8>;
> + gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
> + <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
> + <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
> + <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
> + <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
> + };
> + };
> diff
[PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus
control. Add support for these extensions and include provide device tree based
discovery suppory as well.
Signed-off-by: Thomas Abraham
Acked-by: Will Newton
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 86 +++
drivers/mmc/host/Kconfig |9 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/dw_mmc-exynos.c | 253
4 files changed, 349 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
new file mode 100644
index 000..323a891
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -0,0 +1,86 @@
+* Samsung Exynos specific extensions to the Synopsis Designware Mobile
+ Storage Host Controller
+
+The Synopsis designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsis dw mshc controller properties described
+by synposis-dw-mshc.txt and the properties used by the Samsung Exynos specific
+extensions to the Synopsis Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+ - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
+ specific extentions.
+ - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
+ specific extentions.
+ - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
+ specific extentions.
+
+* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
+ unit (ciu) clock. This property is applicable only for Exynos5 SoC's and
+ ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for single
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift
value
+ in transmit mode and CIU clock phase shift value in receive mode for double
+ data rate mode operation. Refer notes below for the order of the cells and
the
+ valid values.
+
+ Notes for the sdr-timing and ddr-timing values:
+
+The order of the cells should be
+ - First Cell: CIU clock phase shift value for tx mode.
+ - Second Cell: CIU clock phase shift value for rx mode.
+
+Valid values for SDR and DDR CIU clock timing for Exynos5250:
+ - valid value for tx phase shift and rx phase shift is 0 to 7.
+ - when CIU clock divider value is set to 3, all possible 8 phase shift
+values can be used.
+ - if CIU clock divider value is 0 (that is divide by 1), both tx and rx
+phase shift clocks should be 0.
+
+Required properties for a slot:
+
+* gpios: specifies a list of gpios used for command, clock and data bus. The
+ first gpio is the command line and the second gpio is the clock line. The
+ rest of the gpios (depending on the bus-width property) are the data lines in
+ no particular order. The format of the gpio specifier depends on the gpio
+ controller.
+
+Example:
+
+ The MSHC controller node can be split into two portions, SoC specific and
+ board specific portions as listed below.
+
+ dwmmc0@1220 {
+ compatible = "samsung,exynos5250-dw-mshc";
+ reg = <0x1220 0x1000>;
+ interrupts = <0 75 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ dwmmc0@1220 {
+ num-slots = <1>;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = <0x80>;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-sdr-timing = <2 3 3>;
+ samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+ slot@0 {
+ reg = <0>;
+ bus-width = <8>;
+ gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+ <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+ <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+ <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+ <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+ };
+ };
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index aa131b3..9bf10e7 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -540,6 +540,15 @@ config MMC_DW_PLTFM
If unsure, say Y.
+config MMC_DW_EXYNOS
+ tristate "Exynos specific extenti
[PATCH v5 9/9] mmc: dw_mmc: add support for exynos specific implementation of dw-mshc
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus
control. Add support for these extensions and include provide device tree based
discovery suppory as well.
Signed-off-by: Thomas Abraham
Acked-by: Will Newton
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt | 85 +++
drivers/mmc/host/Kconfig |9 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/dw_mmc-exynos.c | 243
4 files changed, 338 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
create mode 100644 drivers/mmc/host/dw_mmc-exynos.c
diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
new file mode 100644
index 000..cc82e11
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -0,0 +1,85 @@
+* Samsung Exynos specific extensions to the Synopsis Designware Mobile
+ Storage Host Controller
+
+The Synopsis designware mobile storage host controller is used to interface
+a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
+differences between the core Synopsis dw mshc controller properties described
+by synposis-dw-mshc.txt and the properties used by the Samsung Exynos specific
+extensions to the Synopsis Designware Mobile Storage Host Controller.
+
+Required Properties:
+
+* compatible: should be
+ - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
+ specific extentions.
+ - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
+ specific extentions.
+ - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
+ specific extentions.
+
+* samsung,dw-mshc-sdr-timing: Specifies the value of CUI clock divider, CIU
+ clock phase shift value in transmit mode and CIU clock phase shift value in
+ receive mode for single data rate mode operation. Refer notes of the valid
+ values below.
+
+* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock divider, CIU
+ clock phase shift value in transmit mode and CIU clock phase shift value in
+ receive mode for double data rate mode operation. Refer notes of the valid
+ values below. The order of the cells should be
+
+- First Cell: CIU clock divider value (applicable only for Exynos5
+ SoC's, should be zero for Exynos4 SoC's)
+- Second Cell: CIU clock phase shift value for tx mode.
+- Third Cell: CIU clock phase shift value for rx mode.
+
+ Valid values for SDR and DDR CIU clock timing for Exynos5250:
+
+- valid values for CIU clock divider, tx phase shift and rx phase shift
+ is 0 to 7.
+
+- When CIU clock divider value is set to 3, all possible 8 phase shift
+ values can be used.
+
+- If CIU clock divider value is 0 (that is divide by 1), both tx and rx
+ phase shift clocks should be 0.
+
+Required properties for a slot:
+
+* gpios: specifies a list of gpios used for command, clock and data bus. The
+ first gpio is the command line and the second gpio is the clock line. The
+ rest of the gpios (depending on the bus-width property) are the data lines in
+ no particular order. The format of the gpio specifier depends on the gpio
+ controller.
+
+Example:
+
+ The MSHC controller node can be split into two portions, SoC specific and
+ board specific portions as listed below.
+
+ dwmmc0@1220 {
+ compatible = "samsung,exynos5250-dw-mshc";
+ reg = <0x1220 0x1000>;
+ interrupts = <0 75 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ dwmmc0@1220 {
+ num-slots = <1>;
+ supports-highspeed;
+ broken-cd;
+ fifo-depth = <0x80>;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-sdr-timing = <2 3 3>;
+ samsung,dw-mshc-ddr-timing = <1 2 3>;
+
+ slot@0 {
+ reg = <0>;
+ bus-width = <8>;
+ gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
+ <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
+ <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>,
+ <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
+ <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>;
+ };
+ };
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index aa131b3..9bf10e7 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -540,6 +540,15 @@ config MMC_DW_PLTFM
If unsure, say Y.
+config MMC_DW_EXYNOS
+ tristate "Exynos specific extentions for Synopsys DW Memory Card
Interface"
+ depends on MMC_DW
+ select MMC_DW_PLTFM
+ help
+ This selects support f
