On 12/10/11 06:16, Kukjin Kim wrote:
Marc Zyngier wrote:
Hi Changwan,
On 11/10/11 13:22, Changhwan Youn wrote:
Kukjin, could you please comment on the presence of a common memory
region for the distributor? This seem quite odd...
Some registers in Distributor are banked for PPI and SGI
Marc Zyngier wrote:
On 12/10/11 06:16, Kukjin Kim wrote:
Marc Zyngier wrote:
Hi Changwan,
On 11/10/11 13:22, Changhwan Youn wrote:
Kukjin, could you please comment on the presence of a common memory
region for the distributor? This seem quite odd...
Some registers in
On Mon, Oct 10, 2011 at 02:02:09PM +0100, Marc Zyngier wrote:
On 07/10/11 16:16, Will Deacon wrote:
On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
+static void __cpuinit exynos4_secondary_init(unsigned int cpu)
{
void __iomem *dist_base = S5P_VA_GIC_DIST +
-
Dear Marc and Will,
On Monday, October 10, 2011 10:02 PM, Marc Zyngier wrote:
On 07/10/11 16:16, Will Deacon wrote:
Hi Marc,
On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
So to make my suggestion completely clear, here's a patch I'm now
carrying in my tree. It's only
Hi Changwan,
On 11/10/11 13:22, Changhwan Youn wrote:
Kukjin, could you please comment on the presence of a common memory
region for the distributor? This seem quite odd...
Some registers in Distributor are banked for PPI and SGI support (banked
interrupts).
The register for pending and
Marc Zyngier wrote:
Hi Changwan,
On 11/10/11 13:22, Changhwan Youn wrote:
Kukjin, could you please comment on the presence of a common memory
region for the distributor? This seem quite odd...
Some registers in Distributor are banked for PPI and SGI support (banked
interrupts).
On 07/10/11 16:16, Will Deacon wrote:
Hi Marc,
On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
So to make my suggestion completely clear, here's a patch I'm now
carrying in my tree. It's only been test compiled on EXYNOS4, but works
nicely on my 11MP. It turns both dist_base
On 06/10/11 09:18, Marc Zyngier wrote:
On 06/10/11 07:30, Kukjin Kim wrote:
Marc Zyngier wrote:
Hi Changhwan,
Hi Marc,
(Cc'ed Will Deacon and Russell King)
On 20/06/11 08:34, Changhwan Youn wrote:
For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.
Marc Zyngier wrote:
On 06/10/11 09:18, Marc Zyngier wrote:
On 06/10/11 07:30, Kukjin Kim wrote:
Marc Zyngier wrote:
Hi Changhwan,
Hi Marc,
(Cc'ed Will Deacon and Russell King)
On 20/06/11 08:34, Changhwan Youn wrote:
For full support of power modes, this patch adds
Hi Marc,
On Fri, Oct 07, 2011 at 10:44:59AM +0100, Marc Zyngier wrote:
So to make my suggestion completely clear, here's a patch I'm now
carrying in my tree. It's only been test compiled on EXYNOS4, but works
nicely on my 11MP. It turns both dist_base and cpu_base into per-cpu
variables,
Marc Zyngier wrote:
Hi Changhwan,
Hi Marc,
(Cc'ed Will Deacon and Russell King)
On 20/06/11 08:34, Changhwan Youn wrote:
For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.
External GIC of Exynos4 cannot support register banking so
several
On 06/10/11 07:30, Kukjin Kim wrote:
Marc Zyngier wrote:
Hi Changhwan,
Hi Marc,
(Cc'ed Will Deacon and Russell King)
On 20/06/11 08:34, Changhwan Youn wrote:
For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.
External GIC of Exynos4 cannot
Hi Changhwan,
On 20/06/11 08:34, Changhwan Youn wrote:
For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.
External GIC of Exynos4 cannot support register banking so
several interrupt related code for CPU1 should be different
from that of CPU0.
I just
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