In probe, memory for multiple DMA descriptors were being allocated at once
and then it was being split and added into DMA pool one by one. The address
of this memory allocation is not being saved anywhere. To free this memory,
the address is required. Initially the first node of the pool will be
Since peripheral channel resources are not being allocated at probe,
no need to flush the channels and free the resources in remove function.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/dma/pl330.c |8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff
The first 2 patches of this series fix memory leaks because the memory
allocated for peripheral channels and DMA descriptors were not getting
freed.
The third patch balances the module's remove function.
This patchset is based on slave-dma tree's next branch merged with
fixes branch and applied
The allocated memory for peripheral channels is not being freed upon
failure in probe and in module's remove funtion. It will lead to memory
leakage. Hence free the allocated memory.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/dma/pl330.c |5 -
1 file changed, 4
Hi Rob,
On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring robherri...@gmail.com wrote:
On 09/17/2012 07:54 AM, Praveen Paneri wrote:
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310.
On 09/24/2012 11:38 AM, Praveen Paneri wrote:
Hi Kishon, Felipe,
Any further comments on these patches? Can they be merged now?
One nitpick inline.
Marc
Thanks,
Praveen
On Mon, Sep 17, 2012 at 6:24 PM, Praveen Paneri p.pan...@samsung.com wrote:
This driver uses usb_phy interface to
On Monday 24 September 2012 21:35:46 Inki Dae wrote:
2012/9/22 Stephen Warren swar...@wwwdotorg.org:
On 09/21/2012 01:22 AM, Inki Dae wrote:
2012/9/21 Stephen Warren swar...@wwwdotorg.org:
On 09/21/2012 05:22 AM, Leela Krishna Amudala wrote:
This patch adds device tree based discovery
On Tue, Sep 25, 2012 at 2:27 PM, Inderpal Singh
inderpal.si...@linaro.org wrote:
In probe, memory for multiple DMA descriptors were being allocated at once
and then it was being split and added into DMA pool one by one. The address
of this memory allocation is not being saved anywhere. To free
On Tue, Sep 25, 2012 at 2:27 PM, Inderpal Singh
inderpal.si...@linaro.org wrote:
Since peripheral channel resources are not being allocated at probe,
no need to flush the channels and free the resources in remove function.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
Hi,
On Tue, Sep 25, 2012 at 5:48 PM, Rob Herring robherri...@gmail.com wrote:
On 09/25/2012 06:23 AM, Praveen Paneri wrote:
Hi Rob,
On Mon, Sep 24, 2012 at 6:34 PM, Rob Herring robherri...@gmail.com wrote:
On 09/17/2012 07:54 AM, Praveen Paneri wrote:
This driver uses usb_phy interface to
2012/9/25 Laurent Pinchart laurent.pinch...@ideasonboard.com:
On Monday 24 September 2012 21:35:46 Inki Dae wrote:
2012/9/22 Stephen Warren swar...@wwwdotorg.org:
On 09/21/2012 01:22 AM, Inki Dae wrote:
2012/9/21 Stephen Warren swar...@wwwdotorg.org:
On 09/21/2012 05:22 AM, Leela Krishna
On 25 September 2012 18:17, Jassi Brar jassisinghb...@gmail.com wrote:
On Tue, Sep 25, 2012 at 2:27 PM, Inderpal Singh
inderpal.si...@linaro.org wrote:
The allocated memory for peripheral channels is not being freed upon
failure in probe and in module's remove funtion. It will lead to memory
On 25 September 2012 18:39, Jassi Brar jassisinghb...@gmail.com wrote:
On Tue, Sep 25, 2012 at 2:27 PM, Inderpal Singh
inderpal.si...@linaro.org wrote:
In probe, memory for multiple DMA descriptors were being allocated at once
and then it was being split and added into DMA pool one by one. The
On Wed, Sep 26, 2012 at 12:03:44AM +0900, Inki Dae wrote:
2012/9/25 Laurent Pinchart laurent.pinch...@ideasonboard.com:
Aren't DT bindings considered as an ABI, and required to be supported more
or
less forever ? If you merge this DT binding you'll have to keep supporting
it.
That's
On 09/25/2012 03:37 AM, Tomasz Figa wrote:
Hi Stephen,
On Monday 24 of September 2012 17:14:38 Stephen Warren wrote:
On 09/24/2012 03:31 PM, Tomasz Figa wrote:
On Monday 24 of September 2012 11:42:15 Stephen Warren wrote:
On 09/21/2012 01:54 PM, Tomasz Figa wrote:
On Friday 21 of September
On 09/25/2012 11:41 AM, Tomasz Figa wrote:
On Tuesday 25 of September 2012 10:49:11 Stephen Warren wrote:
On 09/25/2012 03:37 AM, Tomasz Figa wrote:
Hi Stephen,
On Monday 24 of September 2012 17:14:38 Stephen Warren wrote:
On 09/24/2012 03:31 PM, Tomasz Figa wrote:
On Monday 24 of September
On 09/25/2012 12:35 PM, Tomasz Figa wrote:
On Tuesday 25 of September 2012 12:22:03 Stephen Warren wrote:
...
BTW, how does the driver know what register addresses to use; I can see
the base for each pin controller bank is in samsung,pctl-offset, but
what describes the offset for each of the
Thomas Abraham wrote:
This patch series adds Exynos5250 platform support for MSHC controllers.
Thomas Abraham (3):
ARM: Samsung: Add support for MSHC controller clocks
ARM: Exynos5: Add AUXDATA support for MSHC controllers
ARM: dts: Add nodes for dw_mmc controllers for Samsung
Karol Lewandowski wrote:
On 09/22/2012 08:07 PM, Arun Kumar K wrote:
This patch adds device tree entry for MFC v6 in the Exynos5
SoC. Makes the required changes in the clock files and adds
MFC to the DT device list.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
2012/9/26 Mark Brown broo...@opensource.wolfsonmicro.com:
On Wed, Sep 26, 2012 at 12:03:44AM +0900, Inki Dae wrote:
2012/9/25 Laurent Pinchart laurent.pinch...@ideasonboard.com:
Aren't DT bindings considered as an ABI, and required to be supported more
or
less forever ? If you merge this
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