Hi,
On 30 January 2015 at 14:30, Gustavo Padovan gust...@padovan.org wrote:
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
We will lose unfinished prior events by this change. That's why we use
linked list.
I think you are right, but I was using exynos_crtc-event to do exactly the
same
On Fri, Jan 30, 2015 at 03:57:53PM +, Daniel Stone wrote:
Hi,
On 30 January 2015 at 14:30, Gustavo Padovan gust...@padovan.org wrote:
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
We will lose unfinished prior events by this change. That's why we use
linked list.
I think you
2015-01-30 Daniel Vetter dan...@ffwll.ch:
On Fri, Jan 30, 2015 at 03:57:53PM +, Daniel Stone wrote:
Hi,
On 30 January 2015 at 14:30, Gustavo Padovan gust...@padovan.org wrote:
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
We will lose unfinished prior events by this change.
On Tue, Jan 20, 2015 at 11:38 AM, Ajay Kumar ajaykumar...@samsung.com wrote:
Currently, third party bridge drivers(ptn3460) are dependent
on the corresponding encoder driver init, since bridge driver
needs a drm_device pointer to finish drm initializations.
The encoder driver passes the
On Fri, Jan 30, 2015 at 10:37:19AM -0500, Rob Clark wrote:
On Tue, Jan 20, 2015 at 11:38 AM, Ajay Kumar ajaykumar...@samsung.com wrote:
I'll also need to update the new bridge in the msm edp code..
although that isn't such a big deal if I knew how this was *supposed*
to work.. since what is
Hi,
On 30 January 2015 at 15:37, Rob Clark robdcl...@gmail.com wrote:
ok, so I probably should have had a closer look at this before it
landed in drm-next, so if it is too late to revert (and deal w/
untangling subsequent patches that depend on this) some of these
issues we'll just have to
On Thursday 29 January 2015 18:21:51 Eduardo Valentin wrote:
Hello Arnd and Viresh,
On Thu, Jan 29, 2015 at 01:42:32PM +0100, Arnd Bergmann wrote:
On Thursday 29 January 2015 15:40:15 Viresh Kumar wrote:
obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o
On Fri, Jan 30, 2015 at 10:24:12PM +0100, Arnd Bergmann wrote:
On Thursday 29 January 2015 18:21:51 Eduardo Valentin wrote:
Hello Arnd and Viresh,
On Thu, Jan 29, 2015 at 01:42:32PM +0100, Arnd Bergmann wrote:
On Thursday 29 January 2015 15:40:15 Viresh Kumar wrote:
From: Prathyush K prathyus...@samsung.com
When VPLL clock of less than 140 MHz was used and all the three
clocks - hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs
during S2R when HDMI is connected. Since we want to use a vpll
clock of 70.5 MHz, we cannot disable these 3 clocks before
Kept meaning to get back to this thread. Have you resolved it?
On 10/29/14 03:38, Marcin Jabrzyk wrote:
So I've tried this patch, it resolves one problem but introduces also
new ones. As expected the BUG warning is not showing after applying
this patch but there are some interesting side
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/30/2015 02:10 AM, Gustavo Padovan wrote:
From: Mandeep Singh Baines m...@chromium.org
The goal of the change is to make sure we send the vblank event on the
current vblank. My hope is to fix any races that
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
exynos_plane_dpms(DRM_MODE_DPMS_ON) calls the win_enable()'s callback
from the underlying layer. However neither
This is to fix an issue of sleeping in atomic context when processing
hotplug notifications in Exynos MCT(Multi-Core Timer).
The issue was reproducible on Exynos 3250 (Rinato board) and Exynos 5420
(Arndale Octa board).
Whilst testing cpu hotplug events on kernel configured with DEBUG_PREEMPT
and
Hi Joonyoung,
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get
Hi Joonyoung,
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
Hi,
On 01/23/2015 09:43 PM, Gustavo Padovan wrote:
From: Daniel Kurtz djku...@chromium.org
The 'mode' is the modeline information which specifies the ideal mode
requested by the mode set initiator (usually userspace).
Hi Alban,
2015-01-29 Alban Browaeys alban.browa...@gmail.com:
The hdmi outputs black screen only even though under the hood Xorg and
framebuffer console are fine : devices found and initialized, but
not a pixel out.
Commit 93bca243ec96 (drm/exynos: remove struct exynos_drm_manager)
Hi Lukasz,
On Fri, Jan 30, 2015 at 1:44 PM, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Eduardo, Abhilash,
On Thu, Jan 22, 2015 at 06:02:07PM +0530, Abhilash Kesavan wrote:
Hi Lukasz,
On Thu, Jan 22, 2015 at 2:31 PM, Lukasz Majewski
l.majew...@samsung.com wrote:
Hi Abhilash,
Hello,
On Fri, Jan 30, 2015 at 9:03 AM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
I haven't the S2R case since it is broken in mainline for Exynos5420
(even with $subject applied) but $subject fixes for me the system
crash we have discussed before [0]. That is when mixer_poweron()
Hi,
On 01/30/2015 05:30 PM, Seung-Woo Kim wrote:
For default graphic window, mixer_win_commit() sets display size
register as fb size. Calling setplane with smaller fb size than
mode size to default window causes distorted display result. So
this patch replaces fb size with mode size for
Hello,
On 2015-01-29 11:56, Javier Martinez Canillas wrote:
On Thu, Jan 29, 2015 at 10:15 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
Also, I wonder whether we could extend the mmc-pwrseq to cover your
case? Did you consider that as an option?
I didn't consider mmc-pwrseq yet. For
+To Kukjin
Jingoo, Kukjin, could one of you review this patch to ensure it's the
right thing to do on samsung hardware?
On Thu, 2015-01-22 at 22:41 +0100, Sjoerd Simons wrote:
When disabling the samsung PWM the output state remains at the level it
was in the end of a pwm cycle. In other
Hello Joonyoung,
On Fri, Jan 30, 2015 at 3:02 AM, Joonyoung Shim jy0922.s...@samsung.com wrote:
+Cc Kukjin,
Hi,
On 01/29/2015 10:31 PM, Gustavo Padovan wrote:
From: Prathyush K prathyus...@samsung.com
When VPLL clock of less than 140 MHz was used and all the three
clocks - hdmiphy, hdmi,
On 29 January 2015 at 16:00, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Hello Ulf,
Many WLAN chips attached to an SDIO interface needs more than one GPIO
for their reset sequence and also an external clock to be operational.
Since this is very common, this series extend
On 29 January 2015 at 16:00, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
Some WLAN chips attached to a SDIO interface, need a reference clock.
Since this is very common, extend the prseq_simple driver to support
an optional clock that is enabled prior the card power up
CPU1 hotplug may hang when AFTR is used. Fix it by:
- setting AUTOWAKEUP_EN bit in ARM_COREx_CONFIGURATION register in
exynos_cpu_power_up()
- not clearing reserved bits of ARM_COREx_CONFIGURATION register in
exynos_cpu_power_down()
- waiting while an undocumented register 0x0908 becomes
This code is needed for cpuidle (W-)AFTR mode support on Exynos3250.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/common.h | 6 ++
Hi,
This patch series adds support for AFTR idle mode on boards with
Exynos3250 SoC and allows EXYNOS cpuidle driver usage on these
boards.
It has been tested on Samsung Rinato board (Gear 2).
Depends on:
- for-next branch (commit: ce275c369a0b) of linux-samsung.git
kernel tree
Changes since
Hello Ulf,
On 01/30/2015 12:17 PM, Ulf Hansson wrote:
};
@@ -39,6 +42,11 @@ static void mmc_pwrseq_simple_pre_power_on(struct
mmc_host *host)
struct mmc_pwrseq_simple *pwrseq = container_of(host-pwrseq,
struct mmc_pwrseq_simple, pwrseq);
+
Hello Ulf,
On 01/30/2015 12:13 PM, Ulf Hansson wrote:
Patch #1 extends the simple MMC power sequence DT binding to support more
than one GPIO and patch #2 adds the actual implementation.
In the same way, patch #3 and #4 extend the simple MMC power sequence DT
binding and pwrseq_simple
2015-01-30 Joonyoung Shim jy0922.s...@samsung.com:
+Cc Inki,
Hi,
On 01/23/2015 09:42 PM, Gustavo Padovan wrote:
From: Gustavo Padovan gustavo.pado...@collabora.co.uk
The drm_file event_list hasn't been used anymore by exynos, so we don't
need any code to clean it.
No, it is
Hello Paul,
Thanks a lot for your feedback.
On 01/29/2015 10:11 PM, Paul Bolle wrote:
+config CROS_EC_LPC
+tristate ChromeOS Embedded Controller (LPC)
+depends on MFD_CROS_EC
+
Please drop this empty line.
Ok.
+help
+ If you say Y here, you get support for
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/firmware.c | 8 +++-
arch/arm/mach-exynos/pm.c | 12 +++-
arch/arm/mach-exynos/regs-pmu.h |
Register cpuidle platform device on Exynos3250 SoC allowing EXYNOS
cpuidle driver usage on this SoC.
Cc: Daniel Lezcano daniel.lezc...@linaro.org
Signed-off-by: Bartlomiej Zolnierkiewicz b.zolnier...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/exynos.c
On 30 January 2015 at 11:37, Marek Szyprowski m.szyprow...@samsung.com wrote:
Hello,
On 2015-01-29 11:56, Javier Martinez Canillas wrote:
On Thu, Jan 29, 2015 at 10:15 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
Also, I wonder whether we could extend the mmc-pwrseq to cover your
On Thu, Jan 29, 2015 at 08:12:20PM +0530, Ajay kumar wrote:
Hi Thierry,
I think you forgot to take this patch!
Can you check this?
Yes, I missed it somehow. It didn't build for me after applying it now,
but I fixed that up (and a few sparse warnings along with it). I'll send
out another pull
On Fri, 2015-01-30 at 11:37 +0100, Marek Szyprowski wrote:
Hello,
On 2015-01-29 11:56, Javier Martinez Canillas wrote:
On Thu, Jan 29, 2015 at 10:15 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
Also, I wonder whether we could extend the mmc-pwrseq to cover your
case? Did you
Hi Will,
On Wed, Jan 28, 2015 at 02:19:34PM +, Will Deacon wrote:
+/* This are the possible domain-types */
+enum iommu_domain_type {
+ IOMMU_DOMAIN_DMA, /* Domain used for DMA-API */
+ IOMMU_DOMAIN_IDENTITY, /* Identity mapped domain */
What happens if somebody calls
37 matches
Mail list logo
