anyway.
Otherwise, you may get unspecified behavior from the BUCK1/2/5,
which may incur unstable system.
Cheers,
MyungJoo
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Mobile Software Platform Lab, DMC Business, Samsung Electronics
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Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung
This patch prepares CPUFREQ support for S5PV210 by adding definitions
for S5P_VA_DMCx accessed by CPUFREQ, which were not defined previously.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv210/cpu.c
.
max8998_set_voltage should provide delay for BUCK1/2
if ENRAMP is on. It reads RAMP value from ONOFF4 register to determine
RAMP delay length. However, when max8998_set_voltage's new voltage is
lower than the previous, we don't care because it does not deteriorate
the stability.
Signed-off-by: MyungJoo
On Fri, Jul 16, 2010 at 8:02 PM, Maurus Cuelenaere
mcuelena...@gmail.com wrote:
Op 16-07-10 10:01, MyungJoo Ham schreef:
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported
would be regs-clock.h.
Note that only the information about registers used by CPUFREQ are
defined. However, we may need to define other registers later if we add
other parts.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
The CPUFREQ driver requires an access to DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv210/cpu.c | 12 +++-
arch/arm/mach-s5pv210/include/mach/map.h |4
2
as clock framework is settled, we may update source clocks
(.parent field) of those clocks accordingly later.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2:
- Ramp-up delay is removed. (let regulator framework do the job
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6
The CPUFREQ driver requires an access to DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git
powerdomain support is requred for blockgating, blockgating is NOT
required for powerdomain. Besides, powerdomain support is observed to reduce
power consumption significantly (with 2.6.29 kernel); however, blockgating
support didn't show any significant improvement.
MyungJoo Ham (4):
ARM: SAMSUNG SoC
is smaller than power-domain, and the saved current is
not so significant.
This patch enables powerdomain/block-gating support for Samsung SoC.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/Kconfig
flag field.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/clock.c | 70 ++-
arch/arm/plat-samsung/include/plat/clock.h | 12 +
2 files changed, 79 insertions(+), 3
Added .flags property to struct clk init_clocks[] and removed
init_clocks_disabled[], which became useless by BOOT_OFF bit of .flags.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv210/clock.c | 477
On Tue, Jul 20, 2010 at 10:04 AM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
This patches add support for powerdomain, block-gating, and flags in
struct clk.
Blockgating re-uses powerdomain support scheme and depends on powerdomain
support.
Flags support is independent
On Tue, Jul 20, 2010 at 9:37 AM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC
On Wed, Jul 21, 2010 at 9:37 AM, Ben Dooks b...@simtec.co.uk wrote:
On 07/19/10 06:31, MyungJoo Ham wrote:
CPUFREQ of S5PV210 uses different APLL settings and we provide
such values for CPUFREQ at pll.h. We have been using differently
between EVT0 and EVT1 machines. Although this version
On Wed, Jul 21, 2010 at 8:47 PM, Ben Dooks b...@simtec.co.uk wrote:
On 21/07/10 02:13, MyungJoo Ham wrote:
On Wed, Jul 21, 2010 at 9:36 AM, Ben Dooks b...@simtec.co.uk wrote:
On 07/19/10 06:31, MyungJoo Ham wrote:
Early S5PC110 (EVT0) chip had some issues required workaround from a
kernel
S5PV210 CPUFREQ Initial Support.
This is a series of patches to enable CPUFREQ for S5PV210.
Although this works without PMIC's DVS support, it is not
as effective without DVS support as supposed. AVS is not
supported in this version.
MyungJoo Ham (7):
ARM: S5PV210: Allow to probe whether
that there are other boards that use such early produces
other than Aquila. However, those boards/machines are not registered at
the /linux/arch/arm/tools/mach-types, yet; thus, we have omitted them
in this patch.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3
would be regs-clock.h.
Note that only the information about registers used by CPUFREQ are
defined. However, we may need to define other registers later if we add
other parts.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
On Mon, Jul 26, 2010 at 1:54 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC
Hi, again.
On Tue, Jul 27, 2010 at 6:06 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
Hello,
Hello,
On Fri, Jul 16, 2010 at 5:58 PM, Kukjin Kim kgene@samsung.com wrote:
From: Changhwan Youn chaos.y...@samsung.com
This patch adds clock and pll support
.
If .size = 0, the stable status is 0 and if .size = 1, the stable status
is 1.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/clock-clksrc.c | 13 +
arch/arm/plat-samsung/include
: macros for clock registers at regs-clock.h included
in CPUFREQ patch, which has definitions for S5P_CLK_MUX_STAT0,
S5P_CLK_MUX_STAT1, S5P_CLK_DIV_STAT0, and S5P_CLK_DIV_STAT1.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm
.
If .size = 0, the stable status is 0 and if .size = 1, the stable status
is 1.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2 changes:
- Wait-for-stable loop is described at an inline function.
---
arch/arm/plat-samsung
On Thu, Jul 29, 2010 at 2:25 AM, Ben Dooks b...@simtec.co.uk wrote:
On 28/07/10 04:17, MyungJoo Ham wrote:
Many MUX and clock dividers have a status bit so that users can wait
until the status is stable. When corresponding registers are accessed
while a clock is not stable, we may suffer from
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3
use macros: they are used
multiple times.
MyungJoo Ham (7):
ARM: S5PV210: Allow to probe EVT revision number.
ARM: Samsung SoC: added hclk/pclk info to s3c_freq for s5pv210
cpu-freq
ARM: S5P: Added default pll values for APLL 800/1000MHz
ARM: S5P: Virtual Addresses for DMCx
that are
used out of clock.c as well.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v5:
- Added macros for G2D/G3D/MFC's DIV/MUX_STAT, which tracks changing
status of G2D/G3D/MFC. These are added because they are used
as clock framework is settled, we may update source clocks
(.parent field) of those clocks accordingly later.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2:
- Ramp-up delay is removed. (let regulator framework do the job
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--
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Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
On Sat, Jul 31, 2010 at 3:09 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
Many MUX and clock dividers have a status bit so that users can wait
until the status is stable. When corresponding registers are accessed
while a clock is not stable, we may suffer from unexpected
On Tue, Aug 3, 2010 at 9:19 AM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
On Mon, Aug 2, 2010 at 2:30 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
Many MUX and clock dividers have a status bit so that users can wait
until the status is stable. When
,
s5pv210_target) is revised (initilization -- first_run)
* workaround -- revision
* CLK_*_STATx register entries use macros: they are used
multiple times.
MyungJoo Ham (7):
ARM: S5PV210: Allow to probe EVT revision number.
ARM: Samsung SoC: added hclk/pclk info to s3c_freq
/tools/mach-types, yet; thus, we have omitted them
in this patch.
For Goni machine. (mach-goni.c)
It's either EVT1 or EVT1-Fused; thus, it can be identified by
get_s5pv210_revision_chipid() function.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6
CPUFREQ of S5PV210 uses different APLL settings according to
different CPU frequencies. We provide such settings values for
CPUFREQ at pll.h.
Note that at 1GHz of ARMCLK, APLL should be 1GHz and for other lower
ARMCLK, APLL should be 800MHz.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
The CPUFREQ driver requires an access to DMCx registers. We
define virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/include/plat/map-s5p.h |3 +++
1 files changed, 3
The CPUFREQ driver requires an access to DMCx registers. We
define physical addresses and mapping between physical and virtual
addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach
that are
used out of clock.c as well.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 60 +-
1 files changed, 57 insertions(+), 3 deletions(-)
diff --git a/arch/arm
as clock framework is settled, we may update source clocks
(.parent field) of those clocks accordingly later.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2:
- Ramp-up delay is removed. (let regulator framework do the job
* Initialization of s5pv210_cpufreq_target (previously,
s5pv210_target) is revised (initilization -- first_run)
* workaround -- revision
* CLK_*_STATx register entries use macros: they are used
multiple times.
MyungJoo Ham (6):
ARM: S5PV210: Allow to probe EVT revision number
are not registered at
the /linux/arch/arm/tools/mach-types, yet; thus, we have omitted them
in this patch.
For Goni machine. (mach-goni.c)
We do not have Goni machines with EVT0, yet.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v5 updates
The CPUFREQ driver requires an access to DMCx registers. We
define addresses of DMCx registers and mapping between physical and
virtual addresses of DMCx registers.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v7
that are
used out of clock.c as well.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v7:
- Removed unnecessary defines.
---
arch/arm/mach-s5pv210/include/mach/regs-clock.h | 45 +--
1 files changed, 42
as clock framework is settled, we may update source clocks
(.parent field) of those clocks accordingly later.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2:
- Ramp-up delay is removed. (let regulator framework do the job
CLK_GATE_IP3[8] is RESERVED. The port I2C_HDMI_DDY of
CLK_GATE_IP3[10] is used as another I2C port (but not dedicated to HDMI
as if it is a general I2C port)
Therefore, we define the unused I2C-1 (IP3[8] is not used) as another
I2C there was left undefined but used.
Signed-off-by: MyungJoo Ham
...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
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Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858
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Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858
Thank you for the comments. They will be applied to the next patch
revision releasing soon.
On Thu, Aug 19, 2010 at 7:46 PM, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Thu, Aug 19, 2010 at 04:05:15PM +0900, MyungJoo Ham wrote:
(snip)
+ max8952_write_reg(max8952
although the data sheet has some ambiguity on it.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
--
v2:
- Style correction
- Can accept platform_data with invalid GPIOs
- Removed unnecessary features
/listinfo/linux-arm-kernel
Overall, this patch appears to be subset of the previous [PATCH v7
6/6] ARM: S5PV210: Initial CPUFREQ Support and things omitted (and
should be added) are already implemented there.
--
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Samsung Electronics
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On Mon, Oct 11, 2010 at 5:04 PM, Sangbeom Kim sbki...@samsung.com wrote:
On Monday, Oct 11, 2010 9:12 AM, MyungJoo Ham myungjoo@samsung.com
wrote:
Hello,
On Fri, Oct 8, 2010 at 6:52 PM, Kukjin Kim kgene@samsung.com wrote:
Sangbeom Kim wrote:
Hi all,
I know
On Thu, May 22, 2014 at 5:37 AM, Paul Bolle pebo...@tiscali.nl wrote:
Checks for CONFIG_EXYNOS_ASV were added in v3.3. But the related Kconfig
symbol has never been added to the tree. Remove these checks, as they
always evaluate to false.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
Thanks
On Fri, May 23, 2014 at 1:52 PM, MyungJoo Ham myungjoo@samsung.com wrote:
On Thu, May 22, 2014 at 5:37 AM, Paul Bolle pebo...@tiscali.nl wrote:
Checks for CONFIG_EXYNOS_ASV were added in v3.3. But the related Kconfig
symbol has never been added to the tree. Remove these checks
On Thu, Oct 6, 2011 at 3:31 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
2011/8/19 Kyungmin Park kmp...@infradead.org:
Maybe charger manager codes are not merged. it's used for charger
managers.
To Mr. Ham,
which patches are missing?
Thank you,
Kyungmin Park
://vger.kernel.org/majordomo-info.html
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.
Cheers!
MyungJoo.
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Mobile Software Platform Lab, DMC Business, Samsung Electronics
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-samsung/shortlog/refs/heads/devfreq
(drivers/devfreq/exynos4210_memorybus.c)
Devfreq is a framework to support DVFS feature for non-CPU devices,
which is at 3.2-next tree.
Cheers!
MyungJoo
--
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Mobile Software Platform Lab, DMC Business, Samsung Electronics
--
To unsubscribe
. This location
mach/asv.h seems the perfect location for the purpose. Besides, now,
with Exynos4x12s, I start to hear cases where all the INFORMx
registers are fully used; thus, it seems that it's time to remove
unnecessary usage of the registers.
Cheers!
MyungJoo
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Mobile Software
.
Cheers!
MyungJoo
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Thanks,
Sylwester
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the value at the same location, which is the
method we have been using.
Besides, the Exynos4210 chipmaker (S.LSI) has told that INFORM6 and 7
registers are used by in-chip code (iROM or iRAM).
Cheers!
MyungJoo
--
MyungJoo Ham, Ph.D.
Mobile Software Platform Lab, DMC Business, Samsung Electronics
On Thu, Nov 17, 2011 at 8:22 PM, Amit Kachhap amit.kach...@linaro.org wrote:
On 11 November 2011 13:03, MyungJoo Ham myungjoo@gmail.com wrote:
On Sat, Nov 5, 2011 at 2:03 AM, amit.kach...@linaro.org wrote:
From: Amit Daniel Kachhap amit.kach...@linaro.org
This patch adds support for AFTR
for this?
Arnd
There was a discussion about this and a patch seemed to be ready
although I don't know where:
---[quoting: Re: [PATCH 1/2] ARM: EXYNOS4: convert MCT to percpu
interrupt API from linux-arm-ker...@lists.infradead.org]---
On 10/11/11 23:33, MyungJoo Ham wrote:
On Thu, Nov 10, 2011 at 6:43 PM
CONFIG_EXYNOS4_ASV to block ASV-related code.
With support of ASV, this devfreq driver reduces power consumption
futher; most Exynos4210 SoCs have lower voltage requirement than
the worst case (ASV number 0) scenario.
MyungJoo Ham (4):
ARM: EXYNOS4: Add DMC1, allow PPMU access for DMC.
PM
- Add DMC1
- Enlarge address space for DMC from 4k to 64k so that PPMU registers
may be accessed.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/cpu.c |7 ++-
arch/arm/mach-exynos/include
because without ASV, this Devfreq
driver assumes the worst case scenario, which consumes more power.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/devfreq/Kconfig| 12 +
drivers/devfreq/Makefile
Support varying voltages:
- GPIODVS for Buck2 is removed.
- Voltage ragne for Buck2 is widen.
Support Buck2 regulator for Exynos4210-bus devfreq driver:
- Added device name for buck2 regulator
- Added exynos4210-busfreq platform device fro Nuri board.
Signed-off-by: MyungJoo Ham myungjoo
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos/mach-nuri.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index
) for
the device driver and we had to resolve the compiler error first.
Cheers!
MyungJoo
--
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Mobile Software Platform Lab, DMC Business, Samsung Electronics
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On Sat, Dec 3, 2011 at 6:26 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
On Fri, Dec 2, 2011 at 5:59 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Hamm wrote:
What's the 'compiler errors'?
And I don't know why this patch included in this series, maybe
On Fri, Dec 9, 2011 at 1:27 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Add irq domain support for max8997 interrupts. All uses of irq_base in
platform
data and max8997 driver private data are removed.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham
/linux-samsung.git devfreq-for-samsung
MyungJoo Ham (3):
ARM: EXYNOS4: Add DMC1, allow PPMU access for DMC.
ARM: EXYNOS4: Add clock register addresses for Exynos4x12 bus
devfreq driver
ARM Exynos4210-Nuri: support Exynos4210-bus Devfreq driver.
arch/arm/mach-exynos/cpu.c
another branch for this. Thus,
having the patches in your Exynos' branch is also fine.
I'll let future pull-requested branches be rebased on rcX anyway. Thanks.
Cheers! Happy new year!
- MyungJoo
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MyungJoo Ham, Ph.D.
Mobile Software Platform Lab, DMC Business, Samsung Electronics
oder in remove function are
also revised accordingly.
Reported-by: Chanwoo Park cw00.c...@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/watchdog/s3c2410_wdt.c | 29 +++--
1 files changed
On Sat, Jan 14, 2012 at 6:45 AM, Wim Van Sebroeck w...@iguana.be wrote:
Hi,
On Fri, Jan 13, 2012 at 11:11:17AM +, Russell King - ARM Linux wrote:
On Fri, Jan 13, 2012 at 02:14:23PM +0900, MyungJoo Ham wrote:
Probe function of s3c2410 watchdog calls request_irq before initializing
On Tue, Jan 31, 2012 at 1:49 PM, Kukjin Kim kgene@samsung.com wrote:
According to replacing the name of EXYNOS clock registers,
this patch updates exynos4_bus.c file where it is used.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off
before it, not after it should be fine.
So what that be attached patch then? Could you also test this patch?
This patch looks fine and works. It's tested in Exynos4 machine.
Acked-by: MyungJoo Ham myungjoo@samsung.com
Thanks.
Cheers!
MyungJoo.
Kind regards,
Wim.
---
diff --git a/drivers
the linux irq
number for max8997 interrupts. All uses of irq_base in platform data and
max8997 driver private data are removed.
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Acked-by: Grant Likely grant.lik...@secretlab.ca
Acked-by: MyungJoo Ham
On Sat, Mar 24, 2012 at 6:49 PM, Thomas Abraham
thomas.abra...@linaro.org wrote:
Add device tree based discovery support for max8997.
Cc: MyungJoo Ham myungjoo@samsung.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@secretlab.ca
-kernel
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linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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MyungJoo Ham, Ph.D.
System S/W Lab, S/W Center, Samsung Electronics
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On Tue, Nov 19, 2013 at 10:30 PM, Jonghwan Choi jhbird.c...@gmail.com wrote:
Frequency lock should be considered in suspend/hibernation.
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Applied in driver-update branch.
Do you want
On Tue, Nov 19, 2013 at 10:30 PM, Jonghwan Choi jhbird.c...@gmail.com wrote:
Frequency lock should be considered in suspend/hibernation.
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Cheers,
MyungJoo.
---
drivers/devfreq
.
Thanks,
Sebastian Capella
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MyungJoo Ham, Ph.D.
System S/W Lab, S/W Center, Samsung
On Tue, Dec 17, 2013 at 8:52 PM, kg...@kernel.org wrote:
From: Kukjin Kim kgene@samsung.com
We don't need to keep the definitions for exynos4_bus into
mach-exynos/ so this moves them into drviers/devfreq with
adding header file.
Acked-by: MyungJoo Ham myungjoo@samsung.com
However
/map.h:22:0: warning: S3C_UART_OFFSET
redefined [enabled by default]
In file included from drivers/devfreq/exynos/exynos4_bus.c:33:0:
arch/arm/plat-samsung/include/plat/map-s5p.h:57:0: note: this is the
location of the previous definition
Cc: MyungJoo Ham myungjoo@samsung.com
Signed-off
On Thu, Dec 19, 2013 at 2:54 AM, Kukjin Kim kgene@samsung.com wrote:
On 12/18/13 15:11, MyungJoo Ham wrote:
On Tue, Dec 17, 2013 at 8:52 PM,kg...@kernel.org wrote:
From: Kukjin Kimkgene@samsung.com
We don't need to keep the definitions for exynos4_bus into
mach-exynos/ so
-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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MyungJoo Ham, Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858
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On Wed, Oct 27, 2010 at 4:58 PM, Kukjin Kim kgene@samsung.com wrote:
MyungJoo Ham wrote:
On Fri, Oct 8, 2010 at 8:41 AM, Kukjin Kim kgene@samsung.com wrote:
From: Changhwan Youn chaos.y...@samsung.com
S3C2410_RTCCON of TYPE_S3C64XX RTC should be read/written by
readw and writew
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MyungJoo Ham (함명주), Ph.D.
Mobile Software Platform Lab,
Digital Media and Communications (DMC) Business
Samsung Electronics
cell: 82-10-6714-2858
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The section mismatch in headsmp.S made hotplug stop working after the
first instance of suspend-to-RAM and its wakeup.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos4/headsmp.S |2 +-
1 files changed, 1
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-exynos4/Kconfig |1 +
arch/arm/mach-exynos4/cpu.c |4
arch/arm/mach-exynos4/include/mach/irqs.h |8
arch/arm/mach
In S5PV210/S5PC110/Exynos4, ADCMUX channel selection uses ADCMUX
register, not ADCCON register. This patch corrects the behavior of
Samsung-ADC for such cpus.
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
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v2: No changes from v1
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