Re: [PATCH 4/4] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

2014-06-25 Thread Tomasz Figa
Hi Marek, Daniel,

On 24.06.2014 13:47, Marek Szyprowski wrote:
 Hello,
 
 On 2014-06-19 14:43, Daniel Drake wrote:
 On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
 m.szyprow...@samsung.com wrote:
 This patch moves some parts of exynos4412-odroidx.dts to common
 exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
 U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
 instead of 1.4GHz), while U2/U3 differs from X2 by different way of
 routing signals to host USB hub. It also lacks some hw modules not yet
 supported by those dts files (i.e. LCD  touch panel).
 Thanks for this! It is working on ODROID-U2: at least eMMC/SD, LED,
 serial.

 Just 2 minor questions from reviewing:

 Odroid-X DTS used to have serial ports at 1382 and 1383, this
 patch removes them, but leaves 2.
 
 Right. I've forgot the UART port change. Now I've checked it again and
 schematics reveals that Odroid X/X2 and U2/U3 has UART1 available on UART
 connector. On the other hand U2/U3 have UART0 RX/TX lines on GPIO
 connector,
 while X/X2 has UART3 lines on the LCD/GPIO connector.
 
 I can understand the idea of removing entries for ports that are not
 available on the board, but I've never seen an ODROID with 2 serial
 ports - should we bring this down to just the 1 enabled serial port
 that is accessible?
 
 That would be best solution, but this way the tty driver name will change
 from ttySAC1 to ttySAC0 for UART1 port. Until uart driver gets fixed, I
 would keep all 4 uart defined on X/X2 and define only uart 0 and 1 on
 U2/U3. I will fix this in the next version of Odroid patches.

I managed to code port ID look-up from DT aliases today. I'll try to
polish the patches a bit more and send them to ML tomorrow. With this,
the problem should be fixed.

Best regards,
Tomasz
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Re: [PATCH 4/4] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

2014-06-24 Thread Marek Szyprowski

Hello,

On 2014-06-19 14:43, Daniel Drake wrote:

On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:

This patch moves some parts of exynos4412-odroidx.dts to common
exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
instead of 1.4GHz), while U2/U3 differs from X2 by different way of
routing signals to host USB hub. It also lacks some hw modules not yet
supported by those dts files (i.e. LCD  touch panel).

Thanks for this! It is working on ODROID-U2: at least eMMC/SD, LED, serial.

Just 2 minor questions from reviewing:

Odroid-X DTS used to have serial ports at 1382 and 1383, this
patch removes them, but leaves 2.


Right. I've forgot the UART port change. Now I've checked it again and
schematics reveals that Odroid X/X2 and U2/U3 has UART1 available on UART
connector. On the other hand U2/U3 have UART0 RX/TX lines on GPIO connector,
while X/X2 has UART3 lines on the LCD/GPIO connector.


I can understand the idea of removing entries for ports that are not
available on the board, but I've never seen an ODROID with 2 serial
ports - should we bring this down to just the 1 enabled serial port
that is accessible?


That would be best solution, but this way the tty driver name will change
from ttySAC1 to ttySAC0 for UART1 port. Until uart driver gets fixed, I
would keep all 4 uart defined on X/X2 and define only uart 0 and 1 on
U2/U3. I will fix this in the next version of Odroid patches.


Odroid-X DTS used to enable EHCI port 2, but with this refactoring, no
longer does. Intentional?


This was a bug in the initial patch adding usb support. X and X2 uses only
HSCI0 port (ehci port 1).

Thanks for your review!

Best regards
--
Marek Szyprowski, PhD
Samsung RD Institute Poland

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Re: [PATCH 4/4] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

2014-06-19 Thread Daniel Drake
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
m.szyprow...@samsung.com wrote:
 This patch moves some parts of exynos4412-odroidx.dts to common
 exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
 U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
 instead of 1.4GHz), while U2/U3 differs from X2 by different way of
 routing signals to host USB hub. It also lacks some hw modules not yet
 supported by those dts files (i.e. LCD  touch panel).

Thanks for this! It is working on ODROID-U2: at least eMMC/SD, LED, serial.

Just 2 minor questions from reviewing:

Odroid-X DTS used to have serial ports at 1382 and 1383, this
patch removes them, but leaves 2.
I can understand the idea of removing entries for ports that are not
available on the board, but I've never seen an ODROID with 2 serial
ports - should we bring this down to just the 1 enabled serial port
that is accessible?

Odroid-X DTS used to enable EHCI port 2, but with this refactoring, no
longer does. Intentional?

Thanks
Daniel
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[PATCH 4/4] ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3

2014-06-17 Thread Marek Szyprowski
This patch moves some parts of exynos4412-odroidx.dts to common
exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
instead of 1.4GHz), while U2/U3 differs from X2 by different way of
routing signals to host USB hub. It also lacks some hw modules not yet
supported by those dts files (i.e. LCD  touch panel).

Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
 arch/arm/boot/dts/Makefile  |   2 +
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 319 +++
 arch/arm/boot/dts/exynos4412-odroidu3.dts   |  49 
 arch/arm/boot/dts/exynos4412-odroidx.dts| 329 +---
 arch/arm/boot/dts/exynos4412-odroidx2.dts   |  23 ++
 5 files changed, 400 insertions(+), 322 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4412-odroid-common.dtsi
 create mode 100644 arch/arm/boot/dts/exynos4412-odroidu3.dts
 create mode 100644 arch/arm/boot/dts/exynos4412-odroidx2.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5986ff63b901..28b354936685 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -66,7 +66,9 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
+   exynos4412-odroidu3.dtb \
exynos4412-odroidx.dtb \
+   exynos4412-odroidx2.dtb \
exynos4412-origen.dtb \
exynos4412-smdk4412.dtb \
exynos4412-tiny4412.dtb \
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
new file mode 100644
index ..f793f3b8f0b9
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -0,0 +1,319 @@
+/*
+ * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
+ * device tree source
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include exynos4412.dtsi
+
+/ {
+   firmware@0204F000 {
+   compatible = samsung,secure-firmware;
+   reg = 0x0204F000 0x1000;
+   };
+
+   mmc@1255 {
+   pinctrl-0 = sd4_clk sd4_cmd sd4_bus4 sd4_bus8;
+   pinctrl-names = default;
+   vmmc-supply = ldo20_reg buck8_reg;
+   status = okay;
+
+   num-slots = 1;
+   supports-highspeed;
+   broken-cd;
+   card-detect-delay = 200;
+   samsung,dw-mshc-ciu-div = 3;
+   samsung,dw-mshc-sdr-timing = 2 3;
+   samsung,dw-mshc-ddr-timing = 1 2;
+
+   slot@0 {
+   reg = 0;
+   bus-width = 8;
+   };
+   };
+
+   watchdog@1006 {
+   status = okay;
+   };
+
+   rtc@1007 {
+   status = okay;
+   };
+
+   g2d@1080 {
+   status = okay;
+   };
+
+   camera {
+   status = okay;
+   pinctrl-names = default;
+   pinctrl-0 = ;
+
+   fimc_0: fimc@1180 {
+   status = okay;
+   };
+
+   fimc_1: fimc@1181 {
+   status = okay;
+   };
+
+   fimc_2: fimc@1182 {
+   status = okay;
+   };
+
+   fimc_3: fimc@1183 {
+   status = okay;
+   };
+   };
+
+   sdhci@1253 {
+   bus-width = 4;
+   pinctrl-0 = sd2_clk sd2_cmd sd2_cd sd2_bus4;
+   pinctrl-names = default;
+   vmmc-supply = ldo4_reg ldo21_reg;
+   status = okay;
+   };
+
+   serial@1380 {
+   status = okay;
+   };
+
+   serial@1381 {
+   status = okay;
+   };
+
+   fixed-rate-clocks {
+   xxti {
+   compatible = samsung,clock-xxti;
+   clock-frequency = 0;
+   };
+
+   xusbxti {
+   compatible = samsung,clock-xusbxti;
+   clock-frequency = 2400;
+   };
+   };
+
+   i2c@1386 {
+   pinctrl-0 = i2c0_bus;
+   pinctrl-names = default;
+   status = okay;
+
+   usb3503: usb3503@08 {
+   compatible = smsc,usb3503;
+   reg = 0x08;
+
+   intn-gpios = gpx3 0 0;
+   connect-gpios = gpx3 4 0;
+   reset-gpios = gpx3 5 0;
+   initial-mode = 1;
+   };
+
+   max77686: pmic@09 {
+   compatible = maxim,max77686;
+