[PATCH] scsi: lpfc: Switch memcpy_fromio() to __read32_copy()

2018-01-26 Thread Huacai Chen
it switch memcpy_fromio() to __read32_copy(). Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/lpfc/lpfc_compat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/lpfc/lpfc_compat.h b/drivers/scsi/lpfc/lpfc_compat

[PATCH V10 4/4] libsas: Align sata_device's rps_resp on a cacheline

2017-11-16 Thread Huacai Chen
expander. Fix this by ensuring that the rps_resp buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f93 ("libata: align ap->sector_buf") and Commit 4ee34ea3a12396f35b26 ("libata: Align ata_device's id on a cacheline"). Cc: sta...@vger.kernel.or

[PATCH V10 3/4] scsi: Align block queue to dma_get_cache_alignment()

2017-11-16 Thread Huacai Chen
(no writeback) will cause data corruption. Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 1cbc497..cc4ac97 100644 --- a/drivers/scsi/scsi_lib.c

[PATCH V10 2/4] MIPS: Implement dma_map_ops::get_cache_alignment()

2017-11-16 Thread Huacai Chen
Currently, MIPS is an architecture which support coherent & noncoherent devices co-exist. So implement get_cache_alignment() function pointer in 'struct dma_map_ops' to return different dma alignments. Signed-off-by: Huacai Chen <che...@lemote.com> --- arch/mips/cavium-octeon/dm

[PATCH V10 1/4] dma-mapping: Rework dma_get_cache_alignment()

2017-11-16 Thread Huacai Chen
dt <b...@kernel.crashing.org> Cc: Ivan Mikhaylov <i...@ru.ibm.com> Cc: Tariq Toukan <tar...@mellanox.com> Cc: Andy Gross <agr...@codeaurora.org> Cc: Robert Baldyga <r.bald...@hackerion.com> Acked-by: Mark Greer <mgr...@animalcreek.com> Acked-by: Marek Szypr

[PATCH V9 3/4] scsi: Align block queue to dma_get_cache_alignment()

2017-10-23 Thread Huacai Chen
(no writeback) will cause data corruption. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 9cf6a80..19abc2e

[PATCH V9 1/4] dma-mapping: Rework dma_get_cache_alignment()

2017-10-23 Thread Huacai Chen
c: Robert Baldyga <r.bald...@hackerion.com> Cc: Marek Szyprowski <m.szyprow...@samsung.com> Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/infiniband/hw/mthca/mthca_main.c | 2 +- drivers/media/v4l2-core/videobuf2-dma-contig.c | 2 +- drivers/net/ethernet/broadc

[PATCH V9 4/4] libsas: Align sata_device's rps_resp on a cacheline

2017-10-23 Thread Huacai Chen
expander. Fix this by ensuring that the rps_resp buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f93 ("libata: align ap->sector_buf") and Commit 4ee34ea3a12396f35b26 ("libata: Align ata_device's id on a cacheline"). Cc: sta...@vger.kernel.or

[PATCH V9 2/4] MIPS: Implement dma_map_ops::get_cache_alignment()

2017-10-23 Thread Huacai Chen
Currently, MIPS is an architecture which support coherent & noncoherent devices co-exist. So implement get_cache_alignment() function pointer in 'struct dma_map_ops' to return different dma alignments. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- arch/m

[PATCH V8 2/5] MIPS: Implement dma_map_ops::get_cache_alignment()

2017-10-17 Thread Huacai Chen
Currently, MIPS is an architecture which support coherent & noncoherent devices co-exist. So implement get_cache_alignment() function pointer in 'struct dma_map_ops' to return different dma alignments. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- arch/m

[PATCH V8 4/5] libsas: Align SMP req/resp to dma_get_cache_alignment()

2017-10-17 Thread Huacai Chen
, cache_invalidate (no writeback) will cause data corruption. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/libsas/sas_expander.c | 93 +++--- 1 file changed, 57 insertions(+), 36 deletions(-) diff --git a/drivers/scsi/

[PATCH V8 3/5] scsi: Align block queue to dma_get_cache_alignment()

2017-10-17 Thread Huacai Chen
(no writeback) will cause data corruption. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 9cf6a80..19abc2e

[PATCH V8 5/5] libata: Align DMA buffer to dma_get_cache_alignment()

2017-10-17 Thread Huacai Chen
, cache_invalidate (no writeback) will cause data corruption. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/ata/libata-core.c | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-

[PATCH V8 1/5] dma-mapping: Rework dma_get_cache_alignment()

2017-10-17 Thread Huacai Chen
k.com> Cc: Robert Baldyga <r.bald...@hackerion.com> Cc: Marek Szyprowski <m.szyprow...@samsung.com> Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/infiniband/hw/mthca/mthca_main.c | 2 +- drivers/media/v4l2-core/videobuf2-dma-contig.c | 2 +- drivers/net/eth

[PATCH V7 2/2] scsi: Align block queue to dma_get_cache_alignment()

2017-09-25 Thread Huacai Chen
) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.

[PATCH V7 1/2] dma-mapping: Rework dma_get_cache_alignment()

2017-09-25 Thread Huacai Chen
add a new get_cache_alignment() function pointer in 'struct dma_map_ops' as a generic solution. For compatibility (always return ARCH_DMA_MINALIGN), make all existing callers pass a NULL dev argument to dma_get_cache_alignment(). Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lem

[PATCH V6 3/3] scsi: Align block queue to dma_get_cache_alignment()

2017-09-19 Thread Huacai Chen
) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.

[PATCH V6 2/3] dma-mapping: Rework dma_get_cache_alignment() function

2017-09-19 Thread Huacai Chen
Make dma_get_cache_alignment() to accept a 'dev' argument. As a result, it can return different alignments due to different devices' I/O cache coherency. For compatibility, make all existing callers pass a NULL dev argument. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.

[PATCH V6 1/3] dma-mapping: Introduce device_is_coherent() as a helper

2017-09-19 Thread Huacai Chen
We will use device_is_coherent() as a helper function, which will be used in the next patch. There is a MIPS-specific plat_device_is_coherent(), but we need a more generic solution, so add and use a new function pointer in dma_map_ops. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <

[PATCH V5 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-17 Thread Huacai Chen
) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.

[PATCH V4 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-14 Thread Huacai Chen
) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.

[PATCH V3 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-13 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 9 ++--- 1 file chan

[PATCH V2 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-12 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 9 ++--- 1 file chan

[PATCH 2/2] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-07 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen <che...@lemote.com> --- drivers/scsi/scsi_lib.c | 9 ++--- 1 file chan