Re: [PATCH] mvsas: fix wrong endianness of sgpio api

2018-03-02 Thread Wilfried Weissmann

Hello Martin,

Thanks, and I promise to keep on working hard on not falling over my own feet 
doing a git send-email!

Am 02.03.18 um 03:09 schrieb Martin K. Petersen:


Wilfried,


This patch fixes the byte order of the SGPIO api and brings it back in
sync with ledmon v0.80 and above.


The patch was missing your Signed-off-by: tag. I added it and applied
patch to 4.17/scsi-queue.



Re: [PATCH] mvsas: fix wrong endianness of sgpio api

2018-03-01 Thread Martin K. Petersen

Wilfried,

> This patch fixes the byte order of the SGPIO api and brings it back in
> sync with ledmon v0.80 and above.

The patch was missing your Signed-off-by: tag. I added it and applied
patch to 4.17/scsi-queue.

-- 
Martin K. Petersen  Oracle Linux Engineering


[PATCH] mvsas: fix wrong endianness of sgpio api

2018-02-23 Thread Wilfried . Weissmann
From: Wilfried Weissmann 

This patch fixes the byte order of the SGPIO api and brings it back
in sync with ledmon v0.80 and above.
---
 drivers/scsi/mvsas/mv_94xx.c | 23 ---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/scsi/mvsas/mv_94xx.c b/drivers/scsi/mvsas/mv_94xx.c
index 7de5d8d75..84a638a90 100644
--- a/drivers/scsi/mvsas/mv_94xx.c
+++ b/drivers/scsi/mvsas/mv_94xx.c
@@ -1080,16 +1080,16 @@ static int mvs_94xx_gpio_write(struct mvs_prv_info 
*mvs_prv,
void __iomem *regs = mvi->regs_ex - 0x10200;
 
int drive = (i/3) & (4-1); /* drive number on host */
-   u32 block = mr32(MVS_SGPIO_DCTRL +
+   int driveshift = drive * 8; /* bit offset of drive */
+   u32 block = ioread32be(regs + MVS_SGPIO_DCTRL +
MVS_SGPIO_HOST_OFFSET * mvi->id);
 
-
/*
* if bit is set then create a mask with the first
* bit of the drive set in the mask ...
*/
-   u32 bit = (write_data[i/8] & (1 << (i&(8-1 ?
-   1<<(24-drive*8) : 0;
+   u32 bit = get_unaligned_be32(write_data) & (1<id);
 
}
 
@@ -1132,7 +1133,7 @@ static int mvs_94xx_gpio_write(struct mvs_prv_info 
*mvs_prv,
void __iomem *regs = mvi->regs_ex - 0x10200;
 
mw32(MVS_SGPIO_DCTRL + MVS_SGPIO_HOST_OFFSET * mvi->id,
-   be32_to_cpu(((u32 *) write_data)[i]));
+   ((u32 *) write_data)[i]);
}
return reg_count;
}