Signed-off-by: Eugeniy Paltsev
---
arch/arc/mm/dma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c
index 0bf1468c35a3..e9cd0a1733bf 100644
--- a/arch/arc/mm/dma.c
+++ b/arch/arc/mm/dma.c
@@ -158,6 +158,6 @@ void arch_setup_dma_ops
g the kernel.
Depend on this value we tweak memory bridge configuration and
"dma-coherent" DTS property of DW AXI DMAC.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/boot/dts/Makefile| 3 ++
arch/arc/plat-hsdk/platform.c | 87 ++-
2 files changed
This commit adds support for the SST sst26wf016b flash memory IC.
This IC was tested with "snps,dw-apb-ssi" SPI controller.
We don't test dual/quad reads however sst26wf016b flash's datasheet
advertises both dual and quad reads (and support of corresponding
commands)
Signed-off-b
NOP and BRANCH instructions
which forced to be aligned by 4 to guarantee that they don't
cross L1 I$ cache fetch block and can be update atomically.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Patched instruction should not cross L1 I$ fetch block boundary and
not only L1 I$ line.
On Wed, 2019-07-17 at 17:45 +, Vineet Gupta wrote:
> On 7/17/19 8:09 AM, Eugeniy Paltsev wrote:
> > > > +/* Halt system on fatal error to make debug easier */
> > > > +
Hi Vineet,
I'm finally back, so see my comments below.
On Tue, 2019-06-18 at 16:16 +, Vineet Gupta wrote:
> On 6/14/19 9:41 AM, Eugeniy Paltsev wrote:
> > Implement jump label patching for ARC. Jump labels provide
> > an interface to generate dynamic branches using
> >
For some reasons my previous patch "Enable AXI DW DMAC support"
was applied only partially (only device tree part).
So enable AXI DW DMAC in HSDK defconfig to be able to use it in
verification flow.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/configs/hsdk_defconfig | 2 ++
1 file
Hi Vineet,
I guess you'll add this to 5.3, right?
On Fri, 2019-06-07 at 15:29 +, Alexey Brodkin wrote:
> Hi Eugeniy,
>
> > -Original Message-
> > From: Eugeniy Paltsev
> > Sent: Friday, June 7, 2019 5:48 PM
> > To: linux-snps-arc@lists.infradead.org; V
DMA_ATTR_NON_CONSISTENT support
[PATCH 7/7] arc: use the generic remapping allocator for coherent DMA
allocations
On Mon, 2019-06-24 at 15:14 +0200, h...@lst.de wrote:
> On Sat, Jun 15, 2019 at 10:35:54AM +0200, h...@lst.de wrote:
> > On Fri, Jun 14, 2019 at 06:05:01PM +, Eugeniy Paltsev wrote:
byte trap instruction -- since all instructions are
> 2 byte aligned, you can always poke that without issue.
Yep we have 2 byte trap (trap_s instruction).
Actually there are even two candidates another candidates which can be used
instead trap_s to avoid adding additional code to trap hand
> - return __phys_to_pfn(dma_addr);
> + dma_cache_wback_inv(page_to_phys(page), size);
> }
>
> /*
> @@ -155,3 +107,9 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base,
> u64 size,
> dev_info(dev, "use %sncoherent DMA ops\n",
>
NOP and BRANCH instructions
which forced to be aligned by 4 to guarantee that they don't
cross L1 cache line and can be update atomically.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 8 ++
arch/arc/include/asm/jump_label.h | 68
arch/arc/kernel/Makefile
On Tue, 2019-06-11 at 16:01 -0700, Vineet Gupta wrote:
> On 6/11/19 11:47 AM, Eugeniy Paltsev wrote:
> > Hi Vineet,
> >
> > On Mon, 2019-06-10 at 15:55 +, Vineet Gupta wrote:
> > > On 6/8/19 11:21 AM, Eugeniy Paltsev wrote:
> > > > Hi
Hi Vineet,
On Mon, 2019-06-10 at 15:55 +, Vineet Gupta wrote:
> On 6/8/19 11:21 AM, Eugeniy Paltsev wrote:
> > Hi Cupertino,
> >
> > I tried to use ".bundle_align_mode" directive in ARC assembly, but I got
> > following error:
> > -
Instead of using non-standard "encoder-slave" property to find
encoder let's find it by associated endpoint.
While I'm on it add corresponding log message if we don't find
any encoder and we assume that we use virtual LCD on the
simulation platform.
Signed-off-by: Eugeniy Paltsev
--
This commit adds support for the SST sst26wf016 and sst26wf032
flash memory IC.
Signed-off-by: Eugeniy Paltsev
---
drivers/mtd/spi-nor/spi-nor.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 73172d7f512b..224275461a2c
HSDK SoC has DW SPI controller. Enable it in preparation of
enabling on-board SPI peripherals.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/boot/dts/hsdk.dts | 14 ++
arch/arc/configs/hsdk_defconfig | 3 +++
2 files changed, 17 insertions(+)
diff --git a/arch/arc/boot/dts
copy memory bridge configuration
code from U-boot.
Acked-by: Alexey Brodkin
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Changes in comments and commit message. No functional change intended.
arch/arc/plat-hsdk/platform.c | 161 --
1 file changed,
HSDK SOC has CREG GPIO controller which can be used to control
SPI chip select lines.
Enable it in preparation of enabling SPI peripherals.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/boot/dts/hsdk.dts | 8
arch/arc/configs/hsdk_defconfig | 1 +
2 files changed, 9 insertions
HSDK board has built-in Vivante GPU IP which works perfectly fine
with Etnaviv driver, so let's use it.
Signed-off-by: Eugeniy Paltsev
---
Changes v2->v3:
* Rebase onto latest kernel. No functional change intended.
Changes v1->v2:
* Add clock inputs to etnaviv device tree node (re
Hi Jose,
Tested-by: Eugeniy Paltsev
On Mon, 2019-05-20 at 15:43 +0200, Jose Abreu wrote:
> Add the binding for RX/TX fifo size of GMAC node.
>
> Signed-off-by: Jose Abreu
> Cc: Joao Pinto
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: Vineet Gupta
> Cc: Eugeniy Palts
ost-significant bit
of the destination
register.
->8---
Am I missing something?
On Thu, 2019-05-16 at 17:37 +, Vineet Gupta wrote:
> On 5/16/19 10:24 AM, Eugeniy Paltsev wrote:
> > > +unsigned int write = 0, exec = 0, mask;
> >
> &g
RITE;
> + if (exec)
> + mask = VM_EXEC;
> +
> + if (!(vma->vm_flags & mask)) {
> + si_code = SEGV_ACCERR;
> goto bad_area;
> -
> - if (write) {
> - if (!(vma->vm_flags & VM_WRITE))
> -
an use @no_context label, removing the need for
@bad_area_nosemaphore and untangling the code mess a bit.
Cc: # 4.20+
Signed-off-by: Vineet Gupta
Signed-off-by: Eugeniy Paltsev
---
arch/arc/mm/fault.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arc/mm/fault.c b/ar
Hi Vineet,
ping.
On Wed, 2019-04-17 at 13:46 +0300, Eugeniy Paltsev wrote:
> Tweak generic node topology in case of CONFIG_HIGHMEM enabled to
> prioritize allocations from ZONE_HIGHMEM to avoid ZONE_NORMAL
> pressure.
>
> Here is example when we can see problems on ARC with curre
ts
> > @@ -187,6 +187,7 @@
> > interrupt-names = "macirq";
> > phy-mode = "rgmii";
> > snps,pbl = <32>;
> > + snps,multicast-filter-bins =
lowing memory lookup path:
(node 1, ZONE_HIGHMEM) ->
-> (node 1, ZONE_NORMAL) ->
-> (node 0, ZONE_HIGHMEM) ->
-> (node 0, ZONE_NORMAL)
In case of node configuration on ARC we obtain the degenerate case
of this path:
(node 1, ZONE_HIGHMEM) -> (node 0, ZONE_NORMAL)
o separate defines:
* L1_CACHE_BYTES >= real L1 I$/D$ line size.
Available at compile time. Used for alligning stuff.
* CACHEOPS_L1_LINE_SZ == real L1 I$/D$ line size.
Available at run time. Used in operations with cache lines/regions.
Signed-off-by: Eugeniy Paltsev
---
arc
any generic code, so it's easier to upstream it.
* autodetection can be disabled via kconfig.
* changes are rebased on latest kernel version.
Eugeniy Paltsev (3):
ARC: cache: declare cache-related defines via ARC_MAX_CACHE_SHIFT
ARC: cache: check cache configuration on each CPU
ARC: cache
* the rest of cache checks/setups which need to be done once
(like IOC / SLC / dma callbacks setup)
Both of these changes are prerequisites for autodetecting cache
line size in runtime.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/mm/cache.c | 66 +++--
1
for autodetecting cache line size in runtime.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/cache.h | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 2ad77fb43639..f1642634aab0 100644
In case of 'L1_CACHE_SHIFT != 6' we define dummy assembly macroses
PREALLOC_INSTR and PREFETCHW_INSTR without arguments. However
we pass arguments to them in code which cause build errors.
Fix that.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/memset-archs.S | 4 ++--
1 file changed, 2
But it isn't true - we also need to remap AXI apertures appropriately.
Otherwise kernel will crush somewhere. Moreover kernel will crush for different
reasons in case of launch
via U-boot and via MDB (because we remap AXI apertures in U-boot for internal
purposes).
If you really want to keep this - I can send you patch with AXI apertures
remapping we need to apply firstly.
Thanks.
> };
> };
--
Eugeniy Paltsev
___
linux-snps-arc mailing list
linux-snps-arc@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Tweak generic node topology in case of CONFIG_HIGHMEM enabled to
prioritize allocations from ZONE_HIGHMEM to avoid ZONE_NORMAL
pressure.
Signed-off-by: Eugeniy Paltsev
---
Tested on both NSIM and HSDK (require memory apertures remmaping and
device tree patching)
arch/arc/include/asm/Kbuild
On Mon, 2019-04-01 at 11:08 -0700, Vineet Gupta wrote:
> On 4/1/19 11:04 AM, Eugeniy Paltsev wrote:
> > > + if (IS_ENABLED(CONFIG_HIGHMEM) || is_pae40_enabled())
> >
> > As for today PAE40 couldn't be enabled without HIGHMEM for ARC, so probably
Commit 1fe20f1b8454 ("dmaengine: Introduce DW AXI DMAC driver")
added an incorrect file pattern. Fix it.
Reported-by: Joe Perches
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3e
GHMEM without PAE.
> - */
> - if (IS_ENABLED(CONFIG_HIGHMEM))
> - panic("IOC and HIGHMEM can't be used simultaneously");
> -
> /* Flush + invalidate + disable L1 dcache */
> __dc_disable();
>
--
Eugeniy Paltsev
___
linux-snps-arc mailing list
linux-snps-arc@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-snps-arc
Fix bad file pattern in MAINTAINERS section 'SYNOPSYS DESIGNWARE
AXI DMAC DRIVER'
Reported-by: Joe Perches
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3e5a5d263f29..30f5156336ed 100644
register as U-boot pass it from the beginning. So there is no
backward-compatibility issues.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 1 +
arch/arc/kernel/setup.c | 8
2 files changed, 9 insertions(+)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index
Signed-off-by: Eugeniy Paltsev
---
NOTE:
Even if this patch have no logical dependency with gpu-enabling-patch
(http://patchwork.ozlabs.org/patch/1034722/)
gpu-enabling-patch should be applied first to avoid rebasing.
arch/arc/boot/dts/hsdk.dts | 27 +++
arch
DW USB controller on HSDK hangs sometimes after SW reset, so
add reset handle to make possible to reset DW USB controller HW.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/boot/dts/hsdk.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts
= 1 (bootargs in r2); r1 = 0; r2 = 0;} to linux which is invalid.
While I'm at it refactor U-boot arguments handling code.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 4 +--
arch/arc/kernel/setup.c | 90 +++--
2 files changed, 66
config option and
enable uboot support unconditionally
* Skip invalid U-boot args instead of panic
* Check existing U-boot magic value
* Improve uboot_arg validating
* Minor code changes
Eugeniy Paltsev (2):
ARC: U-boot: check arguments paranoidly
ARC: enable uboot support unconditi
' to Metaware debugger.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig| 12
arch/arc/configs/nps_defconfig | 1 -
arch/arc/configs/vdk_hs38_defconfig | 1 -
arch/arc/configs/vdk_hs38_smp_defconfig | 2 --
arch/arc/kernel/head.S
On Tue, 2019-02-12 at 16:45 +, Vineet Gupta wrote:
> On 2/12/19 7:39 AM, Eugeniy Paltsev wrote:
> > Handle U-boot arguments paranoidly:
> > * don't allow to pass unknown tag.
> > * try to use external device tree blob only if corresponding tag
> >(TAG_DTB) is s
' to Metaware debugger.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig| 12
arch/arc/configs/nps_defconfig | 1 -
arch/arc/configs/vdk_hs38_defconfig | 1 -
arch/arc/configs/vdk_hs38_smp_defconfig | 2 --
arch/arc/kernel/head.S
eck existing U-boot magic value
* Improve uboot_arg validating
* Minor code changes
Eugeniy Paltsev (2):
ARC: U-boot: check arguments paranoidly
ARC: enable uboot support unconditionally
arch/arc/Kconfig| 12 -
arch/arc/configs/nps_defconfig | 1 -
arch/
-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 5 +--
arch/arc/kernel/setup.c | 92 +++--
2 files changed, 69 insertions(+), 28 deletions(-)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..fccea361e896 100644
Eugeniy Paltsev (2):
ARC: U-boot: check arguments paranoidly
ARC: U-boot: check magic number passed from u-boot
arch/arc/kernel/head.S | 7 ++--
arch/arc/kernel/setup.c | 91 +
2 files changed, 74 insertions(+), 24 deletions(-)
--
2.14.5
using.
Try to make it much less possible by check magic number and
'U-boot - kernel' ABI revision number passed from U-boot.
Ignore U-boot arguments if we got wrong magic number or unknown
ABI revision.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 5 -
arch/arc/kernel
-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 2 +-
arch/arc/kernel/setup.c | 65 -
2 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..7095055bb874 100644
# CONFIG_PID_NS is not set
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_BLK_DEV_RAM=y
> +CONFIG_ARC_UBOOT_SUPPORT=y
> CONFIG_EMBEDDED=y
> CONFIG_PERF_EVENTS=y
> # CONFIG_VM_EVENT_COUNTERS is not set
--
Eugeniy Paltsev
___
linux-snps-arc ma
HSDK board has built-in Vivante GPU IP which works perfectly fine
with Etnaviv driver, so let's use it.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Add clock inputs to etnaviv device tree node (reported by Lucas Stach)
arch/arc/boot/dts/hsdk.dts |
On Tue, 2019-01-29 at 21:44 +, Vineet Gupta wrote:
> On 1/29/19 2:49 AM, Eugeniy Paltsev wrote:
> > As of today we enable unaligned access unconditionally on ARCv2.
> > Lets move it under Kconfig option so we can disable it in case of
> > using HW conf
This now prints both HW feature status (exists, enabled / disabled)
and SW status (used / not used).
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/setup.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
Optimise code to use efficient unaligned memory access which is
available on ARCv2. This allows us to really simplify memcpy code
and speed up the code one and a half times (in case of unaligned
source or destination).
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/Makefile
As of today we enable unaligned access unconditionally on ARCv2.
Lets move it under Kconfig option so we can disable it in case of
using HW configuration which lacks of it.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 8
arch/arc/include/asm/irqflags
copy 16 or 32 bytes of data (depending on CONFIG_ARC_HAS_LL64)
in a main logical loop. so we call PREFETCH 4 times (or 2 times)
for each L1 cache line (in case of 64B L1 cache Line which is
default case). Obviously this is not optimal.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/memcpy
fig
* Print info about unaligned access status in kernel log
Eugeniy Paltsev (5):
ARCv2: lib: memcpy: fix doing prefetchw outside of buffer
ARCv2: introduce unaligned access under a Kconfig option
ARCv2: use unaligned access in SW
ARCv2: LIB: MEMCPY: fixed and optimised routine
ARC: boot
Select HAVE_EFFICIENT_UNALIGNED_ACCESS and allow GCC to generate
unaligned data if we enable enable unaligned access in HW.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 1 +
arch/arc/Makefile | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arc/Kconfig b/arch/arc
On Tue, 2019-01-29 at 09:28 -0800, Vineet Gupta wrote:
> On 1/29/19 9:26 AM, Eugeniy Paltsev wrote:
> > > I presume there is no specific reason to include this conditionally.
> > > irqflags.h already includes the right version.
> >
> > Agree.
> > I've
On Tue, 2019-01-29 at 09:21 -0800, Vineet Gupta wrote:
> On 1/16/19 3:29 AM, Eugeniy Paltsev wrote:
> > Even though we do enable AD bit in arc_init_IRQ() we need to do
> > it in early ASM code otherwise we may face unaligned data until
> > we reach arc_init_IRQ() because GCC
HSDK board has built-in Vivante GPU IP which works perfectly fine
with Etnaviv driver, so let's use it.
Signed-off-by: Eugeniy Paltsev
---
NOTE:
* this patch has prerequisite:
https://patchwork.kernel.org/patch/10766265/
arch/arc/boot/dts/hsdk.dts | 6 ++
arch/arc/configs
As of today we enable unaligned access unconditionally on ARCv2.
Lets move it under Kconfig option so we can disable it in case of
using HW configuration which lacks of it.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 8
arch/arc/include/asm/irqflags-arcv2
As of today we enable unaligned access unconditionally on ARCv2.
Lets move it under Kconfig option and use it actively in SW if it is
enabled.
While I'm at it fix and optimise ARCv2 memcpy implementaion.
Eugeniy Paltsev (5):
ARCv2: lib: memcpy: fix doing prefetchw outside of buffer
ARCv2
* This support is turned on in runtime
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 14 ++
arch/arc/kernel/intc-arcv2.c | 2 --
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..ffe3d384fca5
by avoiding the PREFETCHW. This leads to performance
degradation but it is OK as we'll introduce new memcpy implementation
optimized for unaligned memory access using.
We also cut off all PREFETCH instructions at they are quite useless
according to benchmark.
Signed-off-by: Eugeniy Paltsev
---
arch/arc
Optimise code to use efficient unaligned memory access which is
available on ARCv2. This allows us to really simplify memcpy code
and speed up the code one and a half times (in case of unaligned
source or destination).
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig
Select HAVE_EFFICIENT_UNALIGNED_ACCESS and allow GCC to generate
unaligned data if we enable enable unaligned access in HW.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 1 +
arch/arc/Makefile | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arc/Kconfig b/arch/arc
26/0x5c
really_probe+0x3b0/0x464
__driver_attach+0xd4/0xd8
bus_for_each_dev+0x3a/0x70
bus_add_driver+0x12a/0x18c
driver_register+0x56/0xe8
do_one_initcall+0x2e/0x118
kernel_init_freeable+0x102/0x194
>8---
Signed-off-by: Eugeniy Paltsev
---
Changes v3->v4:
* Re
* This support is turned on in runtime
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/head.S | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..d5b7a572365a 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
Select HAVE_EFFICIENT_UNALIGNED_ACCESS for ARCv2 as we unconditionally
enable unaligned access in HW.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 376366a7db81..20ba916c50a3 100644
--- a/arch
Hi Vineet,
On Tue, 2019-01-15 at 01:09 +, Vineet Gupta wrote:
> On 1/14/19 7:17 AM, Eugeniy Paltsev wrote:
> > Current ARCv2 memeset implementation may call 'prefetchw'
> > instruction for address which lies outside of memset area.
> > So we got one modified (dirt
ARC HSDK SoC has Vivante GPU IP so allow build etnaviv for ARC.
Signed-off-by: Eugeniy Paltsev
---
drivers/gpu/drm/etnaviv/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig
index 342591a1084e
for other possible L1 data cache line lengths (32B and 128B).
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/memset-archs.S | 30 +++---
1 file changed, 23 insertions(+), 7 deletions(-)
diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S
index
Move store 32 byte instruction series to macros to make code
more readable.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/lib/memset-archs.S | 63 +++--
1 file changed, 21 insertions(+), 42 deletions(-)
diff --git a/arch/arc/lib/memset-archs.S b/arch/arc
Add information about ActionPointis number and supported set
of targets (minimum / full).
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/arcregs.h | 8 +++
arch/arc/kernel/setup.c| 53 ++
2 files changed, 56 insertions(+), 5
On Thu, 2018-12-20 at 15:34 +0100, h...@lst.de wrote:
> On Thu, Dec 20, 2018 at 02:32:52PM +0000, Eugeniy Paltsev wrote:
> > Hi Christoph,
> >
> > I test kernel from your 'dma-alloc-always-zero' branch, and as
> > I can see we have DMA peripherals (like USB) bro
6_X_6JkXFx7AXWqB0tg=ZlJN
> 1MriPUTkBKCrPSx67GmaplEUGcAEk9yPtCLdUXI=naBCT96A4RSQJLzBWzuCcmptFGiQDfFTOWJpprqDIVk=cHF84va89ofP6VlrV683ewENUXdaLW7opamLZSkZBgk=
--
Eugeniy Paltsev
___
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; if (user_mode(regs))
> - show_faulting_vma(regs->ret, buf); /* faulting code, not data */
> + show_faulting_vma(regs->ret); /* faulting code, not data */
>
> pr_info("[STAT32]: 0x%08lx", regs->status32);
>
> @@ -221,8 +219,6 @@ void
ARCv1 and ARCv2.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/perf_event.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arc/include/asm/perf_event.h
b/arch/arc/include/asm/perf_event.h
index 9185541035cc..6958545390f0 100644
--- a/arch/arc/include/asm
stale data leaks. We already do
> this on most common architectures, but some architectures don't do this
> yet, fix them up, either by passing GFP_ZERO when we use the normal page
> allocator or doing a manual memset otherwise.
>
> Signed-off-by: Christoph Hellwig
>
Hi Vineet,
On Thu, 2018-12-13 at 18:23 +, Vineet Gupta wrote:
> On 12/13/18 7:43 AM, Eugeniy Paltsev wrote:
> > Change __ffs return value from 'int' to 'unsigned long' as it
> > is done in other implementations (like asm-generic, x86, etc...)
> > to avoid build-time war
No, not gonna die tonight.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/perf_event.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index 0c4714906a06..b0f7eeffde9f 100644
--- a/arch/arc/kernel
ent]
arc_pmu/bfbmp/[Kernel PMU event]
arc_pmu/bfirqex/ [Kernel PMU event]
arc_pmu/bflgstal/ [Kernel PMU event]
arc_pmu/bflush/ [Kernel PMU event]
-->8--
Signed-off-by: Eugeniy P
Introduce Kernel PMU events support and refactor ARC-specific perf code.
Eugeniy Paltsev (4):
ARC: perf: trivial code cleanup
ARC: perf: introduce Kernel PMU events support
ARC: perf: move HW events mapping to separate function
ARC: perf: avoid kernel killing where it is possible
arch
'arc_pmu_match' structure
declaration is useless as we refer to 'arc_pmu_match' in
several places which aren't guarded with ifdef. Nevertheless
'ARC' option selects 'OF' unconditionally so we can simply
get rid of this ifdef.
Acked-by: Vineet Gupta
Signed-off-by: Eugeniy Paltsev
---
Changes v1
-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/bitops.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h
index 8da87feec59a..99e6d8948f4a 100644
--- a/arch/arc/include/asm/bitops.h
+++ b/arch/arc/include/asm
On Wed, 2018-12-05 at 17:13 +, Vineet Gupta wrote:
> On 12/5/18 9:06 AM, Eugeniy Paltsev wrote:
> > Fix description comment as this code doesn't belong only to
> > ARC700 anymore.
> >
> > Also while I'm at it, use SPDX License Identifier.
> >
> > Sig
Use u32, u64, s64 instead of uint32_t, uint64_t, int64_t
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/perf_event.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c
index 97b88b00c418
Use BIT(), lower_32_bits(), upper_32_bits() macroses,
fix code style violations.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/perf_event.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel
ifdef around 'arc_pmu_match' structure declaration is useless
as we refer to 'arc_pmu_match' in several places which aren't
guarded with ifdef.
Nevertheless 'ARC' option selects 'OF' unconditionally so we
can simply get rid of this ifdef.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel
ent]
arc_pmu/bfbmp/[Kernel PMU event]
arc_pmu/bfirqex/ [Kernel PMU event]
arc_pmu/bflgstal/ [Kernel PMU event]
arc_pmu/bflush/ [Kernel PMU event]
-->8--
Signed-off-by: Eugeniy P
Fix description comment as this code doesn't belong only to
ARC700 anymore.
Also while I'm at it, use SPDX License Identifier.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/perf_event.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arc
Introduce Kernel PMU events support and refactor ARC-specific perf code.
Eugeniy Paltsev (5):
ARC: perf: trivial code cleanup
ARC: perf: introduce Kernel PMU events support
ARC: perf: fix of kernel data types using
ARC: perf: fix description comment
ARC: perf: remove useless ifdefs
Introduce basic 'perf annotate' support for ARC to be able
to use anotation via stdio interface.
Signed-off-by: Eugeniy Paltsev
---
tools/perf/arch/arc/annotate/instructions.c | 9 +
tools/perf/arch/common.c| 11 ++-
tools/perf/util/annotate.c
So I guess we should
map 'br_immed_retired' instead of
"pc_write_retired" into generic 'branches'
event on ARM.
--
Eugeniy Paltsev
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ch before 4.20-rc1 is out.
>
> Tudor, Marek, can I have a Reviewed-by/Acked-by on this patchset?
>
> Thanks,
>
> Boris
>
> >
> > On Mon, 2018-09-10 at 14:46 +0300, Eugeniy Paltsev wrote:
> > > Add support for the SST sst26wf016 and sst26wf032 fla
In preparation for introduncing SmaRT support for ARC split
show_faulting_vma() for logic and representation parts to be
able to use logic part in SmaRT code.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/bug.h | 9 +
arch/arc/kernel/troubleshoot.c | 43
Add information about SmaRT entries number and SmaRT SW support.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/kernel/setup.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index c5641e6ffc2a..20fe3fcf8306
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