ith lore
Randy Dunlap (1):
ARC: thread_info.h: correct two typos in a comment
Vineet Gupta (1):
ARC: perf: fix misleading comment about pmu vs counter stop
Yihao Han (1):
arc: use swap() to make code cleaner
arch/arc/include/asm/irqflags-compact.h | 8 +-
arch/arc/inc
On 11/9/21 9:56 PM, cgel@gmail.com wrote:
From: Ye Guojin
This was found by coccicheck:
./arch/arc/kernel/unwind.c, 251, 22-23, WARNING opportunity for swap()
./arch/arc/kernel/unwind.c, 254, 18-19, WARNING opportunity for swap()
Addtionally, adjust the sequence of header files to be arran
On 11/9/21 7:07 PM, Yihao Han wrote:
Use the macro 'swap()' defined in 'include/linux/minmax.h' to avoid
opencoding it.
Signed-off-by: Yihao Han
Added to ARC tree.
Thx,
-Vineet
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http
egular build".
Signed-off-by: Alexey Brodkin
Cc: Stephen Rothwell
Cc: Mischa Jonker
Cc: Vineet Gupta
Added to ARC tree.
Thx,
-Vineet
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On 11/26/21 2:23 PM, Colin Ian King wrote:
The variable idx is being initialized with a value that is never
read, it is being updated later on. The assignment is redundant and
can be removed.
Signed-off-by: Colin Ian King
Sorry for the delay in getting to this. Added to ARC tree now.
Thx,
-Vi
On 10/26/21 3:03 AM, Arnd Bergmann wrote:
From: Arnd Bergmann
Now that all architectures have a working futex implementation
in any configuration, remove the runtime detection code.
Signed-off-by: Arnd Bergmann
---
arch/arc/Kconfig | 1 -
Acked-by: Vineet Gupta #arch/arc
On 10/29/21 5:31 PM, Randy Dunlap wrote:
Fix typos of "separately" and "remains".
Signed-off-by: Randy Dunlap
Suggested-by: Matthew Wilcox # "remains"
Cc: Vineet Gupta
Cc: linux-snps-arc@lists.infradead.org
Thx for the fi
ARC
----
Vineet Gupta (1):
ARC: fix potential build snafu
arch/arc/include/asm/pgtable.h | 5 -
1 file changed, 5 deletions(-)
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h
0) /* Interrupt when Count
reaches limit */
Fixes: b26c2e3823ba ("ARC: breakout timer include code into separate header")
Signed-off-by: Randy Dunlap
Cc: Vineet Gupta
Cc: linux-snps-arc@lists.infradead.org
Cc: Daniel Lezcano
Cc: Thomas Gleixner
Cc: Shahab Vahedi
Acked-by: Vineet Gupta
pellings using codespell tool
Randy Dunlap (1):
ARC: export clear_user_page() for modules
Vineet Gupta (31):
ARC: atomics: disintegrate header
ARC: atomic: !LLSC: remove hack in atomic_set() for for UP
ARC: atomic: !LLSC: use int data type consistently
ARC: atomic64: LLS
On 8/26/21 1:35 AM, kernel test robot wrote:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git for-next
head: c80ef1151c91db05e9ed03d7b61ada7af63ce59a
commit: 4058fa6bf4da7f46a57cb33fe8f6b688052b3eb9 [29/33] ARC: mm: switch
pgtable_t back to struct page *
config: arc-allye
es it is a function and needs to be exported.
PowerPC exported it in 2004. It looks like nds32 and nios2
still need to have it exported.
Fixes: 4102b53392d63 ("ARC: [mm] Aliasing VIPT dcache support 2/4")
Signed-off-by: Randy Dunlap
Reported-by: kernel test robot
Cc: Guenter Roeck
Cc: Vin
On 8/15/21 2:26 AM, Mike Rapoport wrote:
On Thu, Aug 12, 2021 at 04:37:34PM -0700, Vineet Gupta wrote:
Hi,
Big pile of ARC mm changes to prepare for 3 or 4 levels of paging (from
current 2) needed for new hardware page walked MMUv6 (in aRCv3 ISA based
cores).
Most of these changes are
On 8/15/21 2:27 AM, Mike Rapoport wrote:
On Thu, Aug 12, 2021 at 04:37:50PM -0700, Vineet Gupta wrote:
ARCv2 MMU is software walked and Linux implements 2 levels of paging: pgd/pte.
Forthcoming hw will have multiple levels, so this change preps mm code
for same. It is also fun to try multi
On 8/15/21 2:27 AM, Mike Rapoport wrote:
Heh,
"Don't pollute mmu.h and cache.h with some of ARC internal bootlog/setup
related functions.
move them aside to setup.h"
is still not there :)
Oops my bad, indeed missed out on that one. Fixed now.
Thx,
-Vineet
__
On 8/15/21 2:27 AM, Mike Rapoport wrote:
On Thu, Aug 12, 2021 at 04:37:35PM -0700, Vineet Gupta wrote:
MMU SCRATCH_DATA0 register is intended to cache task pgd. However in
ARC700 SMP port, it has to be repurposed for reentrant interrupt
handling, while UP port doesn't. We currently ahandl
On 8/13/21 2:25 AM, Gavin Shan wrote:
Hi Anshuman and Vineet,
On 8/12/21 9:11 PM, Anshuman Khandual wrote:
On 8/9/21 2:56 PM, Gavin Shan wrote:
There are couple of issues with current implementations and this series
tries to resolve the issues:
(a) All needed information are scattered in v
drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:https://github.com/0day-ci/linux/commits/Vineet-Gupta/ARC-mm-updates-support-3-4-levels-and-asm-generic-pgalloc/20210813-074023
base:https://git.kernel.o
when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Vineet-Gupta/ARC-mm-updates-support-3-4-levels-and-asm-generic-pgalloc/20210813-074023
base: https://git.kernel.org/pub/scm/li
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 11 +++
arch/arc/include/asm/pgalloc.h| 11 +++
arch/arc/include/asm/pgtable-levels.h | 45 ---
arch/arc/mm/fault.c | 2 ++
arch/arc/mm/init.c
- pgtable-bits-arcv2.h (MMU specific page table flags)
- pgtable-levels.h (paging levels)
No functional changes, but paves way for easy addition of new MMU code
with different bits and levels etc
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable-bits-arcv2.h | 149
non functional change
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mmu-arcv2.h | 103 +++
arch/arc/include/asm/mmu.h | 80 +---
arch/arc/include/asm/pgtable.h | 6 --
3 files changed, 105 insertions(+), 84 deletions(-)
create
... to avoid polluting shared entry code (across three ISA variants)
with ISA/MMU specific code.
Cc: Jose Abreu
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mmu.h| 8
arch/arc/kernel/entry-arcv2.S | 1 +
arch/arc/kernel/entry.S | 7 ++-
3 files changed, 11
/pgtable-* headers to expose the defines for __ASSEMBLY__ too
Signed-off-by: Vineet Gupta
---
arch/arc/mm/tlbex.S | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 0b4bb62fa0ab..c4a5f16444ce 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm
s are currently used.
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgalloc.h| 8
arch/arc/include/asm/pgtable-bits-arcv2.h | 2 ++
arch/arc/include/asm/pgtable-levels.h | 6 +++---
arch/arc/mm/tlbex.S | 4 +++-
4 files changed, 12 insertions(
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/cache.h | 4
arch/arc/include/asm/mmu.h | 4
arch/arc/include/asm/setup.h | 12 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
index 514b8b70df50..28ed82b1800f 100644
--- a/arch/arc/include/asm/page.h
internally pertains to pgd now.
4b. define pud_populate() to just setup pgd
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 4 ++
arch/arc/include/asm/page.h | 11 +
arch/arc/include/asm/pgalloc.h| 11 +
arch/arc/include/asm/pgtable-levels.h
So far ARC pgtable_t has not been struct page based to avoid extra
page_address() calls involved. However the differences are down to
noise and get in the way of using generic code, hence this patch.
Suggested-by: Mike Rapoport
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h
Signed-off-by: Vineet Gupta
---
arch/arc/mm/fault.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c
index f8994164fa36..5787c261c9a4 100644
--- a/arch/arc/mm/fault.c
+++ b/arch/arc/mm/fault.c
@@ -36,31 +36,31 @@ no
and remove the one off uncached definition for ARC
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable.h | 3 ---
arch/arc/mm/ioremap.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index
Signed-off-by: Vineet Gupta
---
arch/arc/mm/tlb.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 6079dfd129b9..15cbc285b0de 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -71,7 +71,7 @@ static void
And while at it, rewrite commentary on ASID allocator
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mmu.h | 13 +
arch/arc/include/asm/mmu_context.h | 28 +---
arch/arc/mm/tlb.c | 11 ---
3 files changed, 30 insertions
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgalloc.h | 14 ++
arch/arc/include/asm/pgtable.h | 6 --
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arc/include/asm/pgalloc.h b/arch/arc/include/asm/pgalloc.h
index a32ca3104ced..408bc4b0842d 100644
abled in entry code
[Jose Abreu]
[1] http://lists.infradead.org/pipermail/linux-snps-arc/2021-August/005326.html
Vineet Gupta (19):
ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only
ARC: mm: remove tlb paranoid code
ARC: mm: move mmu/
With previous patch ARC pgalloc functions are same as generic, hence
switch to that.
Suggested-by: Mike Rapoport
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgalloc.h | 42 +-
1 file changed, 1 insertion(+), 41 deletions(-)
diff --git a/arch/arc
is up: for ARC700 don't use to cache pgd (even in UP) and do
the opposite for ARCv2.
And while here, switch to canonical pgd_offset().
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/entry-compact.h | 8
arch/arc/include/asm/mmu.h | 4
arch/arc/include/asm/mmu
assed through memory. That however seems like a small
cost compared to maintenance burden given the impending new mmu support
for page walk etc
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 26 --
arch/arc/mm/ioremap.c | 2 +-
2 files changed, 1 inse
This was used back in arc700 days when ASID allocator was fragile.
Not needed in last 5 years
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 3 ---
arch/arc/include/asm/mmu.h | 6 -
arch/arc/mm/tlb.c | 40 --
arch/arc/mm/tlbex.S
On 8/11/21 11:18 PM, Mike Rapoport wrote:
On Wed, Aug 11, 2021 at 06:37:19PM -0700, Vineet Gupta wrote:
On 8/11/21 5:31 AM, Mike Rapoport wrote:
+/*
+ * For ARC, pgtable_t is not struct page *, but pte_t * (to avoid
+ * extraneous page_address() calculations) hence can't use
+ * us
On 8/12/21 5:36 AM, Kefeng Wang wrote:
There are some empty trap_init() in different ARCHs, introduce
a new weak trap_init() function to cleanup them.
Cc: Vineet Gupta
Cc: Russell King
Cc: Yoshinori Sato
Cc: Ley Foon Tan
Cc: Jonas Bonn
Cc: Stefan Kristiansson
Cc: Stafford Horne
Cc: James E.J
On 8/11/21 5:31 AM, Mike Rapoport wrote:
+/*
+ * For ARC, pgtable_t is not struct page *, but pte_t * (to avoid
+ * extraneous page_address() calculations) hence can't use
+ * use asm-generic/pgalloc.h which assumes it being struct page *
+ */
Another reason to leave ARC without asm-generic/pgal
On 8/11/21 5:28 AM, Mike Rapoport wrote:
On Tue, Aug 10, 2021 at 05:42:56PM -0700, Vineet Gupta wrote:
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 11 +++
arch/arc/include/asm/pgalloc.h| 22 +
arch/arc/include/asm/pgtable-levels.h | 45
On 8/11/21 5:24 AM, Mike Rapoport wrote:
On Tue, Aug 10, 2021 at 05:42:55PM -0700, Vineet Gupta wrote:
ARCv2 MMU is software walked and Linux implements 2 levels of paging: pgd/pte.
Forthcoming hw will have multiple levels, so this change preps mm code
for same. It is also fun to try multi
On 8/11/21 5:15 AM, Mike Rapoport wrote:
I believe a few words here would be useful even for the future version of
yourself ;-)
"Don't pollute common entry file with MMU versions specific bits (as new
MMU doesn't have PID register)"
However Jose thankfully pointed me (off list) that this pat
On 8/11/21 5:04 AM, Mike Rapoport wrote:
On Tue, Aug 10, 2021 at 05:42:46PM -0700, Vineet Gupta wrote:
In the past I've refrained from doing this (atleast 2 times) due to the
^ at least
slight code bloat due to ABI implications of pte_
On 8/10/21 10:18 PM, Mike Rapoport wrote:
- return ioremap_prot(paddr, size, pgprot_val(PAGE_KERNEL_NO_CACHE));
+ return ioremap_prot(paddr, size,
+ pgprot_val(pgprot_noncached(PAGE_KERNEL)));
But this becomes _PAGE_CACHEABLE now. What did I miss?
We now u
On 8/10/21 10:12 PM, Mike Rapoport wrote:
On Tue, Aug 10, 2021 at 05:42:44PM -0700, Vineet Gupta wrote:
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable.h | 23 ---
arch/arc/mm/fault.c| 2 +-
2 files changed, 1 insertion(+), 24 deletions
Hi Mike,
On 8/10/21 10:10 PM, Mike Rapoport wrote:
Hi Vineet,
On Tue, Aug 10, 2021 at 05:42:43PM -0700, Vineet Gupta wrote:
Signed-off-by: Vineet Gupta
Hmm, this one seems odd. Try https://www.kernel.com/ ;-)
Oops, last minute switch to my kernel.org address - this update was not
atomic
s are currently used.
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgalloc.h| 6 +++---
arch/arc/include/asm/pgtable-bits-arcv2.h | 2 ++
arch/arc/include/asm/pgtable-levels.h | 6 +++---
arch/arc/mm/tlbex.S | 4 +++-
4 files changed, 11 insertions(
internally pertains to pgd now.
4b. define pud_populate() to just setup pgd
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 4 ++
arch/arc/include/asm/page.h | 11 +
arch/arc/include/asm/pgalloc.h| 22 ++
arch/arc/include/asm/pgtable-levels.h
Signed-off-by: Vineet Gupta
---
arch/arc/mm/fault.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c
index f8994164fa36..5787c261c9a4 100644
--- a/arch/arc/mm/fault.c
+++ b/arch/arc/mm/fault.c
@@ -36,31 +36,31 @@ no
/pgtable-* headers to expose the defines for __ASSEMBLY__ too
Signed-off-by: Vineet Gupta
---
arch/arc/mm/tlbex.S | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 6b5872197005..d08bd09a0afc 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/entry.S | 6 --
arch/arc/mm/tlb.c | 3 +++
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 2cb8dfe866b6..684efd094520 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 11 +++
arch/arc/include/asm/pgalloc.h| 22 +
arch/arc/include/asm/pgtable-levels.h | 45 ---
arch/arc/mm/fault.c | 2 ++
arch/arc/mm/tlbex.S
Signed-off-by: Vineet Gupta
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/cache.h | 4
arch/arc/include/asm/mmu.h | 4
arch/arc/include/asm/setup.h | 12 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arc/include/asm/cache.h b/arch/arc
- pgtable-bits-arcv2.h (MMU specific page table flags)
- pgtable-levels.h (paging levels)
No functional changes, but paves way for easy addition of new MMU code
with different bits and levels etc
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable-bits-arcv2.h | 149
assed through memory. That however seems like a small
cost compared to maintenance burden given the impending new mmu support
for page walk etc
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h | 26 --
arch/arc/mm/ioremap.c | 2 +-
2 files changed, 1 inse
and remove the one off uncached definition for ARC
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable.h | 3 ---
arch/arc/mm/ioremap.c | 3 ++-
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index
And while at it, rewrite commentary on ASID allocator
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mmu.h | 13 +
arch/arc/include/asm/mmu_context.h | 28 +---
arch/arc/mm/tlb.c | 11 ---
3 files changed, 30 insertions
non functional change
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/mmu-arcv2.h | 94 ++
arch/arc/include/asm/mmu.h | 72 +--
arch/arc/include/asm/mmu_context.h | 1 +
arch/arc/include/asm/pgtable.h | 6 --
arch/arc/mm
Signed-off-by: Vineet Gupta
---
arch/arc/mm/tlb.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 6079dfd129b9..15cbc285b0de 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -71,7 +71,7 @@ static void
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgtable.h | 23 ---
arch/arc/mm/fault.c| 2 +-
2 files changed, 1 insertion(+), 24 deletions(-)
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h
index 0c3e220bd2b4..80b57c14b430
port)
and worth a critical eye.
CC'ing some of you guys dealing with page tables for a while :-)
to spot any obvious gotchas.
Thx,
-Vineet
Vineet Gupta (18):
ARC: mm: simplify mmu scratch register assingment to mmu needs
ARC: mm: remove tlb paranoid code
ARC: mm: move mmu/cache extern
This was used way back when in arc700 debugging when ASID allocator was
still bit flaky. Not needed in last 5 years
Signed-off-by: Vineet Gupta
Signed-off-by: Vineet Gupta
---
arch/arc/Kconfig | 3 ---
arch/arc/include/asm/mmu.h | 6 -
arch/arc/mm/tlb.c | 40
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/page.h| 30 --
arch/arc/include/asm/pgalloc.h | 7 ++-
2 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
index c4ac827379cd
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/pgalloc.h | 21 ++---
arch/arc/include/asm/pgtable.h | 6 --
2 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/arch/arc/include/asm/pgalloc.h b/arch/arc/include/asm/pgalloc.h
index a32ca3104ced..356237b9c537
and just use it as intended for ARCv2 only.
For ARC700 just don't use it for mmu needs (even for UP which it
potentially can (degrades it slightly) but that config it not a
big deal in this day and age.
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/entry-compact.h | 8
arc
d int to bare use of unsigned
Vineet Gupta (2):
ARC: fp: set FPU_STATUS.FWE to enable FPU_STATUS update on
context switch
MAINTAINERS: update Vineet's email address
MAINTAINERS | 2 +-
arch/arc/Kconfig | 2 +-
arch/arc/include/asm/chec
;
> | ^
>>> arch/arc/include/asm/hugepage.h:29:36: error: incompatible type for
>>> argument 1 of 'pte_pmd'
>29 | #define pmd_mkinvalid(pmd) pte_pmd(pte_mknotpresent(pmd_pte(pmd)))
&
On 8/6/21 6:42 AM, Will Deacon wrote:
> On Thu, Aug 05, 2021 at 12:14:08PM -0700, Vineet Gupta wrote:
>> signed math causes generation of costlier instructions such as DIV when
>> they could be done by barrerl shifter.
>>
>> Worse part is this is not caught by thin
:
919b4614: lsr r2,r0,0x5 @nr/32
^^^
919b4618: add2r2,0x920f6050,r2
919b4620: ld_sr2,[r2,0]
919b4622: lsr r0,r2,r0 #test_bit()
919b4626: j_s.d [blink]
919b4628: bmsk_s r0,r0,0
919b462a: nop_s
Signed-off-by: Vineet Gupta
On 8/5/21 2:02 AM, Peter Zijlstra wrote:
> On Wed, Aug 04, 2021 at 12:15:43PM -0700, Vineet Gupta wrote:
>
>> Vineet Gupta (10):
>>ARC: atomics: disintegrate header
>>ARC: atomic: !LLSC: remove hack in atomic_set() for for UP
>>ARC: atomic: !LLSC:
kicks-ass.net
[2] https://lore.kernel.org/r/20180830135749.ga13...@arm.com
Vineet Gupta (10):
ARC: atomics: disintegrate header
ARC: atomic: !LLSC: remove hack in atomic_set() for for UP
ARC: atomic: !LLSC: use int data type consistently
ARC: atomic64: LLSC: elide unused atomic_{and,or,xor,a
This is a non-functional change since those wrappers are not
used in kernel sources at all.
Link:
http://lists.infradead.org/pipermail/linux-snps-arc/2018-August/004246.html
Suggested-by: Peter Zijlstra (Intel)
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/atomic64-arcv2.h | 6
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/atomic-spinlock.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arc/include/asm/atomic-spinlock.h
b/arch/arc/include/asm/atomic-spinlock.h
index 8c6fd0e651e5..2c830347bfb4 100644
--- a/arch/arc/include/asm
radix_ptr_alloc 674 646 -28
Total: Before=6187409, After=6187477, chg +0.00%
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/cmpxchg.h | 209 ++---
1 file changed, 117 insertions(+), 92 deletions(-)
diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/bitops.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h
index 4f35130f5ba3..a7daaf64ae34 100644
--- a/arch/arc/include/asm/bitops.h
+++ b/arch/arc/include
Non functional change, to ease future addition/removal
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/atomic-llsc.h | 103 ++
arch/arc/include/asm/atomic-spinlock.h | 111 +++
arch/arc/include/asm/atomic.h | 429 +
arch/arc/include/asm/atomic64
It only makes sense to do this for the LLSC config
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/cmpxchg.h | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index 00deb076d6f6..e2ae0eb1ca07
It gets in the way of cleaning things up and is a maintenance
pain-in-neck !
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/cmpxchg.h | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index
ed on Will's poc, analysed codegen diffs]
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/bitops.h | 184 +-
arch/arc/include/asm/smp.h| 14 ---
arch/arc/kernel/smp.c | 2 -
3 files changed, 2 insertions(+), 198 deletions(-)
diff --git a/arch/a
And move them out of cmpxchg.h to canonical atomic.h
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/atomic.h | 27 +++
arch/arc/include/asm/cmpxchg.h | 23 ---
2 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/arch/arc/include
hassle of special case code.
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/atomic-spinlock.h | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/arch/arc/include/asm/atomic-spinlock.h
b/arch/arc/include/asm/atomic-spinlock.h
index bdf87610b2d7..8c6fd0e65
-by: Vineet Gupta
---
arch/arc/include/asm/atomic-llsc.h| 32 +++
arch/arc/include/asm/atomic64-arcv2.h | 24 +++-
2 files changed, 26 insertions(+), 30 deletions(-)
diff --git a/arch/arc/include/asm/atomic-llsc.h
b/arch/arc/include/asm/atomic-llsc.h
Hi Joseph, Adhemerval, Florian
On 7/22/21 6:58 AM, Vladimir Isaev via Libc-alpha wrote:
> On Jul 22 2021, Andreas Schwab wrote:
>>
>> On Jul 22 2021, Vladimir Isaev via Libc-alpha wrote:
>>
>>> diff --git a/elf/dl-runtime.c b/elf/dl-runtime.c
>>> index 9d0d941000..6099a44ffb 100644
>>> --- a/elf/d
On 7/30/21 10:22 PM, Masahiro Yamada wrote:
> Make architectures select TRACE_IRQFLAGS_SUPPORT instead of
> having many defines.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/arc/Kconfig | 4 +---
> [snip..]
Acked-by: V
)
> differ from the generic code.
>
> Signed-off-by: Arnd Bergmann
LGTM. Thx for doing this Arnd !
Acked-by: Vineet Gupta
-Vineet
> ---
> arch/arc/Kconfig | 2 +
> arch/arc/include/asm/uaccess.h | 83 ++
> arch/arc/mm
On 7/20/21 1:58 PM, Vineet Gupta via Libc-alpha wrote:
> Signed-off-by: Vineet Gupta
Committed !
> ---
> sysdeps/arc/dl-machine.h | 23 ++-
> 1 file changed, 10 insertions(+), 13 deletions(-)
>
> diff --git a/sysdeps/arc/dl-machine.h b/sysdeps/arc/dl
On 7/20/21 1:57 PM, Vineet Gupta via Libc-alpha wrote:
> Any FPU_STATUS write needs setting the FWE bit (31) whcih just provides
> a "control signal" to enable explicit write (vs. the side-effect of FPU
> instructions). However this bit is RAZ and write-only, thus effectivel
ned-off-by: Vineet Gupta
---
sysdeps/arc/fpu_control.h | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/sysdeps/arc/fpu_control.h b/sysdeps/arc/fpu_control.h
index c7d101e7838f..ae4348321c16 100644
--- a/sysdeps/arc/fpu_control.h
+++ b/sysdeps/arc/fpu_control.h
@@ -81
Hi,
A couple of updates for ARC.
Thx,
-Vineet
Vineet Gupta (2):
ARC: fp: (micro)optimize FPU_STATUS read by eliding FWE bit clearing
ARC: elf: make type safe
sysdeps/arc/dl-machine.h | 23 ++-
sysdeps/arc/fpu_control.h | 15 +++
2 files changed, 17
Signed-off-by: Vineet Gupta
---
sysdeps/arc/dl-machine.h | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/sysdeps/arc/dl-machine.h b/sysdeps/arc/dl-machine.h
index 60b49af0d5ca..e6ce7f0ff6d9 100644
--- a/sysdeps/arc/dl-machine.h
+++ b/sysdeps/arc/dl
ot;TIMER_CTRL_IE" redefined
> 25 | #define TIMER_CTRL_IE (1 << 5) /* VR */
> ../include/soc/arc/timers.h:20: note: this is the location of the previous
> definition
> 20 | #define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count
> reaches l
m and also in a thread.
Fixes: https://github.com/foss-for-synopsys-dwc-arc-processors/linux/issues/54
Fixes: f45ba2bd6da0dc ("ARCv2: fpu: preserve userspace fpu state")
Cc: sta...@vger.kernel.org #5.6+
Signed-off-by: Vineet Gupta
---
arch/arc/kernel/fpu.c | 9 ++---
1 fi
On 6/25/21 10:58 PM, Jinchao Wang wrote:
> Fix checkpatch warnings:
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
>
> Signed-off-by: Jinchao Wang
Thx for the fix. Added to for-curr
-Vineet
___
linux-snps-arc mailing list
linux-snps-ar
On 7/10/21 7:50 AM, Guenter Roeck wrote:
> Enabling CONFIG_STACKDEPOT results in the following build error.
>
> arc-elf-ld: lib/stackdepot.o: in function `filter_irq_stacks':
> stackdepot.c:(.text+0x456): undefined reference to `__irqentry_text_start'
> arc-elf-ld: stackdepot.c:(.text+0x456): undef
On 7/4/21 2:28 AM, Colin King wrote:
> From: Colin Ian King
>
> There is a spelling mistake and incorrect grammar in the Kconfig
> text. Fix them.
>
> Signed-off-by: Colin Ian King
Thx for the fix. Added to for-curr
-Vineet
___
linux-snps-arc mailing
On 6/28/21 3:13 PM, Peter Zijlstra wrote:
> On Mon, Jun 28, 2021 at 02:22:15PM -0700, Randy Dunlap wrote:
>> However, something in arch/arc/ did look suspicious so I decided to
>> try an ARC allmodconfig build, where I did see a few errors FYI:
>>
>>
>>CC drivers/iommu/io-pgtable-arm.o
>>
On 6/3/21 9:01 PM, Vineet Gupta wrote:
> This is the 32-bit variant of ARCv3 ISA (which is not compatible with the
> 32-bit ARCv2 ISA)
>
> | make check
> | cd testsuite && bash config-guess.sh && rm uname
> | PASS: config.guess checks (136 tests)
> | cd tes
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