Re: [RFC 0/6] glibc port to ARC architecture

On 06/27/2017 05:00 AM, Joseph Myers wrote: On Tue, 27 Jun 2017, Florian Weimer wrote: On 06/27/2017 10:00 AM, Vineet Gupta wrote: This is a Request for comments for glibc port to ARC architecture. http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx The Linux kernel

Re: [PATCH] frv: fix build failure

+CC linux-arch, Arnd On 11/23/2017 09:17 AM, Alexey Brodkin wrote: Hi Sudip, On Tue, 2017-11-21 at 22:10 +, Sudip Mukherjee wrote: The frv defconfig build is failing with the error: lib/mpi/mpih-div.o: In function `mpihelp_divrem': mpih-div.c:(.text+0x30c): undefined reference to `abort'

[GIT PULL] ARC updates for 4.15-rc1

ew micro-arch gizmos - axs10x platform wiring up reset driver merged in this cycle - ARC perf driver optimizations Eugeniy Paltsev (1): ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset Vineet Gupta (

Re: glibc: nptl/tst-cancel17 and librt issue

On 11/21/2017 02:33 PM, Andreas Schwab wrote: On Nov 21 2017, Vineet Gupta <vineet.gup...@synopsys.com> wrote: the link cmd for build/nptl/librt.so. There is no librt.so in nptl. Right, but when you do a make check in build tree, it does try to build one, rather than reference

Re: [PATCH 4/4] ARCv2: entry: Reduce perf intr return path

On 11/17/2017 03:42 PM, Vineet Gupta wrote: What do you (on ARC) do about irq_work ? So the reason I'm asking is that some architectures that don't have NMIs call irq_work_run() at the very end of their perf-interrupt handler (ARM does this for instance). But on ARC, we don't call

Re: [PATCH 0/4] ARC perf updates

On 11/07/2017 02:13 PM, Vineet Gupta wrote: Hi, Found these when cleaning up some old branches. The only controversial one could be the last one. Thx, -Vineet Vineet Gupta (4): ARCv2: perf: tweak overflow interrupt ARCv2: perf: optimize given that num counters <= 32 ARC: perf: av

Re: glibc: nptl/tst-cancel17 and librt issue

On 11/21/2017 02:03 PM, Andreas Schwab wrote: On Nov 21 2017, Vineet Gupta <vineet.gup...@synopsys.com> wrote: make subdirs=nptl check fails as librt.so fails to link due to missing pthread symbols. The real librt built does have libpthread.so in its link cmd hence is fine, but not this

Re: glibc: nptl/tst-cancel17 and librt issue

On 11/21/2017 01:40 PM, Zack Weinberg wrote: On Tue, Nov 21, 2017 at 4:25 PM, Vineet Gupta make subdirs=nptl check fails as librt.so fails to link due to missing pthread symbols. The real librt built does have libpthread.so in its link cmd hence is fine, but not this librt. I've tripped over

glibc: nptl/tst-cancel17 and librt issue

Hi, I've been trying to run glibc test suite as part of prereq for ARC port submission, running into some landmines. make subdirs=nptl check fails as librt.so fails to link due to missing pthread symbols. The real librt built does have libpthread.so in its link cmd hence is fine, but not

Re: [PATCH 4/4] ARCv2: entry: Reduce perf intr return path

But I was choosing to ignore it mainly to reduce the overhead of a perf intr in general. A subsequent real interrupt could go thru thru the gyrations of preemption etc. So that's dangerous thinking... People that run a PREEMPT kernel generally tend to care about latency (esp. when combined

Re: [PATCH] [ARC] update GLIBC_DYNAMIC_LINKER per glibc upstreaming review comments

On 11/17/2017 04:23 AM, Claudiu Zissulescu wrote: Hi, gcc/ * config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc upstreaming review comments Accepted and committed. Thank you for your contribution, Claudiu Hi, Please also consider this for backporting as that is the

Re: [PATCH 4/4] ARCv2: entry: Reduce perf intr return path

On 11/14/2017 02:28 AM, Peter Zijlstra wrote: On Tue, Nov 07, 2017 at 02:13:04PM -0800, Vineet Gupta wrote: In the more likely case of returning to kernel from perf interrupt, do a fast path returning w/o bothering about CONFIG_PREEMPT etc I think this needs more explaining and certainly also

Re: [PATCH 0/4] ARC perf updates

On 11/07/2017 02:13 PM, Vineet Gupta wrote: Hi, Found these when cleaning up some old branches. The only controversial one could be the last one. Thx, -Vineet Vineet Gupta (4): ARCv2: perf: tweak overflow interrupt ARCv2: perf: optimize given that num counters <= 32 ARC: perf: av

[PATCH] [ARC] update GLIBC_DYNAMIC_LINKER per glibc upstreaming review comments

gcc/ * config/arc/linux.h: GLIBC_DYNAMIC_LINKER update per glibc upstreaming review comments Link: http://lists.infradead.org/pipermail/linux-snps-arc/2017-June/002634.html Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- ChangeLog | 5 + gcc/conf

Re: arc patch from glibc repo

On 11/09/2017 05:18 AM, Cupertino Miranda wrote: Hi Waldemar, I personally made this tst-cancel test start to pass in the past, related to unwinding issues we had in our tools. However, I have noticed that some of the tst-cancel tests would have some non-deterministic behavior. This was

[PATCH 3/4] ARC: perf: avoid vmalloc backed mmap

: 35.060 | ... | Performance counter stats for 'hackbench' (5 runs): Before: 399235 dTLB-load-misses ( +- 2.08% ) After : 397676 dTLB-load-misses ( +- 2.27% ) Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- arch/arc/Kconfig | 2 +- 1 file changed, 1 insertion

[PATCH 4/4] ARCv2: entry: Reduce perf intr return path

In the more likely case of returning to kernel from perf interrupt, do a fast path returning w/o bothering about CONFIG_PREEMPT etc However, if returning to user space, need do go thru the usual gyrations, as check for pending signals is an absolute must. Signed-off-by: Vineet Gupta <

[PATCH 0/4] ARC perf updates

Hi, Found these when cleaning up some old branches. The only controversial one could be the last one. Thx, -Vineet Vineet Gupta (4): ARCv2: perf: tweak overflow interrupt ARCv2: perf: optimize given that num counters <= 32 ARC: perf: avoid vmalloc backed mmap ARCv2: entry: Reduce p

[PATCH 1/4] ARCv2: perf: tweak overflow interrupt

Current perf ISR loops thru all 32 counters, checking for each if it caused the interrupt. Instead only loop thru counters which actually interrupted (typically 1). Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- arch/arc/kernel/perf_event.c | 24 ++-- 1 file c

Re: [PATCH] ARCv2: Accomodate NS48 MMUv5 by releaxing MMU ver checking

On 11/07/2017 07:33 AM, Alexey Brodkin wrote: Hi Vineet, Subject contains one typo: NS48 -> HS48. On Mon, 2017-11-06 at 11:30 -0800, Vineet Gupta wrote: HS48 cpus will have a new MMUv5, although Linux is currently not explicitly supporting the newer features (so remains at V4). The exist

[gcc] backport of gcc patch to #gcc-7-branch

Hi, As part of porting glibc to ARC one of the pre-req is to get it to build with upstream toolchain components. The patch 927c0132251f ("[ARC] Configure script to allow non uclibc based triplets") seems to be present in gcc #master, but not in #gcc-7-branch. Can it be backported to gcc 7

Re: [RFC 4/6] ARC: Initial port to glibc

Hi Joseph, On 06/27/2017 04:56 AM, Joseph Myers wrote: On Tue, 27 Jun 2017, Vineet Gupta wrote: Signed-off-by: Cupertino Miranda <cmira...@synopsys.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> We need ChangeLog entries and copyright assignments, but don't us

[GIt PULL] ARC fixes for 4.14-rc7

SDK platform - module build error for !LLSC config Eugeniy Paltsev (1): ARC: [plat-hsdk] Increase SDIO CIU frequency to 5000Hz Vineet Gupta (2): ARC: [plat-hsdk] select CONFIG_RESET_HSDK from Kconfig ARC: unb

Re: [PATCH] ARC: Memory barriers for everyone!

oab...@synopsys.com> Cc: Vineet Gupta <vgu...@synopsys.com> Cc: Alexey Brodkin <abrod...@synopsys.com> Cc: Joao Pinto <jpi...@synopsys.com> --- Hi Vineet, This is the final patch for the series which should fix all the stacktracing mechanism for Bus Error messages. In this one we force

Re: [PATCH] CLK: ARC: Set initial pll output frequency specified in device tree

Hi folks, On 09/29/2017 06:13 AM, Eugeniy Paltsev wrote: Add option to set initial output frequency of plls via "clock-frequency" property in pll's device tree node. This frequency will be set while pll driver probed. The usage example is setting CPU clock frequency on boot See discussion:

Re: [PATCH] ARC: [plat-hsdk]: Increase SDIO CIU frequency to 50000000Hz

-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Reported-by: Vineet Gupta <vgu...@synopsys.com> Tested-by: Vineet Gupta <vgu...@synopsys.com> Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com> Thx for the quick fix - I've applied i

Re: [RFC] ARC: [plat-hsdk]: Increase SDIO CIU frequency to 50000000Hz

On 10/10/2017 10:29 AM, Alexey Brodkin wrote: Hi Vineet, On Tue, 2017-10-10 at 10:09 -0700, Vineet Gupta wrote: On 10/10/2017 09:11 AM, Eugeniy Paltsev wrote: Increase SDIO CIU frequency from 1250Hz to 5000Hz by switching from the default divisor value (div-by-8) to the minimum

Re: [RFC] ARC: [plat-hsdk]: Increase SDIO CIU frequency to 50000000Hz

On 10/10/2017 09:11 AM, Eugeniy Paltsev wrote: Increase SDIO CIU frequency from 1250Hz to 5000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Please describe the problem first not the solution.

Re: [PATCH v2] ARC: reset: introduce AXS10x reset driver

On 10/04/2017 03:09 AM, Philipp Zabel wrote: Hi Vineet, On Mon, 2017-09-18 at 18:51 +0200, Philipp Zabel wrote: Will it be OK for you to apply the corresponding DT update for platform - that way I don't have to keep track of when ur branch hits mainline etc. The chances of any ensuing

[GIT PULL] ARC updates for 4.14-rc4

ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset Masahiro Yamada (1): arc: remove redundant UTS_MACHINE define in arch/arc/Makefile Vineet Gupta (4): ARC: [plat-eznps] Update platform maintainer as Noam left ARC: boot log: decontaminate ARCv2 ISA_CONFIG regis

Re: [PATCH v3] ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset

Hi Eugeniy, On 09/22/2017 09:49 AM, Eugeniy Paltsev wrote: DW ethernet controller on HSDK hangs sometimes after SW reset, so add reset node to make possible to reset DW ethernet controller HW. Signed-off-by: Eugeniy Paltsev --- Changes v2 -> v3: * Remove v1

Re: [GIT PULL] Reset controller fixes for v4.14

Hi Olof, On 10/03/2017 06:10 PM, Olof Johansson wrote: On Thu, Sep 21, 2017 at 06:12:59PM +0200, Philipp Zabel wrote: Dear arm-soc-maintainers, please consider merging this tag for v4.14. It removes the "v1" suffix from the newly merged HSDK reset driver, fixes its Kconfig dependencies, and

Re: [PATCH v2] ARC: reset: introduce AXS10x reset driver

Hi Philipp, On 10/04/2017 03:09 AM, Philipp Zabel wrote: Maybe it is better to do this the other way around? I can put this patch on a stable reset/arc branch for you to merge before applying the reset DT updates. Have you come to a decision on this? Just in case, I have removed the AXS10x

Re: [PATCH] ARC: [plat-hsdk]: Temporary fix to set CPU frequency to 1GHz

On 09/28/2017 07:33 AM, Eugeniy Paltsev wrote: Add temporary fix to HSDK platform code to setup CPU frequency to 1GHz on early boot. We can remove this fix when smart hsdk pll driver will be introduced, see discussion: https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02689.html

Re: [PATCH] ARC: reset: remove the misleading v1 suffix all over

Hi Philipp, On 09/14/2017 03:44 AM, Philipp Zabel wrote: On Mon, 2017-09-11 at 09:33 -0700, Vineet Gupta wrote: On 09/11/2017 03:28 AM, Philipp Zabel wrote: Hi Vineet, [added Eugeniy to Cc] On Thu, 2017-08-31 at 11:06 -0700, Vineet Gupta wrote: There is no plan yet to do a v2 board

Re: [PATCH v3] ARC: [plat-hsdk]: Add reset controller node to manage ethernet reset

On 09/22/2017 09:49 AM, Eugeniy Paltsev wrote: DW ethernet controller on HSDK hangs sometimes after SW reset, so add reset node to make possible to reset DW ethernet controller HW. Signed-off-by: Eugeniy Paltsev --- Changes v2 -> v3: * Remove v1 suffix as we

Re: [PATCH] reset: Restrict RESET_HSDK_V1 to ARC_SOC_HSDK or COMPILE_TEST

On 09/11/2017 05:22 AM, Geert Uytterhoeven wrote: The HSDK reset driver is only useful when building for an ARC HSDK platform. While at it, drop the "default n", as that is the default. Fixes: e0be864f14240cb1 ("ARC: reset: introduce HSDKv1 reset driver") Signed-off-by: Geert Uytterhoeven

Re: [PATCH v2] ARC: reset: introduce AXS10x reset driver

Hi Philipp, On 09/18/2017 05:07 AM, Philipp Zabel wrote: On Thu, 2017-09-14 at 17:28 +0300, Eugeniy Paltsev wrote: ARC AXS10x boards support custom IP-block which allows to control reset signals of selected peripherals. For example DW GMAC, etc... This block is controlled via memory-mapped

Re: [PATCH] ARC: [plat-axs10x]: DTS: fix sdio ciu frequency

On 09/12/2017 11:20 AM, Eugeniy Paltsev wrote: DW sdio controller has external ciu clock divider controlled via register in SDIO IP. It divides sdio_ref_clk (which comes from CGU) by 16 for default. So default mmcclk clock (which comes to sdk_in) is 2500 Hz. So fix wrong current value

Re: [PATCH] ARC: reset: remove the misleading v1 suffix all over

On 09/11/2017 03:28 AM, Philipp Zabel wrote: Hi Vineet, [added Eugeniy to Cc] On Thu, 2017-08-31 at 11:06 -0700, Vineet Gupta wrote: There is no plan yet to do a v2 board. And even if we were to do it only some IPs would actually change, so it be best to add suffixes at that point, not now

Re: [PATCH] ARC: HSDK: DTS: Temporary fix of sdio ciu frequency

On 09/08/2017 11:42 AM, Eugeniy Paltsev wrote: DW sdio controller has external ciu clock devider controlled via register in SDIO IP. Due to its unexpected default value (it should devide by 1 but it devides by 8) SDIO IP uses wrong ciu clock and works unstable (see STAR 9001204800) So add

Re: [PATCH] ARC: AXS10x: Add temporary quirk to reset ethernet IP

On 09/08/2017 10:14 AM, Eugeniy Paltsev wrote: On Wed, 2017-09-06 at 12:54 -0700, Vineet Gupta wrote: On 09/06/2017 11:21 AM, Eugeniy Paltsev wrote: DW ethernet controller on AXS10x hangs sometimes after SW reset, so add temporary quirk to reset DW ethernet controller IP core. This quirk can

Re: Setting CPU clock frequency on early boot

On 09/05/2017 03:04 PM, Rob Herring wrote: On Tue, Sep 5, 2017 at 10:37 AM, Alexey Brodkin wrote: Hello, I'd like to get some feedback on our idea as well as check if somebody faces similar situations and if so what would be the best way to implement some generic

[PATCH] ARC: Machine Check Exception: enable MMU in single place

. Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- arch/arc/kernel/entry.S | 6 ++ arch/arc/kernel/traps.c | 6 -- arch/arc/mm/tlb.c | 3 --- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index 1eea99

Re: [PATCH v2] arc: Re-enable MMU upon die()

-off-by: Jose Abreu <joab...@synopsys.com> Cc: Vineet Gupta <vgu...@synopsys.com> Cc: Alexey Brodkin <abrod...@synopsys.com> Changes from v1: - Moved MMU re-enable to machine check exception handler --- arch/arc/kernel/traps.c | 5 + 1 file changed, 5 insertions(+)

Re: [PATCH] arc: Re-enable MMU upon die()

-enables the MMU before start printing the stacktrace making stacktracing of modules work upon a fatal exception. Signed-off-by: Jose Abreu <joab...@synopsys.com> Cc: Vineet Gupta <vgu...@synopsys.com> Cc: Alexey Brodkin <abrod...@synopsys.com> --- arch/arc/kernel/traps.c | 5 +

Re: [PATCH 3/3 v8] ARC: hsdk: initial port for HSDK board

Hi Rob, On 07/17/2017 10:38 AM, Rob Herring wrote: On Wed, Jul 12, 2017 at 12:40:23PM +0300, Eugeniy Paltsev wrote: From: Alexey Brodkin This initial port adds support of ARC HS Development Kit board with some basic features such serial port, USB, SD/MMC and Ethernet. Essentially we run

Re: [PATCH] arc: Flush and invalidate caches on start

On 08/31/2017 07:22 AM, Alexey Brodkin wrote: This is useful to make sure no stale data exists in caches after bootloaders. The worst thing could be some lines of cache were locked in a bootloader for example during DDR recalibration and never unlocked. This may lead to really unpredictable

Re: [PATCH] arc: Show fault information passed to show_kernel_fault_diag()

debugging. Signed-off-by: Jose Abreu <joab...@synopsys.com> Cc: Vineet Gupta <vgu...@synopsys.com> Cc: Alexey Brodkin <abrod...@synopsys.com> --- arch/arc/kernel/troubleshoot.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arc/kernel/troubleshoot.c b/arch/arc/

[PATCH] ARC fix for 4.13-final

Hi Linus, Could you please add this ARC fixlet - which is a regression from pull req of last week - but only shows up in our out of tree platform (slated for next window). Thx, -Vineet Alexey Brodkin (1): ARCv2: SMP: Mask only private-per-core IRQ lines on boot at core intc

[PATCH] ARCv2: SMP: Mask only private-per-core IRQ lines on boot at core intc

()) Fixes: a8ec3ee861b6 ("arc: Mask individual IRQ lines during core INTC init") Signed-off-by: Alexey Brodkin <abrod...@synopsys.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> [vgupta: reworked changelog, removed the extraneous idu_irq_mask_raw()] Signed-off-by: Vineet G

Re: [PATCH v3 0/2] Add platform support for Adaptrum Anarion SOC

On 08/16/2017 03:15 PM, Alexandru Gagniuc wrote: Changes since v2: * Changed compatible binding of uart[1-3] to "ns16550" (they are not DW UARTs) * Add support under plat-nsim instead of creating a new stub platform * Changed board model to "adaptrum,endor-fpga" to allow LEDE scripts to ID

Re: [PATCH v3 03/11] ARC: Allow irq threading

+CC Peter, Tglx, Steven On 06/15/2017 01:43 AM, Noam Camus wrote: From: Noam Camus Working with NPS400 we noticed that there is a possibility of L1 interrupt nesting that may run out kernel stack. The scenario include serving invoke_softirqs() from irq_exit() and once

Re: [PATCHi v2] arc: Mask individual IRQ lines during core INTC init

support] Signed-off-by: Alexey Brodkin <abrod...@synopsys.com> Cc: Eugeniy Paltsev <palt...@synopsys.com> Tested-by: Alexandru Gagniuc <ale...@adaptrum.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- Changes v1 -> v2: Fixed arcv2 SMP case. 1

Re: [PATCH v4] ARC: clk: introduce HSDK pll driver

rs/clk/Makefile | 1 + drivers/clk/clk-hsdk-pll.c | 431 + 5 files changed, 473 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt create mode 100644 drivers/clk/clk-hsdk-pll.c Reviewed-b

Re: [PATCHi v2] arc: Mask individual IRQ lines during core INTC init

support] Signed-off-by: Alexey Brodkin <abrod...@synopsys.com> Cc: Eugeniy Paltsev <palt...@synopsys.com> Tested-by: Alexandru Gagniuc <ale...@adaptrum.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> v1 was merged in mainline this week - please provide a fi

Re: [PATCH] arc: Mask individual IRQ lines during core INTC init

On 08/10/2017 12:10 PM, Alexandru Gagniuc wrote: On 08/10/2017 08:07 AM, Alexey Brodkin wrote: ARC cores on reset have all interrupt lines of built-in INTC enabled. Which means once we globally enable interrupts (very early on boot) faulty hardware blocks may trigger an interrupt that Linux

Re: [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts

On 08/23/2017 04:24 AM, Eugeniy Paltsev wrote: Given that you added a generic feature as part of 1/5 - do other platforms abilis/nps need corresponding fixups as this one ! Actually no. If cpu 0 node don't have "cpu-freq" property we simply print cpu frequency and don't try to change it. So we

Re: [PATCH 1/3 v8] ARC: Set IO-coherency aperture base to LINUX_LINK_BASE

On 07/12/2017 02:40 AM, Eugeniy Paltsev wrote: Most of the time we indeed use the one and only LINUX_LINK_BASE set to 0x8000_. But there might be good reasons to move the kernel to another location like 0x9z etc. And we want IOC aperture to cover entire area used by the kernel, so let's make

Re: [PATCH 4/5] ARC: AXS103: DTS: Set cpu frequency explicitly via dts

On 08/14/2017 09:12 AM, Eugeniy Paltsev wrote: Set cpu frequency explicitly via "cpu-freq" param in cpu 0 node in device tree. We add "cpu-freq" only to cpu 0 as all cpus are clocking from same clock source (same pll in our case). We override cpus node in skeleton as we don't need this change

Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency

On 08/14/2017 09:12 AM, Eugeniy Paltsev wrote: Add core pll node (core_clk) to manage cpu frequency. core_clk represents pll itself. input_clk represents clock signal source (basically xtal) which comes to pll input. Signed-off-by: Eugeniy Paltsev ---

Re: [PATCH 3/5] ARC: AXS103: DTS: Add core pll node to manage cpu frequency

On 08/14/2017 09:12 AM, Eugeniy Paltsev wrote: Add core pll node (core_clk) to manage cpu frequency. core_clk represents pll itself. input_clk represents clock signal source (basically xtal) which comes to pll input. Signed-off-by: Eugeniy Paltsev ---

Re: [PATCH 2/5] ARC: AXS103: Get rid of platform specific cpu clock configuration

On 08/14/2017 09:12 AM, Eugeniy Paltsev wrote: We set AXS103 cpu frequency in arch/arc/plat-axs10x/axs10x.c via direct writing to pll registers for historical reasons. So get rid of AXS103 platform specific cpu clock configuration as we have driver for AXS103 core pll (AXS103 pll driver is

Re: [PATCH v3] ARC: clk: introduce HSDKv1 pll driver

On 08/21/2017 09:45 AM, Eugeniy Paltsev wrote: HSDKv1 board HSDK board manages its clocks using various PLLs. These PLL have same dividers and corresponding control registers mapped to different addresses. So we add one common driver for such PLLs. Each PLL on HSDK board consists of three

[GIT PULL] ARC fixes for 4.13

ARC: defconfig: Cleanup from old Kconfig options Vineet Gupta (3): ARC: [plat-sim] Include this platform unconditionally ARC: dma: implement dma_unmap_page and sg variant ARCv2: PAE40: set MSB even if !CONFIG_ARC_HAS_PAE40 but PAE exists in SoC arch/arc/Kcon

Re: Adding new ARC platforms (was Re: Handling stub code for new platforms)

On 08/11/2017 10:55 PM, Alexandru Gagniuc wrote: I was hoping to avoid the addition of extra source files for zero code gain, though your proposal does work. However, since the platform would be added unconditionally, would it make more sense to add the .compatible = "adaptrum,anarion"

Re: Adding new ARC platforms (was Re: Handling stub code for new platforms)

On 08/11/2017 10:55 PM, Alexandru Gagniuc wrote: Does that work for you ? I was hoping to avoid the addition of extra source files for zero code gain, though your proposal does work. However, since the platform would be added unconditionally, would it make more sense to add the .compatible

Adding new ARC platforms (was Re: Handling stub code for new platforms)

Hi Alexandru, On 08/11/2017 12:58 AM, Alexandru Gagniuc wrote: Hi, Looking under arch/arc, I see the current way is to add a plat-[socname] for each new SoC. However, it seems that plat-sim, and plat-tb10x are just place-holders for the compatible bindings. I was going to do the same for

Re: update timer frequencies

Hi Thomas, On 03/10/2017 03:58 PM, Thomas Gleixner wrote: Vlad, On Fri, 10 Mar 2017, Vlad Zakharov wrote: I am trying to implement a cpufreq driver for ARC CPUs. The point is that ARC timers (including those are used for timekeeping) are driven by the same clock as ARC CPU core(s). To be

ARC stuff (was Re: [PATCH -v2 1/4] mm: Rework {set,clear,mm}_tlb_flush_pending())

look? Cc: Russell King <li...@armlinux.org.uk> Cc: Will Deacon <will.dea...@arm.com> Cc: Benjamin Herrenschmidt <b...@kernel.crashing.org> Cc: Heiko Carstens <heiko.carst...@de.ibm.com> Cc: Ralf Baechle <r...@linux-mips.org> Cc: Vineet Gupta <vgu...@synopsys.com>

Re: [PATCH] arc: arcv2: cache: Explicitly set MSB counterpart of region ops addresses

On 08/02/2017 01:33 PM, Alexey Brodkin wrote: - write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1)); - write_aux_reg(ARC_REG_SLC_RGN_START, paddr); + end = paddr + sz + l2_line_sz - 1; + write_aux_reg(ARC_REG_SLC_RGN_END1, upper_32_bits(end)); +

Re: snps, dwmac interrupt storm (Was: ARC770: "unexpected IRQ trap at vector 00" during boot)

On 08/02/2017 03:03 AM, Alex wrote: On 07/25/2017 08:08 PM, Vineet Gupta wrote: Hi Vineet, On 07/26/2017 01:41 AM, Alexey Brodkin wrote: BTW what is your exact kernel version? In the meantime we'll try to revisit rework of ARC's INTC init procedure but I cannot promise anything very soon

Re: [PATCH] arc: arcv2: cache: Explicitly set MSB counterpart of region ops addresses

On 08/01/2017 03:29 PM, Alexey Brodkin wrote: It is necessary to explicitly set both SLC_AUX_RGN_START1 and SLC_AUX_RGN_END1 which hold MSB bits of the physical address correspondingly of region start and end otherwise SLC region operation is executed in unpredictable manner, for example on HSDK

Re: [PATCH 5/5] ARC: DTS: Add device-tree for Anarion-based development board

On 07/29/2017 03:37 AM, Alexandru Gagniuc wrote: Signed-off-by: Alexandru Gagniuc --- arch/arc/boot/dts/adaptrum_anarion.dtsi | 107 arch/arc/boot/dts/adaptrum_anarion_fpga.dts | 49 + 2 files changed, 156 insertions(+)

Re: [PATCH] ARC: clk: introduce HSDKv1 pll driver

Hi Stephen, On 07/14/2017 09:01 PM, Eugeniy Paltsev wrote: HSDKv1 boards manages it's clocks using various PLLs. These PLL has same dividers and corresponding control registers mapped to different addresses. So we add one common driver for such PLLs. Each PLL on HSDK board consist of three

Re: [PATCH] arc: remove num-slots from arc platforms

On 07/18/2017 01:11 AM, Shawn Lin wrote: I'd prefer it goes via the tree which changed the driver in first place ! So does it mean that you are okay for mmc maintainer to pick this up with your and Alexey's ack? Yes please. Thx, -Vineet ___

Re: [PATCH] arc: Hardcode ARCH_DMA_MINALIGN to max line length we may have

On 07/18/2017 07:31 AM, Alexey Brodkin wrote: Current implementation relies on L1 line length which might easily be smaller than L2 line (which is usually the case BTW). Imagine this typical case: L2 line is 128 bytes while L1 line is 64-bytes. Now we want to allocate small buffer and later use

Re: semantics of dma_map_single()

Hi Christoph, On 07/16/2017 11:42 PM, Christoph Hellwig wrote: I would expect that it would support any contiguous range in the kernel mapping (e.g. no vmalloc and friends). But it's not documented anywhere, and if no in kernel users makes use of that fact at the moment it might be better to

Re: [PATCH] arc: remove num-slots from arc platforms

On 07/07/2017 01:13 AM, Alexey Brodkin wrote: Hi Shawn, On Wed, 2017-07-05 at 15:10 +0800, Shawn Lin wrote: dwmmc driver deprecated num-slots and plan to get rid of it finally. Just move a step to cleanup it from DT. Cc: Jaehoon Chung Signed-off-by: Shawn Lin

Re: [PATCH] ARC: AXS: prepare dts files for enabling PAE40 on axs103

On 06/26/2017 04:47 AM, Eugeniy Paltsev wrote: Enable 64bit adressing, where it needed, to make possible enabling PAE40 on axs103. This patch doesn't affect on any functionality. Signed-off-by: Eugeniy Paltsev --- arch/arc/boot/dts/axc001.dtsi | 20

Re: [RFC 4/6] ARC: Initial port to glibc

On 06/27/2017 02:56 PM, Joseph Myers wrote: diff --git a/sysdeps/unix/sysv/linux/arc/ld.abilist b/sysdeps/unix/sysv/linux/arc/ld.abilist new file mode 100644 index ..6001f2e98402 --- /dev/null +++ b/sysdeps/unix/sysv/linux/arc/ld.abilist @@ -0,0 +1,12 @@ +GLIBC_2.24 + GLIBC_2.24 A +

Re: [PATCH 3/3 v6] ARC: hsdk: initial port for HSDK board

On 06/26/2017 06:11 PM, Eugeniy Paltsev wrote: From: Alexey Brodkin diff --git a/arch/arc/configs/hsdk_defconfig b/arch/arc/configs/hsdk_defconfig new file mode 100644 index 000..53bc9f3 --- /dev/null +++ b/arch/arc/configs/hsdk_defconfig @@ -0,0 +1,75 @@

Re: [RFC 4/6] ARC: Initial port to glibc

On 06/27/2017 02:56 PM, Joseph Myers wrote: Signed-off-by: Cupertino Miranda<cmira...@synopsys.com> Signed-off-by: Vineet Gupta<vgu...@synopsys.com> We need ChangeLog entries and copyright assignments, but don't use Signed-off-by. About the copyright assignment and $start-$end, I

Re: [RFC 2/6] ARC: Fixed inline asm contraints to gcc 6.x

On 06/27/2017 02:47 PM, Joseph Myers wrote: longlong.h should be kept in sync with GCC. If the GCC version has been fixed we can copy the updated version verbatim from GCC. Indeed it is fixed in upstream gcc. commit 608e1e3746f5242f0b0987ce64ca99969c33fb48 Author: claziss

Re: [RFC 4/6] ARC: Initial port to glibc

On 06/27/2017 02:56 PM, Joseph Myers wrote: On Tue, 27 Jun 2017, Vineet Gupta wrote: Signed-off-by: Cupertino Miranda <cmira...@synopsys.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> We need ChangeLog entries and copyright assignments, but don't use Signed-off-by.

Re: [RFC 0/6] glibc port to ARC architecture

On 06/27/2017 02:44 PM, Joseph Myers wrote: I don't see a corporate copyright assignment (or disclaimer plus individual assignments) from Synopsys in the FSF copyright.list. The assignment will be needed before we can consider this port. Right we missed this ! FWIW we did the agreements for

Re: [RFC 4/6] ARC: Initial port to glibc

On 06/27/2017 02:29 PM, Florian Weimer wrote: On 06/27/2017 10:00 AM, Vineet Gupta wrote: diff --git a/sysdeps/unix/sysv/linux/arc/shlib-versions b/sysdeps/unix/sysv/linux/arc/shlib-versions new file mode 100644 index ..c4d5d029812d --- /dev/null +++ b/sysdeps/unix/sysv/linux/arc

[RFC 6/6] ARC: Fix several testsuite failures related to unwinding

o undo above since we don't want BLINK spilled on stack for this specific case 3. Add dwarf CFI psuedo-ops to various syscall generators Signed-off-by: Cupertino Miranda <cmira...@synopsys.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- sysdeps/arc/dl-trampoline.S

[RFC 5/6] ARC: Enable __start as entry point vs. canonical _start

ARC linker scripts have defined __start as entry point so to not break ABI for uClibc et al we allow __start for glibc as well Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- sysdeps/arc/dl-machine.h | 14 ++ sysdeps/arc/entry.h | 5 + sysdeps/arc/start.S

[RFC 3/6] ARC: add definitions to elf/elf.h

Signed-off-by: Cupertino Miranda <cmira...@synopsys.com> Signed-off-by: Vineet Gupta <vgu...@synopsys.com> --- elf/elf.h | 68 +++ 1 file changed, 68 insertions(+) diff --git a/elf/elf.h b/elf/elf.h index 3900b4c9f0ca..

stdout-path (was Re: [PATCH 3/3 v6] ARC: hsdk: initial port for HSDK board)

On 06/26/2017 07:25 PM, Alexey Brodkin wrote: + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; Use stdout-path for the console. Really, the bootargs should be blank and populated by the bootloader

uclibc test suite with gnu 2017.03 (was Re: [Fwd: Re: nsim latest free version])

Hi Waldemar, Hi Waldemar, On Wed, 2017-06-21 at 21:16 +0200, Waldemar Brodkorb wrote: Hi Alexey, I have some issues lately running the testsuite in NSIM. Is there may be some new version available? How I can get an updated version? Let me check with our nSIM devs. But could you please

Re: [PATCH] arc: implement DMA_ATTR_NO_KERNEL_MAPPING

On 06/16/2017 12:11 AM, Christoph Hellwig wrote: This way allocations like the NVMe HMB don't consume iomap space Signed-off-by: Christoph Hellwig --- Note: compile tested only, I stumbled over this when researching dma api quirks for HMB support. arch/arc/mm/dma.c | 42

Re: [PATCH v2 08/12] ARC: [plat-eznps] new command line argument for HW scheduler at MTM

On 06/13/2017 07:03 AM, Noam Camus wrote: From: Noam Camus We add ability for all cores at NPS SoC to control the number of cycles HW thread can execute before it is replace with another eligible HW thread within the same core. The replacement is done by the HE scheduler.

Re: [PATCH v2 02/12] ARC: set level of log per CPU during boot to be debug level

On 06/13/2017 07:03 AM, Noam Camus wrote: From: Noam Camus The reasons are: 1) speeding up boot time, becomes critical for many CPUs machine, e.g. NPS400 with 4K CPUs 2) shorten kernel log at boot time, again easy to scan for large scale machines such NPS400

Re: [PATCH v2 11/11] ARC: [plat-eznps] Handle memory error as an exception

On 06/08/2017 08:17 PM, Noam Camus wrote: *> From:*Vineet Gupta <vineet.gup...@synopsys.com> *> Sent:* Thursday, June 8, 2017 10:00 PM >> With EZsim we try to simulate NPS400 CTOP core and not ARC core, and as such we >> strive to have similar echo system for both s

Re: [PATCH v2 11/11] ARC: [plat-eznps] Handle memory error as an exception

On 06/08/2017 11:23 AM, Noam Camus wrote: *> From:* Vineet Gupta <vineet.gup...@synopsys.com> *> Sent:* Thursday, June 8, 2017 7:38 PM >> >> With simulator we just turn this configuration on, so we redirect the Legacy >> Synopsys L2 ISR from nSIM into machin

Re: [PATCH v2 11/11] ARC: [plat-eznps] Handle memory error as an exception

On 06/07/2017 08:29 PM, Noam Camus wrote: *From:* Noam Camus *Sent:* Wednesday, June 7, 2017 8:06:17 PM *To:* Vineet Gupta; linux-snps-arc@lists.infradead.org *Cc:* linux-ker...@vger.kernel.org; Elad Kanfi *Subject:* Re: [PATCH v2 11/11] ARC: [plat-eznps] Handle memory error as an exception

Re: [PATCH v2 11/11] ARC: [plat-eznps] Handle memory error as an exception

On 06/07/2017 04:14 AM, Noam Camus wrote: +config EZNPS_MEM_ERROR + bool "ARC-EZchip Memory error as an exception" + depends on ARC_PLAT_EZNPS + default n So you set default to "n" - thus by default it works for the simulator not silicon ? Correct, this way I "align" Sim

Re: [PATCH v4] hsdk: initial port for HSDK board

<abrod...@synopsys.com> Cc: Vineet Gupta <vgu...@synopsys.com> Cc: Rob Herring <robh...@kernel.org> --- Changes v3 -> v4: * Removed senseless "ranges" property from "memory" node in .dts * Refined early-boot code: - CREG_PAE should be set only once th

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