Re: [PATCH 0/4 v6] drm: Add support of ARC PGU display controller

Hi David, On Tue, 2016-04-19 at 16:19 +0300, Alexey Brodkin wrote: > This series add support of ARC PGU display controller. > ARC PGU is a quite simple byte streamer that gets data from the framebuffer > and pushes it to hte connected encoder (DP or HDMI). > > It was tested on ARC SDP boards (axs

Re: [PATCH 2/2 v6] arc: axs10x: Add DT bindings for I2S PLL Clock

Hi Jose, On Thu, 2016-04-21 at 18:19 +0100, Jose Abreu wrote: > Add device tree bindings for AXS10X I2S PLL Clock driver. > > Signed-off-by: Jose Abreu > --- > > Changes v5 -> v6: > * Added 'clocks' field > > This patch was only introduced in v5. > >  arch/arc/boot/dts/axs10x_mb.dtsi | 13 +++

Misleading hint to select CONFIG_PERF_EVENTS if driver sets PERF_PMU_CAP_NO_INTERRUPT

I have a question about user-space perf handling error numbers. The problem is that PMU interrupts are not supported in arc700 architecture and it is impossible to evaluate `perf record` command. In our perf implementation we set PERF_PMU_CAP_NO_INTERRUPT flag so core perf infrastructure knows we d