Re: [RFC/RFT WIP PATCH] arc: add sparsemem support

2019-12-19 Thread Vineet Gupta
On 12/19/19 6:57 AM, Eugeniy Paltsev wrote:
> You can find instructions describing how to run Linux with nSIM free here:
> https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/How-to-run-ARC-Linux-kernel-and-debug-(with-MetaWare-Debugger)#standalone-nsim-also-free-nsim
>
> If you are going to rebase you patches on v5.5 kernel (or newer) please also 
> read this note:
> https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/How-to-run-ARC-Linux-kernel-and-debug-(with-MetaWare-Debugger)#v55-linux-kernel-note

Thx for nice update of the wiki page. I've made some mods to make the DW UART
settings as default and mentioned the fallback ARC UART settings in foot note 
(vs.
the other way around)

-Vineet
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Re: [RFC/RFT WIP PATCH] arc: add sparsemem support

2019-12-19 Thread Eugeniy Paltsev
Hi Mike,

Sorry for late respond.
I've tested this patches but the kernel crashes in the memory initialization 
code.
Here is bootlog:

->8-
Linux version 5.1.0+ (paltsev@paltsev-e7480) (gcc version 8.2.1 20180814 (ARCv2 
ISA Linux uClibc toolchain 2018.09)) #1 PREEMPT Thu Oct 31 02:25:55 MSK 2019
Memory @ 8000 [512M] 
Memory @ 1 [1024M] 
OF: fdt: Machine model: snps,nsim_hs
earlycon: arc_uart0 at MMIO32 0xc0fc1000 (options '115200n8')
printk: bootconsole [arc_uart0] enabled
archs-intc  : 15 priority levels (default 1)

IDENTITY: ARCVER [0x51] ARCNUM [0xff] CHIPID [ 0x0]
processor [0]   : HS38 R2.0 (ARCv2 ISA) 
Timers  : Timer0 Timer1 RTC [UP 64-bit] 
ISA Extn: atomic ll64 unalign mpy[opt 9] div_rem 
BPU : partial match, cache:2048, Predict Table:16384 Return stk: 8
MMU [v4]: 8k PAGE, 2M Super Page (not used) JTLB 512 (128x4), uDTLB 8, 
uITLB 4
I-Cache : 16K, 2way/set, 64B Line, VIPT
D-Cache : 16K, 4way/set, 64B Line, PIPT
Peripherals : 0xc000
Vector Table: 0x8000
DEBUG   : ActionPoint 4/full
Built 1 zonelists, mobility grouping on.  Total pages: 196320
Kernel command line: earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 
console=ttyARC0,115200n8 print-fatal-signals=1
Dentry cache hash table entries: 65536 (order: 5, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 4, 131072 bytes)

Oops
Path: (null)
CPU: 0 PID: 0 Comm: swapper Not tainted 5.1.0+ #1

[ECR   ]: 0x00050100 => Invalid Read @ 0x0120 by insn @ 0x800a8bc6
[EFA   ]: 0x0120
[BLINK ]: mem_init+0x40/0x58
[ERET  ]: free_highmem_page+0x6/0x88
[STAT32]: 0x00080002 :   K 
BTA: 0x800a8bc0  SP: 0x803ebfd8  FP: 0x
LPS: 0x802fbd3c LPE: 0x802fbd44 LPC: 0x
r00: 0x0120 r01: 0x000a r02: 0x 
r03: 0x000a r04: 0x0021 r05: 0x 
r06: 0x646f6e49 r07: 0x61632d65 r08: 0x20656863 
r09: 0x68736168 r10: 0x0016 r11: 0x6520656c 
r12: 0x800066e4 

Stack Trace:
  free_highmem_page+0x6/0x88
  mem_init+0x40/0x58
->8-

So we have invalid memory access here:
->8-
void __init mem_init(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long tmp;

reset_all_zones_managed_pages();
for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
free_highmem_page(pfn_to_page(tmp));   // --
#endif

memblock_free_all();
mem_init_print_info(NULL);
}
->8-


BTW, you can also test your future changes by yourself. For that you can use 
nSIM free simulator which provides an instruction accurate processor model for
the ARC processors. To download nSIM free you need request it via this form:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi
You will be able to download it after the from will be approved.

You can find instructions describing how to run Linux with nSIM free here:
https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/How-to-run-ARC-Linux-kernel-and-debug-(with-MetaWare-Debugger)#standalone-nsim-also-free-nsim

If you are going to rebase you patches on v5.5 kernel (or newer) please also 
read this note:
https://github.com/foss-for-synopsys-dwc-arc-processors/linux/wiki/How-to-run-ARC-Linux-kernel-and-debug-(with-MetaWare-Debugger)#v55-linux-kernel-note

Thanks.
---
 Eugeniy Paltsev



From: linux-snps-arc  on behalf of 
Mike Rapoport 
Sent: Sunday, May 26, 2019 18:38
To: Vineet Gupta
Cc: linux-snps-arc@lists.infradead.org; Mike Rapoport
Subject: [RFC/RFT WIP PATCH] arc: add sparsemem support

Add support for initialization of SPARSE memory model along with Kconfig
options that will allow its selection during the kernel configuration.

Certain configurations of ARC require that the memory that is not directly
mapped by the kernel (ZONE_HIGHMEM) will be below the memory that is always
mapped into the kernel page tables (ZONE_NORMAL).

For such configurations ZONE_NORMAL and ZONE_HIGHMEM were present on
different nodes.

With SPARSEMEM, there is a single node containing all the memory, but it is
initialized using dedicated free_area_init_node_exact_zones() routing that
takes the exact zone extents rather then their sizes.

Signed-off-by: Mike Rapoport 
---
 arch/arc/Kconfig |  9 +
 arch/arc/include/asm/sparsemem.h | 13 +++
 arch/arc/mm/init.c   | 84 
 include/linux/mm.h   |  3 ++
 mm/page_alloc.c  | 37 ++
 5 files changed, 121 insertions(+), 25 deletions(-)
 create mode 100644 arch/arc/include/asm/sparsemem.h

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 23e063d..9b6c31d 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -47,6 +47,7 @@ config ARC
select OF_EARLY_FLAT

[PATCH] ARC: asm-offsets: remove duplicate entry

2019-12-19 Thread Eugeniy Paltsev
We define 'PT_user_r25' twice in asm-offsets.c
It's not a big issue as we define it to the same value, however
let's fix it.

Signed-off-by: Eugeniy Paltsev 
---
 arch/arc/kernel/asm-offsets.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arc/kernel/asm-offsets.c b/arch/arc/kernel/asm-offsets.c
index 1f621e416521..631ebb5d3458 100644
--- a/arch/arc/kernel/asm-offsets.c
+++ b/arch/arc/kernel/asm-offsets.c
@@ -66,7 +66,6 @@ int main(void)
 
DEFINE(SZ_CALLEE_REGS, sizeof(struct callee_regs));
DEFINE(SZ_PT_REGS, sizeof(struct pt_regs));
-   DEFINE(PT_user_r25, offsetof(struct pt_regs, user_r25));
 
return 0;
 }
-- 
2.21.0


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