[PATCH 18/20] ARC: entry: replace 8 byte ADD.ne with 4 byte ADD2.ne

ARCv2 current 07e0 : 7e0: 2482 3c01 sub sp,sp,112 7e4: 1c28 3006 std r0r1,[sp,40] 7e8: 1c30 3086 std r2r3,[sp,48] 7ec: 1c38 3106 std r4r5,[sp,56] 7f0: 1c40 3186 std

[PATCH 14/20] ARC: entry: ARcompact EV_ProtV to use r10 directly

Signed-off-by: Vineet Gupta --- arch/arc/kernel/entry-compact.S | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S index 5cb0cd7e4eab..77f0090554c5 100644 --- a/arch/arc/kernel/entry-compact.S +++

[PATCH 08/20] ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA

- boot log now clearly per ISA - global struct cpuinfo_arc[] elimiated - local struct struct arcinfo kept for passing info between functions Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 33 +- arch/arc/include/asm/setup.h | 4 +- arch/arc/kernel/setup.c|

[PATCH 20/20] ARC: pt_regs: create seperate type for ecr

Reduces duplication in each ISA specific pt_regs Signed-off-by: Vineet Gupta --- arch/arc/include/asm/ptrace.h | 45 +- arch/arc/kernel/asm-offsets.c | 2 +- arch/arc/kernel/kgdb.c | 2 +- arch/arc/kernel/ptrace.c | 4 +--

[PATCH 05/20] ARC: boot log: eliminate struct cpuinfo_arc #1: mm

This is first step in eliminating struct cpuinfo_arc[NR_CPUS] Back when we had just ARCompact ISA, the idea was to read/bit-fiddle the BCRs once and and cache decoded information in a global struct ready to use. With ARCv2 it was modified to contained abstract / ISA agnostic information.

[PATCH 17/20] ARC: entry: replace 8 byte OR with 4 byte BSET

FAKE_RET_FROM_EXCEPTION drops down to pure kernel mode. It currently has an 8 byte instruction which can be replaced with 4 byte BSET This is applicable to both ARCv2 and ARCv3 entr code. ARCv2 current 0804 : ... 874: 216a 1280 lr r9,[status32] 878: 2146

[PATCH 13/20] ARC: entry: rework (non-functional)

- comments update - rename syscall_trace_entry - use PT_xxx in entry code Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 23 -- arch/arc/include/asm/entry-compact.h | 3 +- arch/arc/include/asm/ptrace.h| 2 +- arch/arc/kernel/asm-offsets.c

[PATCH 19/20] ARCv2: entry: rearrange pt_regs slightly

Instead of r26,fp,sp,r12,r30 order as fp,r30,r12,r26,sp - keeps SP at well known position (right abive hardware autosave) - r26,r12 saved specifically for ARCv2 (and not in ARCv3) kept closer for easy ifdef'ry later Signed-off-by: Vineet Gupta --- arch/arc/include/asm/entry-arcv2.h | 12

[PATCH 00/20] ARC updates

Hi, This is a pile of miscll improvements/updates sitting in one of my local trees. Given the recent warning fix, we coudl also push them out. @Alexey, @Shahab: care to give these a spin on hsdk (and test ARC700 build/boot on nSIM if possible). Thx, -Vineet Vineet Gupta (20): ARC: uaccess:

[PATCH 09/20] ARC: entry: use gp to cache task pointer (vs. r25)

The motivation is eventual ABI considerations for ARCv3 but even without it this change us worthwhile as diffstat reduces 100 net lines r25 is a callee saved register, normally not saved by entry code in pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs to be. This in turn

[PATCH 15/20] ARC: entry: EV_MachineCheck dont re-read ECR

Signed-off-by: Vineet Gupta --- arch/arc/kernel/entry.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index f291fc8476d7..46582fbebcf2 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -95,16 +95,15

[PATCH 07/20] ARC: boot log: eliminate struct cpuinfo_arc #3: don't export

Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 2 -- arch/arc/kernel/mcip.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index cb1ad1bb4ece..160ee3fab1bd 100644 --- a/arch/arc/include/asm/arcregs.h

[PATCH 11/20] ARC: __switch_to: asm with dwarf ops (vs. inline asm)

__switch_to() is final step of context switch, swapping kernel modes stack (and callee regs) of outgoing task with next task. It is also the starting point of stack unwinging of a sleeping task and captures SP, FP, BLINK and the corresponding dwarf info. Back when dinosaurs still roamed around,

[PATCH 16/20] ARC: entry: Add more common chores to EXCEPTION_PROLOGUE

THe high level structure of most ARC exception handlers is 1. save regfile with EXCEPTION_PROLOGUE 2. setup r0: EFA (not part of pt_regs) 3. setup r1: pointer to pt_regs (SP) 4. drop down to pure kernel mode (from exception) 5. call the Linux "C" handler Remove the boiler plate code by

[PATCH 06/20] ARC: boot log: eliminate struct cpuinfo_arc #2: cache

Signed-off-by: Vineet Gupta --- arch/arc/include/asm/arcregs.h | 37 ++- arch/arc/include/asm/setup.h | 1 - arch/arc/kernel/setup.c| 3 +- arch/arc/mm/cache.c| 171 - 4 files changed, 97 insertions(+), 115 deletions(-) diff --git

[PATCH 04/20] ARCv2: memset: don't prefetch for len == 0 which happens a alot

This avoids potential "bleeding" when size == 0 as cache line would be dirtied (and possibly fetched from other cores) and due to the same reaons more optimal too. Signed-off-by: Vineet Gupta --- arch/arc/lib/memset-archs.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 03/20] ARC: uaccess: elide unaliged handling if hardware supports

Signed-off-by: Vineet Gupta --- arch/arc/include/asm/uaccess.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h index d2da159bb80a..1e8809ea000a 100644 --- a/arch/arc/include/asm/uaccess.h +++

[PATCH 12/20] ARC: __switch_to: move ksp to thread_info from thread_struct

task's arch specific bits are carried in 2 places - embedded thread_struct in task_struct - associated thread_info (hoisted in task's stack page) and syntactically: (thread_info *)(task_struct->stack) ksp (dynamic kernel stack top) currently lives in thread_struct but given its deep location

[PATCH 02/20] ARC: uaccess: use optimized generic __strnlen_user/__strncpy_from_user

The existing ARC variants have 2 issues - Use ZOL which may not be present in forthcoming architecture - Byte loop based vs. generic version which is word loop based Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arc/Kconfig

[PATCH 10/20] ARC: kernel stack: INIT_THREAD need not setup @init_stack in @ksp

There are 2 pointers to kernel mode stack of a task - task_struct.stack: base address of stack page (max possible stack top) - thread_info.ksp : runtime stack top in __switch_to INIT_THREAD was setting up ksp to stack base which was not really needed - it would get overwritten with dynamic

[PATCH 01/20] ARC: uaccess: remove arc specific out-of-line handles for -Os

Everything is now out-of-line in lib/usercopy.c Signed-off-by: Vineet Gupta --- arch/arc/include/asm/uaccess.h | 11 ++- arch/arc/mm/extable.c | 11 --- 2 files changed, 2 insertions(+), 20 deletions(-) diff --git a/arch/arc/include/asm/uaccess.h

Re: [PATCH] ARC: -Wmissing-prototype warning fixes

On 8/13/23 12:18, Arnd Bergmann wrote: On Sun, Aug 13, 2023, at 21:16, Vineet Gupta wrote: Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1]

Re: [PATCH] ARC: mm: retire support for aliasing VIPT D$

On 8/14/23 12:38, Andrew Morton wrote: On Sun, 13 Aug 2023 12:25:43 -0700 Vineet Gupta wrote: Legacy ARC700 processors (first generation of MMU enabled ARC cores) has VIPT cached which could be configured such that they could alias. I added the VIPT aliasing support, with all the cache

Re: [PATCH] ARC: mm: retire support for aliasing VIPT D$

On Sun, 13 Aug 2023 12:25:43 -0700 Vineet Gupta wrote: > Legacy ARC700 processors (first generation of MMU enabled ARC cores) has > VIPT cached which could be configured such that they could alias. > I added the VIPT aliasing support, with all the cache flush overhead to > support all but 1