Thanks for response.
My comments are given inline below.
On Wed, 2017-01-25 at 19:25 +0200, Andy Shevchenko wrote:
> On Wed, 2017-01-25 at 18:34 +0300, Eugeniy Paltsev wrote:
> >
> > This patch adds support for the DW AXI DMAC controller.
> >
> > DW AXI DMAC is a p
fixies according to previous RFC
* Add DT bindings
Eugeniy Paltsev (2):
dt-bindings: Document the Synopsys DW AXI DMA bindings
dmaengine: Add DW AXI DMAC driver
.../devicetree/bindings/dma/snps,axi-dw-dmac.txt | 33 +
drivers/dma/Kconfig|8 +
drivers/dma
Hi Andy,
thanks for respond.
I'm agree with most of the comments.
My comments below.
On Fri, 2017-01-20 at 15:38 +0200, Andy Shevchenko wrote:
> On Fri, 2017-01-20 at 13:50 +0300, Eugeniy Paltsev wrote:
> >
> > This patch adds support for the DW AXI DMAC controller.
>
All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.
Acked-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
dr
multi block transfers (if present) via DT.
Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Acked-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@syn
Move adding DT property and adding documentation for this
property to one patch.
Eugeniy Paltsev (2):
DW DMAC: enable memory-to-memory transfers support
DW DMAC: add multi-block property to device tree
Documentation/devicetree/bindings/dma/snps-dma.txt | 2 ++
arch/arc/boot/dts/abilis_tb10x.
All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.
Acked-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
dr
it by default,
if we read configuration from DT.
* Use "multi-block" instead of "hw-llp" name to be more clear.
* Move adding DT property and adding documentation for this
property to one patch.
Eugeniy Paltsev (2):
DW DMAC: enable memory-to-memory transfers support
D
ory transfers.
So we don't need to read it from DT. So enable it by default,
if we read configuration from DT.
* Use "multi-block" instead of "hw-llp" name to be more clear.
* Move adding DT property and adding documentation for this
property to one patch.
Eugeniy Pa
multi block transfers (if present) via DT.
Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Also:
Update DT documentation.
Update existing pl
All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.
Acked-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
dr
e don't need to read it from DT. So enable it by default,
if we read configuration from DT.
* Use "multi-block" instead of "hw-llp" name to be more clear.
* Move adding DT property and adding documentation for this
property to one patch.
Eugeniy Paltsev (2):
DW DMAC: e
multi block transfers (if present) via DT.
Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Update DT documentation.
Update existing platform data.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.
All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 6 ++
1 file changed, 6 insertions(+)
diff
multi block transfers (if present) via DT.
Switch from per device is_nollp variable to multi_block array
to be able enable/disable multi block transfers separately per
channel.
Update DT documentation.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Documentation/devi
All known devices, which use DT for configuration, support
memory-to-memory transfers. So enable it by default, if we read
configuration from DT.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 6 ++
1 file changed, 6 insertions(+)
diff
Hi Andy,
On Wed, 2016-11-16 at 17:10 +0200, Andy Shevchenko wrote:
> Overall, since we are going to expose some properties to the Device
> Tree
> I would really think twice about naming. Better if we reuse something
> existing already.
>
> So, what I can see is
>
> dmacap,private
>
block transfers (if present) via DT.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/core.c| 2 +-
drivers/dma/dw/platform.c| 5 +
include/linux/platform_data/dma-dw.h | 4 ++--
3 files changed, 8 insertions(+), 3 deletions(-)
support via DT.
Fix white spaces.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Documentation/devicetree/bindings/dma/snps-dma.txt | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt
b/Documen
Memory-to-memory dma transfers were disabled by default if we
used DT to cofigure DMAC.
Add is-memcpu property, so it became possible to enable
memory-to-memory transfers support via DT.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 3 +++
Rename is_private to is-private as ordered by DT policy.
The change leaves the support for the old format.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/dw/platform.c b/drivers/
On Tue, 2016-11-08 at 15:36 +0200, Andy Shevchenko wrote:
> On Tue, 2016-11-08 at 12:22 +0000, Eugeniy Paltsev wrote:
> >
> > On Mon, 2016-11-07 at 15:55 +0200, Andy Shevchenko wrote:
>
> >
> > >
> > > >
> > > > + * @only_quirks_used:
Hi Andy,
Could you possibly tell me your ideas about these changes?
Thanks.
On Fri, 2016-10-28 at 18:59 +0300, Eugeniy Paltsev wrote:
> This series is to address a proposal by Andy in these threads:
> http://www.spinics.net/lists/dmaengine/msg11506.html
> http://www.spinics.net/lists/
Split platform data to actual hardware properties, and platform quirks.
Now we able to use quirks and hardware properties separately from
different sources (pdata, device tree or autoconfig registers)
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/
Add "DW_DMA_IS_LLP_SUPPORTED" flag. Use this flag to get rid
of "dwc->nollp" as separate variable.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/core.c | 11 ++-
drivers/dma/dw/regs.h | 2 +-
2 files changed, 7 insertions(+
Convert device tree properties reading to unified device
property API, update properties names as ordered by DT policy.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 33 ++---
1 file changed, 14 insertions(
or autoconfig registers)
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Changes for v2:
- use separate bool values for quirks in "dw_dma_platform_data" instead of
common bit field.
- convert device tree properties reading to unified device property API.
I
On Thu, 2016-10-20 at 13:48 +0300, Andy Shevchenko wrote:
> On Thu, 2016-09-15 at 16:14 +0300, Eugeniy Paltsev wrote:
> >
> > This patch is to address a proposal by Andy in this thread:
> > http://www.spinics.net/lists/dmaengine/msg10754.html
> > Split platform data to
Hi Andy,
On Fri, 2016-10-07 at 14:05 +0300, Andy Shevchenko wrote:
> On Wed, 2016-10-05 at 15:14 +0000, Eugeniy Paltsev wrote:
> >
> > Hi Andy,
> > what do you think about these changes?
> I was off for few weeks, will look at this next week.
>
I was wondering yo
C PGU driver to be able work with drm bridge hdmi encoder
interface. The hdmi connector code isn't needed anymore as we expect
the adv7511 bridge driver to create/manage the connector.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
Changes for v2:
- re
C PGU driver to be able work with drm bridge hdmi encoder
interface. The hdmi connector code isn't needed anymore as we expect
the adv7511 bridge driver to create/manage the connector.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/gpu/drm/arc/arcpgu_hdmi.c | 144
Hi Andy,
what do you think about these changes?
On Thu, 2016-09-15 at 16:14 +0300, Eugeniy Paltsev wrote:
> This patch is to address a proposal by Andy in this thread:
> http://www.spinics.net/lists/dmaengine/msg10754.html
> Split platform data to actual hardware properties, and platform
or autoconfig registers)
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/core.c| 31 +++---
drivers/dma/dw/platform.c| 42 +---
include/linux/platform_data/dma-dw.h | 20 +++---
Commit 0d4cb44da6ca0e8 ("dmaengine: dmatest: Add support for
scatter-gather DMA mode") changes default "dmatest" behavior by
changing default mode from "memcpy" to "scatter-gather".
Now "memcpy" gets back as default mode.
Signed-off-by: Eugeniy P
On Fri, 2016-08-19 at 17:39 +0300, Andy Shevchenko wrote:
> On Tue, 2016-08-16 at 14:31 +0300, Eugeniy Paltsev wrote:
> >
> > DW DMAC on ARC SDP became broken after df5c7386 ("dmaengine: dw:
> > some
> > Intel
> > devices has no memcpy support") and 3
t;1" for ARM.
I am wondering, if it was done for any special reason?
Otherwise, set max ULP for "cos (M_PI_6l * 2.0) == 0.5" test to
"1" instead of "0" for ARC.
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
test/math/libm-test-ulps-arc |
On Mon, 2016-08-15 at 15:41 +0300, Andy Shevchenko wrote:
> On Mon, 2016-08-15 at 11:10 +0000, Eugeniy Paltsev wrote:
> >
> > On Fri, 2016-08-12 at 17:08 +0300, Andy Shevchenko wrote:
> > >
> > >
> > > >
> > > > >
> > > >
.
This leads to inoperability of DW DMAC.
This patch adds reading missed parameters from device tree.
Note there's a prerequisite http://www.spinics.net/lists/dmaengine/msg10682.html
Signed-off-by: Eugeniy Paltsev <eugeniy.palt...@synopsys.com>
---
drivers/dma/dw/platform.c | 6 ++
1 file
On Fri, 2016-08-12 at 13:59 +0300, Andy Shevchenko wrote:
> On Fri, 2016-08-12 at 08:03 +0000, Eugeniy Paltsev wrote:
> >
> > Hi,
> >
> > "nollp" parameter defines if DW DMAC channel supports multi block
> > transfer or not.
> >
> >
Hi,
"nollp" parameter defines if DW DMAC channel supports multi block
transfer or not.
It is calculated in runtime, but differently depending on on
availability of pdata. If pdata is absent "nollp" is calculated using
autoconfig hardware registers. Otherwise "nollp" is calculated using
the next
dmatest on ARC SDP with DW DMAC became broken after df5c7386
("dmaengine: dw: some Intel devices has no memcpy support") and
30cb2639 ("dmaengine: dw: don't override platform data with autocfg")
commits.
* After df5c7386 commit "DMA_MEMCPY" capability option doesn't
get set correctly in platform
Hi,
Not every time. For example, last time I debug mmap3 LTP's test, which
stuck in "D" state, I didn't recieve any messages until I enabled this
option. This happends on nsim 700.
On Thu, 2016-07-21 at 09:17 -0700, Vineet Gupta wrote:
> On 07/21/2016 07:52 AM, Eugeniy
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