On Wed, Jan 25, 2017 at 06:34:17PM +0300, Eugeniy Paltsev wrote:
> This patch adds support for the DW AXI DMAC controller.
>
> DW AXI DMAC is a part of upcoming development board from Synopsys.
How different is AXI from DW Synopsys?
Is the spec publicly available?
> +config AXI_DW_DMAC
> +
On Tue, Oct 18, 2016 at 11:14:08AM -0700, Dave Jiang wrote:
> On 09/15/2016 08:48 AM, Vinod Koul wrote:
> > On Wed, Sep 14, 2016 at 08:40:38PM +0300, Eugeniy Paltsev wrote:
> >> Commit 0d4cb44da6ca0e8 ("dmaengine: dmatest: Add support for
> >> scatter-gather DMA
On Mon, Nov 21, 2016 at 12:37:06PM +0200, Andy Shevchenko wrote:
> On Mon, 2016-11-21 at 10:02 +, Alexey Brodkin wrote:
> > Hi Andy,
> >
> > On Fri, 2016-11-18 at 21:26 +0200, Andy Shevchenko wrote:
> > > On Fri, 2016-11-18 at 22:12 +0300, Eugeniy Paltsev wrote:
> > > >
> > > > It wasn't
On Fri, Nov 18, 2016 at 09:33:13PM +0200, Andy Shevchenko wrote:
> > @@ -1569,7 +1569,7 @@ int dw_dma_probe(struct dw_dma_chip *chip)
> > (dwc_params >> DWC_PARAMS_MBLK_EN &
> > 0x1) == 0;
> > } else {
> > dwc->block_size =
On Fri, Nov 25, 2016 at 05:59:05PM +0300, Eugeniy Paltsev wrote:
> It wasn't possible to enable some features like
> memory-to-memory transfers or multi block transfers via DT.
> It is fixed by these patches.
Applied after adding substem name tag.
--
~Vinod
On Tue, Feb 21, 2017 at 11:38:04PM +0300, Eugeniy Paltsev wrote:
> +static struct axi_dma_desc *axi_desc_get(struct axi_dma_chan *chan)
> +{
> + struct dw_axi_dma *dw = chan->chip->dw;
> + struct axi_dma_desc *desc;
> + dma_addr_t phys;
> +
> + desc =
On Tue, May 02, 2017 at 03:16:18PM +, Eugeniy Paltsev wrote:
> Hi Vinod,
>
> On Mon, 2017-05-01 at 11:21 +0530, Vinod Koul wrote:
> > On Fri, Apr 28, 2017 at 04:37:46PM +0300, Eugeniy Paltsev wrote:
> > > In the current implementation dma_get_slave_caps is u
On Tue, Mar 06, 2018 at 02:46:13PM +0300, Eugeniy Paltsev wrote:
> This patch series add support for the DW AXI DMAC controller.
>
> DW AXI DMAC is a part of HSDK development board from Synopsys.
>
> In this driver implementation only DMA_MEMCPY transfers
> are supported.
Applied, thanks
--
On Fri, Mar 02, 2018 at 08:32:20AM +, Alexey Brodkin wrote:
> Hi Vinod,
>
> On Fri, 2018-03-02 at 13:44 +0530, Vinod Koul wrote:
> > On Mon, Feb 26, 2018 at 05:56:28PM +0300, Eugeniy Paltsev wrote:
> > > This patch adds documentation of device tree bindings for the S
On Mon, Feb 26, 2018 at 05:56:27PM +0300, Eugeniy Paltsev wrote:
> +/*
> + * Synopsys DesignWare AXI DMA Controller driver.
> + *
> + * Copyright (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
> + * Author: Eugeniy Paltsev
> + *
> + * SPDX-License-Identifier:
On Mon, Feb 26, 2018 at 05:56:28PM +0300, Eugeniy Paltsev wrote:
> This patch adds documentation of device tree bindings for the Synopsys
> DesignWare AXI DMA controller.
>
> Signed-off-by: Eugeniy Paltsev
> ---
> .../devicetree/bindings/dma/snps,dw-axi-dmac.txt
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