Re: [PATCH] arc: Hardcode ARCH_DMA_MINALIGN to max line length we may have

2017-07-18 Thread Vineet Gupta
On 07/18/2017 07:31 AM, Alexey Brodkin wrote: Current implementation relies on L1 line length which might easily be smaller than L2 line (which is usually the case BTW). Imagine this typical case: L2 line is 128 bytes while L1 line is 64-bytes. Now we want to allocate small buffer and later use

[PATCH] arc: Hardcode ARCH_DMA_MINALIGN to max line length we may have

2017-07-18 Thread Alexey Brodkin
Current implementation relies on L1 line length which might easily be smaller than L2 line (which is usually the case BTW). Imagine this typical case: L2 line is 128 bytes while L1 line is 64-bytes. Now we want to allocate small buffer and later use it for DMA (consider IOC is not available).