Hi Hans,
On Sat, Feb 22, 2014 at 08:10:54PM +0100, Hans de Goede wrote:
Since IIRC we have pretty much the same needs for the USB, can't
we just drop the SATA specific mention and use it as the common
DTSI for the usual regulators?
On most boards with sata, there will also be 1 or 2
I saw it - it's an interesting driver. Not sure if it's possible to use it
on our boards, as it seems to be linked to V4L2 differently.
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Hi John,
Yeah, that's what I've figured. Are you sure you're using this support
library right?
Would be much simpler with a snippet of how you use V4L2 in your user app...
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Hi,
On 03/03/2014 10:33 AM, Maxime Ripard wrote:
Hi Hans,
On Sat, Feb 22, 2014 at 08:10:54PM +0100, Hans de Goede wrote:
Since IIRC we have pretty much the same needs for the USB, can't we just
drop the SATA specific mention and use it as the
On 23/02/14 12:32, Hans de Goede wrote:
Hi All,
I've just updated:
https://github.com/linux-sunxi/linux-sunxi/commits/sunxi-devel
to 3.14-rc3.
Boots and works on my cubietruck with a SATA ssd, kvm and openvswitch.
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Hi All.
I have a tablet with touchscreen from Goodix, called GT911. I found a few
versions of driver with Device Tree bindings and want to use it with
linux-sunxi-3.4.
I have datasheet(chinese), but have no expirience to porting or writing
drivers.
Can anyone help me with porting driver to use
Hi Carlo,
On Thu, Feb 27, 2014 at 08:34:20PM +0100, Carlo Caione wrote:
Allwinner A20/A31 SoCs have special registers to control / (un)mask /
acknowledge NMI. This NMI controller is separated and independent from GIC.
This patch adds a new irqchip to manage NMI.
Signed-off-by: Carlo Caione
Hi,
On Thu, Feb 27, 2014 at 08:34:22PM +0100, Carlo Caione wrote:
Added documentation for NMI irqchip.
Signed-off-by: Carlo Caione ca...@caione.org
---
.../allwinner,sun67i-sc-nmi.txt| 27
++
1 file changed, 27 insertions(+)
create mode 100644
Hi,
On Sunday 02 March 2014 12:49 AM, Hans de Goede wrote:
Hi,
On 03/01/2014 06:37 PM, Kishon Vijay Abraham I wrote:
Hi,
On Saturday 01 March 2014 10:39 PM, Hans de Goede wrote:
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers.
Hi Hans,
On Sat, Mar 01, 2014 at 05:32:40PM +0100, Hans de Goede wrote:
On 02/28/2014 05:37 PM, Maxime Ripard wrote:
In order for the DMA controller to work for SDRAM to devices transfers, the
AHB
clock should be reparented on the PLL6.
Force that parenting in the clock driver.
On Mon, Mar 3, 2014 at 12:02 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi,
On Thu, Feb 27, 2014 at 08:34:22PM +0100, Carlo Caione wrote:
Added documentation for NMI irqchip.
Signed-off-by: Carlo Caione ca...@caione.org
---
.../allwinner,sun67i-sc-nmi.txt
Hi All,
I am wondering if Allwinner A10/A13/A20 SoC can support external asynchronous
memory. (8/16 bit Data bus, Address bus, \RD, \WR, \CS)
I don't see information about this in the A20 datasheet.
Is there some software component in sunxi Linux about this?
Pointers are very welcome.
Thanks
On Mon, Mar 03, 2014 at 08:22:14AM -0800, Sergey Kovalev wrote:
Hello!
We'd like to submit new board, it's called PUMA A10s.
Size: credit card
RAM: 512 MB
Storage: single MicroSD slot
Video: HDMI, composite (no LCD as it's too large for credit size board)
Audio: capture/playback 3.5mm
Hi,
On Saturday, February 22, 2014 04:53:34 PM Hans de Goede wrote:
ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence
This commit
http://liliputing.com/2014/03/allwinner-joins-linaro-digital-home-group-commits-open-source-chip-support.html
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Hi All,
I am trying to boot from NAND, and using Allwinner lichee-dev branch, in
the sun5i_a13.h header, there is a section of hard coded environment setup
like this:
81 #define CONFIG_EXTRA_ENV_SETTINGS \
182 bootdelay=3\0 \
183 bootcmd=run setargs boot_normal\0 \
184
Hi,
Since I git pull to lastest version of Linux-Sunxi I can't get a useable
kernel each time it crash with `Unable to handle kernel paging request
at virtual address e020`.
Anyone have an idea.
Thanks !
Full dump:
U-Boot SPL 2014.01-rc1-09157-ge4a0232 (Jan 23 2014 - 20:41:10)
That's not the nand read address; that's the RAM address where the nand
read command stores data read from nand. The last argument (boot,
recovery) is the nand partition name where it's reading data.
This is how an android kernel+initrd is loaded.
On Monday, March 3, 2014 2:42:17 PM UTC-5,
Thanks Patrick,
Does this mean I don't need to change the default 5000 at all?
My intention is to load Linux instead of Android from NAND and following
this sunxi wiki: http://linux-sunxi.org/Installing_to_NAND.
What changes need to be made in the uboot env besides the /dev/nandd -
On Mon, 03 Mar 2014 21:08:00 +0100
Vivien miasm...@gmail.com wrote:
Hi,
Since I git pull to lastest version of Linux-Sunxi I can't get a useable
kernel each time it crash with `Unable to handle kernel paging request
at virtual address e020`.
Anyone have an idea.
Thanks !
Full dump:
This version of uboot loads the entire partition into RAM, not the uImage
file. You need a modified uboot that can be set up more like the one
that's used on SD cards: http://www.cubieforums.com/index.php?topic=511.0
Pat
On Monday, March 3, 2014 4:00:55 PM UTC-5, hunter hu wrote:
Thanks
Videos of the announcement here...
http://www.linaro.org/linaro-blog/2014/03/03/linaro-connect-asia-2014-kicks-off-in-macau/
http://www.prnewswire.com/news-releases/allwinner-joins-linaro-as-a-founding-member-of-the-linaro-digital-home-group-248195871.html
Let's hope this translates to full
Hi Oliver.
I tried this one.
http://linux-sunxi.org/VLChttp://www.google.com/url?q=http%3A%2F%2Flinux-sunxi.org%2FVLCsa=Dsntz=1usg=AFQjCNHashBJDExaaquJaC4ACKzvBYNMqg
But getting lot of error while compiling.
http://linux-sunxi.org/Cedrus
Need to test.
Regarding login issue,
i booted as
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