Hi Boris,
On Tue, Dec 01, 2015 at 12:03:09PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris
On Sun, Nov 22, 2015 at 04:19:50PM -0600, Rob Herring wrote:
> On Sun, Nov 22, 2015 at 04:57:33PM +0100, Hans de Goede wrote:
> > From: Sander Vermin
> >
> > On some devices the wake and enable pins of the pixcir touchscreen
> > controller are connected to gpios and these must
Luc Verhaegen wrote:
>Keep it
Nope, this device is completely useless (at least for me). I already
finished my "review" (a severe warning regarding the board's manufacturer
combined with a few technical details I was able to collect).
On Tue, Dec 01, 2015 at 12:03:14PM +0100, Boris Brezillon wrote:
> mtd_to_nand() now uses the container_of() approach to transform an
> mtd_info pointer into a nand_chip one. Drop useless mtd->priv
> assignments from NAND controller drivers.
>
> Signed-off-by: Boris Brezillon
On Tue, Dec 01, 2015 at 12:03:09PM +0100, Boris Brezillon wrote:
> struct nand_chip now embeds an mtd device. Patch all drivers to make use
> of this mtd instance instead of using the instance embedded in their
> private struct or dynamically allocated.
>
> Signed-off-by: Boris Brezillon
The meminfo example has been corrected to match the Makefile's
"sunxi-meminfo" target, and an example has been added for the
"sunxi-script_extractor" target.
Signed-off-by: Justin Swartz
---
README | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
Script size argument detection: argc should be greater than one,
rather than not equal to zero.
Output loop termination: the index variable should be compared against
the value of the size variable, as opposed to the default SCRIPT_SIZE
definition.
munmap: the mapping returned by mmap, addr,
Signed-off-by: Justin Swartz
---
Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Makefile b/Makefile
index 53d6a0d..df7085a 100644
--- a/Makefile
+++ b/Makefile
@@ -145,6 +145,9 @@ sunxi-bootinfo: bootinfo.c
sunxi-meminfo: meminfo.c
Signed-off-by: Justin Swartz
---
sys_config/a33/inet_d70_a33.fex | 971
1 file changed, 971 insertions(+)
create mode 100644 sys_config/a33/inet_d70_a33.fex
diff --git a/sys_config/a33/inet_d70_a33.fex
The Mali kernel driver allows the userland code to map a buffer
in physical memory (via the MALI_IOC_MEM_MAP_EXT ioctl). This is
normally used for mapping the framebuffer in the userland Mali
blob and directly accessing it for rendering graphics. Because
of security reasons, the kernel driver has
A rather popular problem reported by new users on irc is very
laggy performance out of the box. The default ondemand governor
is too slow to react on increased demand for processing power
without extra tuning. This extra tuning needs extra efforts
from the users and prior knowledge that such
This patch set moves more of the buffer allocation work to CMA.
So that we don't waste RAM unnecessarily and ensure that the
graphics/multimedia drivers (Mali and Cedar) have exactly as
much memory as needed for enabling all the features and optimal
performance.
Or in other words, the kernel
This patch ensures that default configs allow multiple sun4i,
sun5i and sun7i devices boot and work nicely with the same NFS
root. Tested with Cubietruck, Cubieboard2 and A10-Lime.
ROOT_NFS is enabled in sun4i_defconfig. GMAC is enabled in
sun7i_defconfig for Cubietruck support. USB_NET is
Zero-copy buffer swaps can be used in xf86-video-fbturbo for GLES/DRI2
applications only when a certain minimal framebuffer size is available.
In order to make everything easier for the end users, just override
the fb0_framebuffer_num/fb1_framebuffer_num settings from FEX and
increase them when
This allows to get rid of the fragile boot time memory reservation.
Now the amount of required framebuffer memory is calculated at
runtime, depending on the screen resolution (which may come from
FEX or from EDID).
Signed-off-by: Siarhei Siamashka
---
Previously the 80MB memory buffer was allocated from CMA when the
cedar module is loaded and kept in use until the module is removed.
Now the buffer is only allocated when /dev/cedar_dev is opened and
deallocated when it is closed.
Additionally, the kernel cmdline parameter 'sunxi_ve_mem_reserve'
The existing cedar driver code already has a semaphore, but is
only doing some strange and pointless manipulations with it.
Now use this semaphore to actually protect /dev/cedar_dev from
being simultaneously opened by multiple users.
When the cedar driver is already occupied, any new attempts to
There are a bunch of common functions used in the 'mali' and
'ump' modules. In fact, the the source files with these functions
are even symlinked between 'ump' and 'mali' directories since
commit 08084c4f2351a190b53f3f39f5b35b8821cc11e4 ("sunxi: prevent
mali drivers from building every time").
Sometimes people are just forgetting to copy their kernel modules
to the device. Building the Mali kernel driver statically ensures
that people can't make this mistake anymore and removes one of the
potential obstacles on the way to getting 3D accelatation up and
running.
It is also convenient to
Hi Priit Laes,
Thank for the info. Currently we are in the process of sorting out our
documentation. Will update in the http://linux-sunxi.org/New_Device_howto
once it is ready.
Anyway, the regulator used in Pine64 is AXP803 and the Wifi/BT is Realtek
RTL-8273.
Regards,
KH Goh
On Sunday,
Hi Siarhei,
On 02-12-15 03:48, Siarhei Siamashka wrote:
This patch set moves more of the buffer allocation work to CMA.
So that we don't waste RAM unnecessarily and ensure that the
graphics/multimedia drivers (Mali and Cedar) have exactly as
much memory as needed for enabling all the features
Hi,
On Wed, Nov 25, 2015 at 09:22:56AM +0800, Shuge wrote:
> On Monday, November 23, 2015 at 17:32 UTC+8, Maxime Ripard wrote:
> > On Mon, Nov 23, 2015 at 10:51:15PM -0800, Sugar Wu wrote:
> >> On Monday, November 23, 2015 at 8:43:59 PM UTC+8, Maxime Ripard wrote:
> >>>
> >>> Hi,
> >>>
> >>> On
Hi,
Our first production trial run will be some where around end of Jan 2016.
After that, we will reserve 20pcs of the boards for the community.
So, should be able to send the board out on beginning of Feb.
Regards,
KH Goh
On Monday, November 30, 2015 at 12:02:56 AM UTC+8, Luc Verhaegen
https://github.com/igorpecovnik/lib/blob/second/config/linux-sun4i.config
This config that I use for A10 boards.
Dne nedelja, 29. november 2015 09.23.13 UTC+1 je oseba Rudi napisala:
>
> Hi Igor,
>
> (funny to see the same people in different forums ;)
>
> > + upgrade all the way to .110 I can
Hi!
On Mon, Nov 30, 2015 at 02:09:14AM +0800, Vishnu Patekar wrote:
> >> + reg = <0x01c20800 0x400>;
> >> + clocks = <>;
> >> + gpio-controller;
> >> + interrupt-controller;
> >> + #interrupt-cells
On Tue, Dec 01, 2015 at 07:46:01AM +0100, Thomas Kaiser wrote:
> Hi,
>
> currently it's not possible to edit anything in the wiki. Authentication
> problems due to "Warning: Unknown: write failed: No space left on device
> (28) in Unknown on line 0"
>
> Best regards,
Fixed, again.
Luc
Hi,
On Fri, Nov 27, 2015 at 10:42:53PM +0100, Danny Milosavljevic wrote:
> Hi,
>
> I'm trying to use A20 clk_out_a in Linux 4.4-rc1.
>
> I wrote a kernel module in order to enable the clock:
> http://svn.nomike.com/playground/trunk/Navi/TSS463AA/Linux/tss463aa.c
>
> However, it does not work,
Hi,
Will currently in the process of sorting out and finalizing our the
documentation. Once it is ready we will post up the hardware port and pin
assignment. Hopefully it will ready in about 2 Weeks time.
Regards,
KH Goh
On Sunday, November 29, 2015 at 3:12:21 PM UTC+8, Priit Laes wrote:
>
>
Add nand-priv-no-mtd.cocci to detect and correct NAND controller drivers
directly embedding an mtd_info struct in their private struct.
Signed-off-by: Boris Brezillon
Cc: Julia Lawall
---
Hi Julia,
Not sure this is the correct way to
Add a new helper to retrieve the MTD device attached to a NAND chip.
Signed-off-by: Boris Brezillon
---
include/linux/mtd/nand.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index
struct nand_chip now embeds an mtd device. Patch all drivers to make use
of this mtd instance instead of using the instance embedded in their
private struct or dynamically allocated.
Signed-off-by: Boris Brezillon
Cc: Julia Lawall
---
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all ARM specific implementations to use this
helper.
Signed-off-by: Boris Brezillon
---
arch/arm/mach-ep93xx/snappercl15.c | 4 ++--
arch/arm/mach-ep93xx/ts72xx.c
mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all SH specific implementations to use this
helper.
Signed-off-by: Boris Brezillon
---
arch/sh/boards/mach-migor/setup.c | 2 +-
1 file changed, 1 insertion(+), 1
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all MIPS specific implementations to use this
helper.
Signed-off-by: Boris Brezillon
---
arch/mips/alchemy/devboards/db1200.c | 2 +-
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all NAND drivers to use it.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
--->8---
virtual patch
@@
struct nand_chip *c;
Hello,
This huge series aims at clarifying the relationship between the mtd and
nand_chip structures and hiding NAND framework internals to NAND
controller drivers.
The first part of the series provide an mtd_to_nand() helper to hide the
way mtd and nand_chip are linked together.
The second
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all CRIS specific implementations to use this
helper.
Signed-off-by: Boris Brezillon
---
arch/cris/arch-v32/drivers/mach-a3/nandflash.c | 2 +-
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all blackfin specific implementations to use
this helper.
Signed-off-by: Boris Brezillon
---
arch/blackfin/mach-bf537/boards/stamp.c | 2 +-
struct nand_chip now embeds an mtd device, use it instead of allocating
a new one.
Signed-off-by: Boris Brezillon
---
drivers/staging/mt29f_spinand/mt29f_spinand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/ams-delta.c | 6 +--
drivers/mtd/nand/atmel_nand.c| 54 ++---
nand_dt_init() function requires 3 arguments where it actually needs one
(dn and mtd can both be retrieved from chip). Drop these parameters.
Testing for dn != NULL inside nand_dt_init() also helps simplifying the
caller code.
Signed-off-by: Boris Brezillon
mtd_to_nand() was recently introduced to avoid direct access to the
mtd->priv field. Update core code to use mtd_to_nand().
Signed-off-by: Boris Brezillon
---
drivers/mtd/nand/nand_base.c | 84 ++--
mtd_to_nand() now uses the container_of() approach to transform an
mtd_info pointer into a nand_chip one. Drop useless mtd->priv
assignments from NAND controller drivers.
Signed-off-by: Boris Brezillon
---
Patch generated with the following coccinelle script:
The MTD device is now directly embedded in the nand_chip struct. Update the
mtdnand documentation to mention this aspect and fix the different
examples.
Signed-off-by: Boris Brezillon
---
Documentation/DocBook/mtdnand.tmpl | 31 +++
Currently all NAND controller drivers are providing both the mtd_info and
nand_chip struct and then let the NAND subsystem to initialize a few
things before registering the mtd instance to the MTD layer.
Embed an mtd_info field into nand_chip to add some consistency to all NAND
controller drivers.
Now that all drivers are using the mtd instance embedded in the nand_chip
struct we can safely update the mtd_to_nand() implementation to use
the container_of macro instead of returning the content of mtd->priv.
This will allow us to remove mtd->priv = chip assignments done in all
NAND controller
struct nand_chip now embeds an mtd device. Patch all drivers to make use
of this mtd instance instead of using the instance embedded in their
private struct or dynamically allocated.
Signed-off-by: Boris Brezillon
---
Most of those changes were generated with
Add two helpers to access the field reserved for private controller data.
This makes it clearer what this field is reserved for and ease future
refactoring.
Signed-off-by: Boris Brezillon
---
include/linux/mtd/nand.h | 10 ++
1 file changed, 10
Now that the nand_chip struct directly embeds an mtd_info struct we can
get rid of the ->flash_node field and forward set/get_flash_node requests
to the MTD layer.
As a side effect, we no longer need the mtd_set_of_node() call done in
nand_dt_init().
Signed-off-by: Boris Brezillon
New helpers have been added to avoid directly accessing chip->field. Use
them where appropriate.
Signed-off-by: Boris Brezillon
---
drivers/staging/mt29f_spinand/mt29f_spinand.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Use it where appropriate.
Signed-off-by: Boris Brezillon
---
drivers/staging/mt29f_spinand/mt29f_spinand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
On Tue, Dec 1, 2015 at 11:01 PM, Danny Milosavljevic
wrote:
> Hi Maxime,
>
> On Tue, 1 Dec 2015 10:47:37 +0100
> Maxime Ripard wrote:
>> Did you mux the clk_out pin somewhere?
>
> Not manually, no. Is that not done by the sunxi clock
On Wed, 2015-11-25 at 17:50 +0100, Hans de Goede wrote:
> From: Reinder de Haan
>
> Note this commit only adds support for phys 1-3, phy 0, the otg phy,
> is
> not yet (fully) supported after this commit.
>
> Signed-off-by: Reinder de Haan
>
On Mon, Nov 30, 2015 at 11:14:06AM -0600, Rob Herring wrote:
> On Sun, Nov 29, 2015 at 11:03:07AM +0800, Chen-Yu Tsai wrote:
> > This patch adds support for the PRCM apbs clock gates found on the
> > Allwinner A80 SoC.
> >
> > Signed-off-by: Chen-Yu Tsai
>
> Acked-by: Rob Herring
Hi Boris,
[auto build test ERROR on next-20151127]
[cannot apply to mtd/master v4.4-rc3 v4.4-rc2 v4.4-rc1 v4.4-rc3]
url:
https://github.com/0day-ci/linux/commits/Boris-Brezillon/mtd-nand-refactor-the-NAND-subsystem-part-1/20151201-190822
config: arm-imx_v6_v7_defconfig (attached as .config
On Tue, Dec 01, 2015 at 07:54:06PM +0800, Chen-Yu Tsai wrote:
> On Tue, Dec 1, 2015 at 6:04 PM, Maxime Ripard
> wrote:
> > Hi,
> >
> > On Sun, Nov 29, 2015 at 11:03:06AM +0800, Chen-Yu Tsai wrote:
> >> The APBS clock on sun9i is the same as the APB0 clock on
On Tue, Dec 01, 2015 at 01:47:20PM +0800, Chen-Yu Tsai wrote:
> The A80 has a secondary pin controller. Add a device node for it.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
On Tue, Dec 01, 2015 at 01:47:21PM +0800, Chen-Yu Tsai wrote:
> LED3 is connected to pin PM15 on R_PIO.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
--
You
On Tue, 1 Dec 2015, Boris Brezillon wrote:
> Add nand-priv-no-mtd.cocci to detect and correct NAND controller drivers
> directly embedding an mtd_info struct in their private struct.
>
> Signed-off-by: Boris Brezillon
> Cc: Julia Lawall
struct nand_chip now embeds an mtd device. Patch all drivers to make use
of this mtd instance instead of using the instance embedded in their
private struct or dynamically allocated.
Signed-off-by: Boris Brezillon
Cc: Julia Lawall
---
On Sun, Nov 29, 2015 at 11:03:10AM +0800, Chen-Yu Tsai wrote:
> The main (24MHz) clock on the A80 is configurable via the PRCM address
> space. The low power/speed (32kHz) clock is from an external chip, the
> AC100.
>
> Signed-off-by: Chen-Yu Tsai
Applied 4 and 5, thanks!
Maxime
On Mon, Nov 30, 2015 at 11:13:25AM -0600, Rob Herring wrote:
> On Sun, Nov 29, 2015 at 11:03:08AM +0800, Chen-Yu Tsai wrote:
> > The "cpus" clock is the clock for the embedded processor in the A80.
> > It is also part of the PRCM clock tree. This clock includes a pre-
> > divider on one of its
On Tue, Dec 01, 2015 at 01:47:22PM +0800, Chen-Yu Tsai wrote:
> The Allwinner A80 SoC has a consumer IR receiver, which is the same as
> older SoCs.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android
On Tue, Dec 01, 2015 at 01:47:23PM +0800, Chen-Yu Tsai wrote:
> The A80 Optimus board has a consumer IR receiver. Enable it in the DT.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
On Tue, Dec 01, 2015 at 01:47:24PM +0800, Chen-Yu Tsai wrote:
> This patch adds a device node for the Reduced Serial Bus (RSB)
> controller and the defacto pinmux setting to the A80 dtsi.
>
> Since there is only one possible pinmux setting for RSB, just
> set it in the dtsi.
>
> Signed-off-by:
On Tue, Dec 1, 2015 at 6:04 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sun, Nov 29, 2015 at 11:03:06AM +0800, Chen-Yu Tsai wrote:
>> The APBS clock on sun9i is the same as the APB0 clock on sun8i. With
>> sun9i we are supporting the PRCM clocks by using
Hi,
On Tue, 1 Dec 2015 12:17:44 +0100 (CET)
Julia Lawall wrote:
>
>
> On Tue, 1 Dec 2015, Boris Brezillon wrote:
>
> > Add nand-priv-no-mtd.cocci to detect and correct NAND controller drivers
> > directly embedding an mtd_info struct in their private struct.
> >
> >
On Tue, Dec 1, 2015 at 8:50 PM, Maxime Ripard
wrote:
> On Tue, Dec 01, 2015 at 07:54:06PM +0800, Chen-Yu Tsai wrote:
>> On Tue, Dec 1, 2015 at 6:04 PM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> > On Sun, Nov 29, 2015 at
Hi,
I'm having some weird stability issues with my SinA33.
After idling a while (a few hours ~ a day) it becomes non-responsive
and just keeps outputting the same message:
[53418.712180] Task dump for CPU 0:
[53418.715403] cronR running 0 1131 1 0x0003
[53418.721780]
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