From: Siarhei Volkau
sun6i has same registers as sun4i compatible chips, but its position
in register map are different.
This patch make register's position selectable for support sun6i in
next patches.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/pwm-sun4i.c | 57 +++
From: Siarhei Volkau
sun6i has similar control registers bit map in comparison
to sun4i channel 0, but each channel has its own control
register.
This patch make:
- regmap fields declarations selectable,
- enable/disable bitmask selectable.
These things needed for support sun6i in next patches
From: Siarhei Volkau
This is the 4-th version of the sun6i PWM patchset.
Difference between v3 and v4:
- patchset split on many small patches for easier bisect.
- avoid unsafe macros usage.
- some minor cleanups.
First two patches moves register access operations
from custom iomem read-modify
From: Siarhei Volkau
This patch removes macros, which are not use anymore and
fixes two extra -Wsign-compare warnings.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/pwm-sun4i.c | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/p
From: Siarhei Volkau
The patch replaces iomem register access routines to regmap
equivalents.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/Kconfig | 2 +-
drivers/pwm/pwm-sun4i.c | 143
2 files changed, 110 insertions(+), 35 deletions(-)
From: Siarhei Volkau
Signed-off-by: Siarhei Volkau
---
arch/arm/boot/dts/sun6i-a31.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index ee1eb6d..fcba129 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch
From: Siarhei Volkau
This patch replaces a bunch of custom read-modify-write operations
by regmap fields.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/pwm-sun4i.c | 197 ++--
1 file changed, 108 insertions(+), 89 deletions(-)
diff --git a/drivers/p
From: Siarhei Volkau
sun6i have 4 pwm channels onboard. This patch increase
maximal possible count of channels.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/pwm-sun4i.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.
From: Siarhei Volkau
A31 SoC have a different set of prescalers than sun4i
compatible ASoCs, but its position and count in the control
register are the same.
This patch make the table of prescalers customizable.
Signed-off-by: Siarhei Volkau
---
drivers/pwm/pwm-sun4i.c | 9 -
1 file c
From: Siarhei Volkau
This patch introduce the sun6i PWM driver itself:
- sun6i channels register and field map,
- sun6i prescaler table,
- DT bindings for A31 SoC,
- documentation update.
Signed-off-by: Siarhei Volkau
---
.../devicetree/bindings/pwm/pwm-sun4i.txt | 3 +-
drivers/
Hi Emil,
On Thu, Feb 23, 2017 at 05:44:54PM +, Emil Velikov wrote:
> On 22 February 2017 at 15:18, Icenowy Zheng wrote:
> > Allwinner have a new "Display Engine 2.0" in there new SoCs, which comes
> > in a new "Display Engine" (mixers instead of old backends and
> > frontends).
> >
> > Add su
On Wed, Feb 22, 2017 at 01:54:58PM +0800, Icenowy Zheng wrote:
>
> 2017年2月22日 07:03于 Maxime Ripard 写道：
> >
> > Hi,
> >
> > On Sat, Feb 18, 2017 at 01:37:17AM +0800, Icenowy Zheng wrote:
> > > Allwinner R40 SoC have a clock controller module in the style of the
> > > SoCs beyond sun6i, however,
On Thu, Feb 23, 2017 at 04:05:43PM +0800, Chen-Yu Tsai wrote:
> sun4i_crtc controls the backend and tcon hardware blocks of the display
> pipeline. Instead of doing so through the master drm structure, leave
> pointers to the corresponding backend and tcon in itself.
>
> Also drop the drm_device p
On Thu, Feb 23, 2017 at 04:05:38PM +0800, Chen-Yu Tsai wrote:
> The current layer init code keeps a pointer to the primary plane layer
> in sun4i_drv. When we eventually support multiple display pipelines,
> this would force us to keep track of primary planes for all crtcs. And
> these pointers onl
On Thu, Feb 23, 2017 at 04:05:37PM +0800, Chen-Yu Tsai wrote:
> The tcon provides part of the functionality of the crtc, and also
> provides the device node for the output port of the crtc. To be able
> to use drm_of_find_possible_crtcs(), all crtc must be initialized before
> any downstream encode
On Thu, Feb 23, 2017 at 04:05:36PM +0800, Chen-Yu Tsai wrote:
> This patch moves the sun4i_layers_init call from sun4i_drv_bind to
> sun4i_crtc_init, and the layers pointer from struct sun4i_drv to
> struct sun4i_crtc.
>
> The layers are bound to a specific crtc, and they are not directly
> used o
On Thu, Feb 23, 2017 at 04:05:35PM +0800, Chen-Yu Tsai wrote:
> The number of defined planes in sun4i_layer is unknown to other parts
> of the sun4i drm driver. Since the return value of sun4i_layers_init
> is a list of layers, make it return 1 more empty layer as an end of
> list guard value.
>
>
On Thu, Feb 23, 2017 at 04:05:34PM +0800, Chen-Yu Tsai wrote:
> The way drm_of_find_possible_crtcs is it tries to match the
Aren't you missing "works" here ^
> remote-endpoint of the given node's various endpoints to all the
> crtc's .port field. Thus we need to set drm_crtc.port to the outpu
On Thu, Feb 23, 2017 at 04:05:33PM +0800, Chen-Yu Tsai wrote:
> sunxi_rgb2yuv_coef is a table of RGB-to-YUV conversion coefficients.
> They are programmed into the hardware, and can be declared constant.
>
> Reported-by: Priit Laes
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxi
On 22 February 2017 at 15:18, Icenowy Zheng wrote:
> Allwinner have a new "Display Engine 2.0" in there new SoCs, which comes
> in a new "Display Engine" (mixers instead of old backends and
> frontends).
>
> Add support for the mixer on Allwinner V3s SoC; it's the simplest one.
>
> Signed-off-by:
On Fri, Feb 17, 2017 at 6:37 PM, Icenowy Zheng wrote:
> This patchset is an experiment to add R40 support to mainline Linux.
>
> As we have still no user manual for R40, the patchset is developed
> by reading the BSP source code and device tree, educated guess and
> try and error.
Out of curiosi
> drivers/gpu/drm/sun4i/Kconfig | 8 +
> drivers/gpu/drm/sun4i/Makefile | 1 +
> drivers/gpu/drm/sun4i/sun4i_crtc.c | 6 +-
> drivers/gpu/drm/sun4i/sun4i_drv.c | 38 +++-
> drivers/gpu/drm/sun4i/sun4i_drv.h | 1 +
> drivers/gpu/drm/sun4i/sun4i_layer.c | 92 ++--
> dri
To support multiple display pipelines, we would have multiple crtcs,
with one or more planes bound to them. Obviously having hardcoded
values for the drm_plane .possible_crtcs field is not going to work.
For primary and cursor planes, the value is set by
drm_crtc_init_with_planes. We just need to
The tcon provides part of the functionality of the crtc, and also
provides the device node for the output port of the crtc. To be able
to use drm_of_find_possible_crtcs(), all crtc must be initialized before
any downstream encoders. The other part of the crtc is the display
backend.
The Rockchip D
sunxi_rgb2yuv_coef is a table of RGB-to-YUV conversion coefficients.
They are programmed into the hardware, and can be declared constant.
Reported-by: Priit Laes
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
The way drm_of_find_possible_crtcs is it tries to match the
remote-endpoint of the given node's various endpoints to all the
crtc's .port field. Thus we need to set drm_crtc.port to the output
port node of the underlying TCON.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_crtc.c |
The current layer init code keeps a pointer to the primary plane layer
in sun4i_drv. When we eventually support multiple display pipelines,
this would force us to keep track of primary planes for all crtcs. And
these pointers only get used at bind time.
Instead, have the crtc init code iterate thr
sun4i_layer only controls the backend hardware block of the display
pipeline. Instead of getting a pointer to the underlying backend
through the drm_device structure, leave one in itself.
Also drop the drm_device pointer, since it is no longer needed.
The next step forward would be to pass the po
The RGB encoder represents channel 0 of the TCON. Instead of fetching
the pointer to its TCON from the main sun4i_drv structure, pass it in
as part of the init call, save it, and use it directly in the encoder
and connector callbacks.
We can also drop the otherwise unused sun4i_drv pointer.
Signe
This patch moves the sun4i_layers_init call from sun4i_drv_bind to
sun4i_crtc_init, and the layers pointer from struct sun4i_drv to
struct sun4i_crtc.
The layers are bound to a specific crtc, and they are not directly
used once initiated. They are used through their included drm_plane
structures.
Now that the crtcs have their .port field set properly, we can use
drm_of_find_possible_crtcs to find the connected crtcs, instead of
hardcoding the first crtc as usable. The new code also defers binding
when the upstream crtc hasn't been registered yet.
This makes it easier to support multiple tc
Hi Maxime,
This is the second bunch of fixes for the sun4i drm driver. This is part
of the cleanup I am doing towards making the driver support multiple
display pipelines.
This part mainly aims to get detection of crtcs working with of_graph,
and moving data structure pointers around for a more l
The number of defined planes in sun4i_layer is unknown to other parts
of the sun4i drm driver. Since the return value of sun4i_layers_init
is a list of layers, make it return 1 more empty layer as an end of
list guard value.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_layer.c | 2
sun4i_crtc controls the backend and tcon hardware blocks of the display
pipeline. Instead of doing so through the master drm structure, leave
pointers to the corresponding backend and tcon in itself.
Also drop the drm_device pointer, since it is no longer needed.
The next step forward would be to
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