Re: [linux-sunxi] A23 Labeled as A33 !!

On Wed, Mar 29, 2017 at 03:55:54PM -0700, Eyad Majali wrote: > > > > > > Please start by putting the device info in our wiki preferrably with > > pictures. > > > > Just follow http://linux-sunxi.org/New_Device_howto and existing device > > pages. > > > > > > I finished The wiki for this

Re: [linux-sunxi] A23 Labeled as A33 !!

> > Please start by putting the device info in our wiki preferrably with > pictures. > > Just follow http://linux-sunxi.org/New_Device_howto and existing device > pages. > > > I finished The wiki for this tablet http://linux-sunxi.org/ENET_E714F -- You received this message because you

Re: [linux-sunxi] [PATCH v3 06/11] drm/sun4i: add support for Allwinner DE2 mixers

Hi, Dne sreda, 29. marec 2017 ob 21:46:08 CEST je Icenowy Zheng napisal(a): > Allwinner have a new "Display Engine 2.0" in their new SoCs, which comes > with mixers to do graphic processing and feed data to TCON, like the old > backends and frontends. > > Add support for the mixer on Allwinner

[linux-sunxi] [PATCH v3 11/11] [DO NOT MERGE] ARM: dts: sun8i: enable LCD panel of Lichee Pi Zero

From: Icenowy Zheng A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi. This commit connects this panel to Lichee Pi Zero. Lichee Pi also provides a 800x480 panel without accurate model number, so do not merge this patch. It will finally come as device

[linux-sunxi] [PATCH v3 10/11] ARM: dts: sun8i: add pinmux for LCD pins of V3s SoC

From: Icenowy Zheng Allwinner V3s SoC features a set of pins that have functionality of RGB LCD, the pins are at different pin ban than other SoCs. Add pinctrl node for them. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +

[linux-sunxi] [PATCH v3 08/11] drm/sun4i: tcon: add support for V3s TCON

From: Icenowy Zheng Allwinner V3s SoC features a TCON without channel 1. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++- drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 + 2 files changed, 7 insertions(+), 1

[linux-sunxi] [PATCH v3 07/11] drm/sun4i: Add compatible string for V3s display engine

Allwinner V3s features the new "Display Engine 2.0", which can now also be driven with our subdrivers in sun4i-drm. Add the compatible string for in sun4i_drv.c, in order to make the display engine and its components probed. Signed-off-by: Icenowy Zheng --- Patch splited in v3.

[linux-sunxi] [PATCH v3 09/11] ARM: dts: sun8i: add DE2 nodes for V3s SoC

From: Icenowy Zheng Allwinner V3s SoC features a "Display Engine 2.0" with only one TCON which have RGB LCD output. Add device nodes for it as well as the TCON. Signed-off-by: Icenowy Zheng --- Changes in v3: - Change the size of de2_clocks regs according

[linux-sunxi] [PATCH v3 06/11] drm/sun4i: add support for Allwinner DE2 mixers

Allwinner have a new "Display Engine 2.0" in their new SoCs, which comes with mixers to do graphic processing and feed data to TCON, like the old backends and frontends. Add support for the mixer on Allwinner V3s SoC; it's the simplest one. Currently a lot of functions are still missing -- more

[linux-sunxi] [PATCH v3 04/11] drm/sun4i: abstract the layer type

As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm driver, we will finally have two types of layer. Abstract the layer type to void * and a ops struct, which contains the only function used by crtc -- get the drm_plane struct of the layer. Signed-off-by: Icenowy Zheng

[linux-sunxi] [PATCH v3 05/11] drm/sun4i: abstract a mixer type

As we are going to add support for the Allwinner DE2 mixer in sun4i-drm driver, we will finally have two types of display mixers -- the DE1 backend and the DE2 mixer. They both do some display blending and feed graphics data to TCON, so I choose to call them both "mixer" here. Abstract the mixer

[linux-sunxi] [PATCH v3 02/11] clk: sunxi-ng: add support for DE2 CCU

From: Icenowy Zheng The "Display Engine 2.0" in Allwinner newer SoCs contains a clock management unit for its subunits, like the DE CCU in A80. Add a sunxi-ng style driver for it. Signed-off-by: Icenowy Zheng --- Changes in v2: - Rename sunxi-de2-ccu to

[linux-sunxi] [PATCH v3 03/11] dt-bindings: add bindings for DE2 on V3s SoC

From: Icenowy Zheng Allwinner V3s SoC have a display engine which have a different pipeline with older SoCs. Add document for it (new compatibles and the new "mixer" part). The paragraph of TCON is also refactored, for furtherly add TCONs in A83T/H3/A64/H5 that have only a

[linux-sunxi] [PATCH v3 01/11] dt-bindings: add binding for the Allwinner DE2 CCU

From: Icenowy Zheng Allwinner "Display Engine 2.0" contains some clock controls in it. In order to add them as clock drivers, we need a device tree binding. Add the binding here. Signed-off-by: Icenowy Zheng --- Changes in v3: - Fill the address space

[linux-sunxi] [PATCH v3 00/11] Initial Allwinner Display Engine 2.0 Support

This patchset is the initial patchset for Allwinner DE2 support. It contains the support of clocks in DE2 and the mixers in DE2. The SoC used to develop this patchset is V3s, as V3s is the simplest one of the SoCs that have DE2. (Allwinner V3s features only one mixer, although its clock control

Re: [linux-sunxi] A23 Labeled as A33 !!

The SoC ID 0x1661 is a bit peculiar and currently not covered by our > sunxi-tools > (soc_info.c) or uart0-helloworld example. > > It seems to be a less common A23 revision that also requires some special > treatment for SRAM initialization, see e.g. > >

[linux-sunxi] [PATCH] serial: Do not treat the IIR register as a bitfield

It seems that at some point, someone made the assumption that the UART Interrupt ID Register was a bitfield and started to check if certain bits where set. Actually however the register contains interrupt ID's where only the MSB seems to be used singular and the rest share at least one bit. Thus

[linux-sunxi] Re: [PATCH] serial: 8250_dw: Minor code cleanup

Hi, On Wed, Mar 29, 2017 at 10:10 AM, Olliver Schinagl wrote: > Hey Doug, > > On 29-03-17 17:50, Doug Anderson wrote: >> >> Hi, >> >> On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl >> wrote: >>> >>> Commit 424d79183af0 ("serial: 8250_dw: Avoid

[linux-sunxi] [PATCHv2] serial: 8250_dw: Minor code cleanup

Some very minor code cleanups, such as including the bitops header for DW_UART_MCR_SIRE, use the BIT() macro as suggested by checkpatch and removed a white space to match other invocations. Signed-off-by: Olliver Schinagl --- Changes since v1: Split up these non-code

[linux-sunxi] Re: [PATCH] serial: 8250_dw: Minor code cleanup

Hey Doug, On 29-03-17 19:10, Olliver Schinagl wrote: Hey Doug, On 29-03-17 17:50, Doug Anderson wrote: Hi, On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl wrote: Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt") added a bit

[linux-sunxi] Re: [PATCH] serial: 8250_dw: Minor code cleanup

Hey Doug, On 29-03-17 17:50, Doug Anderson wrote: Hi, On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl wrote: Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt") added a bit check with quite a wide mask. To be concise with the

Re: [linux-sunxi] A23 Labeled as A33 !!

Am 29.03.2017 um 13:19 schrieb Eyad Majali: Hi, I have a Q8 Tablet with the Soc clearly labeled A33 Quad core , when I compiled u-boot for A33 it didnt work and showed error initializing dram, but when compiled for A23 it worked correctly , and gave an ID of 0x1661,of course kernel shows the soc

Re: [linux-sunxi] A23 Labeled as A33 !!

Hi, > Could you send out some pictures about your "A33"? > > And if possible, write all strings on the chip here (something like > "ALLWINNER TECH H3 G5039BA 6593") ;-) > > > here's the chip picture https://drive.google.com/file/d/0BzQVVX8cwUqJSXNlRnRDY3RCRzg/view the serial number is :

[linux-sunxi] Re: [PATCH] serial: 8250_dw: Minor code cleanup

Hi, On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl wrote: > Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx > timeout interrupt") > added a bit check with quite a wide mask. To be concise with the other > similar calls in this driver, change it

Re: [linux-sunxi] A23 Labeled as A33 !!

On Wed, Mar 29, 2017 at 04:19:54AM -0700, Eyad Majali wrote: > Hi, > I have a Q8 Tablet with the Soc clearly labeled A33 Quad core , when I > compiled u-boot for A33 it didnt work and showed error initializing dram, > but when compiled for A23 it worked correctly , and gave an ID of 0x1661,of >

[linux-sunxi] Re: [PATCH v3 2/5] clk: sunxi-ng: add support for PRCM CCUs

On Wed, 29 Mar 2017 18:42:43 +0800 Icenowy Zheng wrote: > From: Icenowy Zheng > > SoCs after A31 has a clock controller module in the PRCM part. > > Support the clock controller module on H3/5 and A64 now. > > Signed-off-by: Icenowy Zheng

Re: [linux-sunxi] A23 Labeled as A33 !!

On Wed, 29 Mar 2017 05:53:10 -0700 (PDT) Eyad Majali wrote: > Hi, > the chip has A33 Quad core printed on it!! also the box label says > quad core , my problem is the chip itself labeled a33 Could you send out some pictures about your "A33"? And if possible, write all

Re: [linux-sunxi] [PATCH 06/17] tools: mksunxiboot: allow larger SPL binaries

Hi Olliver, thanks for having a look. On 29/03/17 15:43, Olliver Schinagl wrote: > Hey Andre, > > On 01-03-17 03:25, Andre Przywara wrote: >> mksunxiboot limits the size of the resulting SPL binaries to pretty >> conservative values to cover all SoCs and all boot media (NAND). >> It turns out

Re: [linux-sunxi] [PATCH 06/17] tools: mksunxiboot: allow larger SPL binaries

Hey Andre, On 01-03-17 03:25, Andre Przywara wrote: mksunxiboot limits the size of the resulting SPL binaries to pretty conservative values to cover all SoCs and all boot media (NAND). It turns out that we have limit checks in place in the build process, so mksunxiboot can be relaxed and allow

Re: [linux-sunxi] A23 Labeled as A33 !!

Hi, the chip has A33 Quad core printed on it!! also the box label says quad core , my problem is the chip itself labeled a33 On Wednesday, March 29, 2017 at 2:49:20 PM UTC+2, Michal Suchanek wrote: > > Hello, > > On 29 March 2017 at 13:19, Eyad Majali > wrote: > > Hi, >

Re: [linux-sunxi] A23 Labeled as A33 !!

Hello, On 29 March 2017 at 13:19, Eyad Majali wrote: > Hi, > I have a Q8 Tablet with the Soc clearly labeled A33 Quad core , when I > compiled u-boot for A33 it didnt work and showed error initializing dram, > but when compiled for A23 it worked correctly , and gave an ID

[linux-sunxi] Re: [PATCH v2 14/18] sunxi: Pine64: defconfig: enable SPL FIT support

On Wed, Mar 29, 2017 at 12:17:31PM +0100, Andre Przywara wrote: > Hi, > > On 29/03/17 07:57, Maxime Ripard wrote: > > On Tue, Mar 28, 2017 at 01:45:22AM +0100, Andre Przywara wrote: > >> The Pine64 (and all other 64-bit Allwinner boards) need to load an > >> ARM Trusted Firmware image beside the

[linux-sunxi] Re: [PATCH 7/15] dt-bindings: display: sun4i: Add allwinner,tcon-channel property

On Tue, Mar 28, 2017 at 06:05:08PM +0800, Icenowy Zheng wrote: > > 2017年3月27日 上午5:11于 Maxime Ripard 写道： > > > > On Fri, Mar 17, 2017 at 11:34:45AM +0800, Chen-Yu Tsai wrote: > > > On Thu, Mar 16, 2017 at 1:37 AM, Rob Herring wrote: > > > > On

Re: [linux-sunxi] About the thermal sensor driver on H3/A64/H5

On Wed, Mar 29, 2017 at 03:18:43AM +0800, Icenowy Zheng wrote: > > 2017年3月29日 上午3:14于 Vincent Legoll 写道： > > > > Hello, > > > > On Tue, Mar 28, 2017 at 6:40 PM, Icenowy Zheng wrote: > > > I'm trying to do a mainlinable thermal driver for H3/A64/H5 SoCs;

[linux-sunxi] Re: [PATCH v2 14/18] sunxi: Pine64: defconfig: enable SPL FIT support

2017年3月29日 19:17于 Andre Przywara 写道： > > Hi, > > On 29/03/17 07:57, Maxime Ripard wrote: > > On Tue, Mar 28, 2017 at 01:45:22AM +0100, Andre Przywara wrote: > >> The Pine64 (and all other 64-bit Allwinner boards) need to load an > >> ARM Trusted Firmware image beside

[linux-sunxi] A23 Labeled as A33 !!

Hi, I have a Q8 Tablet with the Soc clearly labeled A33 Quad core , when I compiled u-boot for A33 it didnt work and showed error initializing dram, but when compiled for A23 it worked correctly , and gave an ID of 0x1661,of course kernel shows the soc as A23 (two cpus), on the stock android the

[linux-sunxi] Re: [PATCH v2 14/18] sunxi: Pine64: defconfig: enable SPL FIT support

Hi, On 29/03/17 07:57, Maxime Ripard wrote: > On Tue, Mar 28, 2017 at 01:45:22AM +0100, Andre Przywara wrote: >> The Pine64 (and all other 64-bit Allwinner boards) need to load an >> ARM Trusted Firmware image beside the actual U-Boot proper. >> This can now be easily achieved by using the just

[linux-sunxi] [PATCH v3 5/5] arm64: allwinner: a64: add R_PIO pinctrl node

From: Icenowy Zheng Allwinner A64 have a dedicated pin controller to manage the PL pin bank. As the driver and the required clock support are added, add the device node for it. Signed-off-by: Icenowy Zheng --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi |

[linux-sunxi] [PATCH v3 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs

From: Icenowy Zheng Many Allwinner SoCs after A31 have a CCU in PRCM block. Give the ones on H3 and A64 compatible strings. Signed-off-by: Icenowy Zheng --- Changes in v3: - Removed frequency info of iosc in this device tree binding document. Changes in v2:

[linux-sunxi] [PATCH v3 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

From: Icenowy Zheng Now we have driver for the PRCM CCU, switch to use it instead of old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . The mux 3 of R_CCU is still the internal oscillator, which is said to be 16MHz plus minus 30%, and get a measured value of

[linux-sunxi] [PATCH v3 3/5] arm64: allwinner: a64: add r_ccu node

From: Icenowy Zheng A64 SoC have a CCU (r_ccu) in PRCM block. Add the device node for it. The mux 3 of R_CCU is an internal oscillator, which is 16MHz according to the user manual, and has only 30% accuracy based on our experience on older SoCs. The real mesaured value of it

[linux-sunxi] [PATCH v3 2/5] clk: sunxi-ng: add support for PRCM CCUs

From: Icenowy Zheng SoCs after A31 has a clock controller module in the PRCM part. Support the clock controller module on H3/5 and A64 now. Signed-off-by: Icenowy Zheng --- Changes in v3: - Change osc32000 mux to iosc, as its frequency varies between SoCs.

[linux-sunxi] [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs

Allwinner SoCs after sun6i-a31 nearly all have a R_CCU in PRCM part. (V3s and R40 do not have it, as they have even no PRCM) This patch adds support for the ones on H3/A64. Some clock/reset values are reserved for easier extending the support to A31/A23, but for this I think some changes to the

[linux-sunxi] [PATCH] serial: 8250_dw: Minor code cleanup

Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt") added a bit check with quite a wide mask. To be concise with the other similar calls in this driver, change it to mask against the flag we want to check only. This thus removes a magic value/mask. Some

[linux-sunxi] Re: [PATCH v2] serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt

Hey Andy, On 29-03-17 11:11, Andy Shevchenko wrote: On Wed, Mar 29, 2017 at 10:58 AM, Olliver Schinagl wrote: On 07-02-17 00:30, Douglas Anderson wrote: First of all I didn't get why people from Cc list are suddenly disappeared. Check your mail client settings. Returning

[linux-sunxi] Re: [PATCH v3 05/11] Documentation: DT: bindings: input: touschcreen: remove sun4i documentation

On Tue, 21 Mar 2017, Quentin Schulz wrote: > This patch removes the sun4i touchscreen controller binding > documentation since it has been merged with the sun4i GPADC binding > documentation. > > Signed-off-by: Quentin Schulz > Acked-by: Rob Herring

[linux-sunxi] Re: [PATCH 1/2] drm/sun4i: Add display backend interrupt to device tree binding

On Mon, Mar 27, 2017 at 10:38:46PM +0800, Chen-Yu Tsai wrote: > The display backend has an interrupt line. Add it to the device tree > binding. > > Signed-off-by: Chen-Yu Tsai The patches prefix for the binding documentation is usually dt-bindings: I've changed that and applied

[linux-sunxi] Re: [PATCH v2 14/18] sunxi: Pine64: defconfig: enable SPL FIT support

2017年3月29日 14:57于 Maxime Ripard 写道： > > On Tue, Mar 28, 2017 at 01:45:22AM +0100, Andre Przywara wrote: > > The Pine64 (and all other 64-bit Allwinner boards) need to load an > > ARM Trusted Firmware image beside the actual U-Boot proper. > > This can now be

[linux-sunxi] Re: [PATCH v2 14/18] sunxi: Pine64: defconfig: enable SPL FIT support

On Tue, Mar 28, 2017 at 01:45:22AM +0100, Andre Przywara wrote: > The Pine64 (and all other 64-bit Allwinner boards) need to load an > ARM Trusted Firmware image beside the actual U-Boot proper. > This can now be easily achieved by using the just extended SPL FIT > loading support, so enable it in

[linux-sunxi] Re: [PATCH v3 3/6] sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs

On Mon, Mar 27, 2017 at 07:22:31PM +0200, Jernej Skrabec wrote: > This is needed for HDMI, which will be added later. > > Signed-off-by: Jernej Skrabec > Reviewed-by: Simon Glass Acked-by: Maxime Ripard Thanks!