Re: [linux-sunxi] Re: [PATCH v6 2/9] irqchip/sunxi-nmi: add support for the NMI in A64 R_INTC

Hi Marc, On Mon, May 22, 2017 at 10:25 PM, Chen-Yu Tsai wrote: > On Mon, May 22, 2017 at 5:41 PM, Icenowy Zheng wrote: >> >> >> 于 2017年5月22日 GMT+08:00 下午5:39:22, Marc Zyngier 写到: >>>On 18/05/17 08:16, Icenowy Zheng wrote: Add support

[linux-sunxi] [PATCH 1/2] ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros

Now that the R_CCU device tree binding headers have been merged, we can convert the raw number references in the device trees to use the defined macros. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 8 +--- 1 file changed, 5 insertions(+), 3

[linux-sunxi] [PATCH 0/2] ARM/arm64: sunxi: convert CCU raw numbers to macros

Hi Maxime, These are some clean up patches for 4.12. They convert raw number references for the CCU and R_CCU nodes, from when the CCU/R_CCU stuff was first added, to the defined macros in the device tree header files. These affect the A64 and H3/H5. These are based on our sunxi/fixes-for-4.12

[linux-sunxi] [PATCH 2/2] arm64: allwinner: a64: Convert CCU raw number references to macros

The A64 device tree file has some remnants of raw number references to the CCU node, likely from when the CCU bindings and device tree changes were first merged. Convert these, and the R_CCU ones, to use the proper defined macros from their respective device tree binding header files.

[linux-sunxi] Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

Hi Icenowy, [auto build test ERROR on next-20170602] [cannot apply to mripard/sunxi/for-next robh/for-next clk/clk-next v4.9-rc8 v4.9-rc7 v4.9-rc6 v4.12-rc3] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

[linux-sunxi] Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

于 2017年6月5日 GMT+08:00 上午2:46:24, "Jernej Škrabec" 写到: >Hi, > >Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng >napisal(a): >> From: Icenowy Zheng >> >> Allwinner H3 has two special TCONs, both come without channel0. And >the >> TCON1 of

[linux-sunxi] Re: [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

Hi, Dne nedelja, 04. junij 2017 ob 18:01:42 CEST je Icenowy Zheng napisal(a): > From: Icenowy Zheng > > Allwinner H3 has two special TCONs, both come without channel0. And the > TCON1 of H3 has no special clocks even for the channel1. > > Add support for these kinds of TCON.

[linux-sunxi] [PATCH] net-next: stmmac: dwmac-sun8i: ensure the EPHY is properly reseted

The EPHY may be already enabled by bootloaders which have Ethernet capability (e.g. current U-Boot). Thus it should be reseted properly before doing the enabling sequence in the dwmac-sun8i driver, otherwise the EMAC reset process may fail if no cable is plugged, and then fail the dwmac-sun8i

[linux-sunxi] [PATCH v2 11/11] [DO NOT MERGE] ARM: sun8i: h3: enable TV output on Orange Pi PC

Orange Pi PC features a 3.5mm jack with TV output in it. Enable the TV output. As it currently do not have jack detection feature, do not merge this patch. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 12 1 file changed, 12

[linux-sunxi] [PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

Allwinner H3 features a TV encoder similar to the one in earlier SoCs, but has a internal fixed clock divider that divides the TCON1 clock (called TVE clock in datasheet) by 11. Add support for it. Signed-off-by: Icenowy Zheng --- Changes in v2: - Quirk part rewritten.

[linux-sunxi] [PATCH v2 08/11] clk: sunxi-ng: allow CLK_DE to set CLK_PLL_DE for H3

Allwinner H3 features a PLL named CLK_PLL_DE, and a mod clock for the "Display Engine 2.0" named CLK_DE. As the name indicated, the CLK_PLL_DE is a PLL for CLK_DE. Only CLK_DE and CLK_TVE have a parent of CLK_PLL_DE, and CLK_TVE is also one part of the display clocks. So allow CLK_DE to set

[linux-sunxi] [PATCH v2 10/11] ARM: sun8i: h3: add display engine pipeline for TVE

As we have already the support for the TV encoder on Allwinner H3, add the display engine pipeline device tree nodes to its DTSI file. The H5 pipeline has some differences and will be enabled later. The currently-unused mixer0 and tcon0 are also needed, for the completement of the pipeline.

[linux-sunxi] [PATCH v2 09/11] clk: sunxi-ng: export CLK_PLL_DE for H3

The CLK_PLL_DE is needed to be referenced in device tree for H3, for both forcing the parent of PLL_DE. So export it to the device tree binding header. Signed-off-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-h3.h | 3 +-- include/dt-bindings/clock/sun8i-h3-ccu.h |

[linux-sunxi] [PATCH v2 06/11] drm: sun4i: add color space correction support for DE2 mixer

The DE2 mixer can do color space correction needed by TV Encoder with its DCSC sub-engine. Add support for it. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 35 +++ drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 +- 2

[linux-sunxi] [PATCH v2 05/11] drm: sun4i: add compatible for H3 display engine

Add a compatible string for H3 display engine in sun4i_drv code. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index

[linux-sunxi] [PATCH v2 01/11] dt-bindings: update the binding for Allwinner H3 TVE support

Allwinner H3 features a "DE2.0" and a TV Encoder. Add device tree bindings for the following parts: - H3 TCONs - H3 Mixers - The connection between H3 TCONs and H3 Mixers - H3 TV Encoder - H3 Display engine Signed-off-by: Icenowy Zheng --- Changes in v2: - Changed endpoint reg

[linux-sunxi] [PATCH v2 02/11] drm: sun4i: add support for H3 mixers

From: Icenowy Zheng Allwinner H3 SoC has two mixers, one has 1 VI channel and 3 UI channels, and the other has 1 VI and 1 UI. Add support for these two variants. Signed-off-by: Icenowy Zheng --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 18 ++

[linux-sunxi] [PATCH v2 04/11] drm: sun4i: add support for H3's TCON0/1

From: Icenowy Zheng Allwinner H3 has two special TCONs, both come without channel0. And the TCON1 of H3 has no special clocks even for the channel1. Add support for these kinds of TCON. Signed-off-by: Icenowy Zheng --- Changes in v2: - Merged TCON0 and TCON1

[linux-sunxi] [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

Some SoC's DE2 has two mixers. Defaultly the mixer0 is connected to tcon0 and mixer1 is connected to tcon1; however by setting a bit the connection can be swapped. As we now hardcode the default connection, ignore the bonus endpoint for the mixer's output and the TCON's input, as they stands for

[linux-sunxi] [PATCH v2 00/11] Support for H3 Composite Output support

Allwinner H3 SoC features a TV Encoder like the one in Allwinner A13, which can only output TV Composite signal. The display pipeline of H3 is also special -- it has two mixers and two TCONs, of which the connection can be swapped. The TCONs do not have channel 0 (as they are all connected to

Re: [linux-sunxi] Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

在 2017-05-24 15:30，Maxime Ripard 写道： On Tue, May 23, 2017 at 09:00:59PM +0800, icen...@aosc.io wrote: 在 2017-05-23 20:53，Maxime Ripard 写道： > On Mon, May 22, 2017 at 07:55:56PM +0200, Jernej Škrabec wrote: > > Hi, > > > > Dne sobota, 20. maj 2017 ob 03:37:53 CEST je Chen-Yu Tsai napisal(a): > >

[linux-sunxi] Re: [RFC PATCH 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

在 2017-05-24 16:14，Maxime Ripard 写道： On Sat, May 20, 2017 at 02:00:22AM +0800, Icenowy Zheng wrote: 于 2017年5月20日 GMT+08:00 上午1:57:53, Maxime Ripard 写到: >On Thu, May 18, 2017 at 12:43:46AM +0800, Icenowy Zheng wrote: >> Some SoC's DE2 has two mixers.