On Sat, Jul 29, 2017 at 10:17 PM, wrote:
> From: Marcus Cooper
>
> The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
> Add the functionality to adjust the division values according to the
> needs to the device being used.
>
>
On Sat, Jul 29, 2017 at 10:17 PM, wrote:
> From: Marcus Cooper
>
> In preparation for the changes required to support newer SoCs then
typo?
> quirks has been moved and also added to the
On Tue, Aug 1, 2017 at 12:50 AM, Jernej Škrabec wrote:
> Hi Chen-Yu,
>
> Dne ponedeljek, 31. julij 2017 ob 07:13:34 CEST je Chen-Yu Tsai napisal(a):
>> Hi Jernej,
>>
>> On Mon, Jul 31, 2017 at 12:41 AM, Jernej Skrabec
>>
>> wrote:
>> > During
From: Julia Lawall
Date: Sat, 29 Jul 2017 17:54:10 +0200 (CEST)
> Make sure (of/i2c/platform)_device_id tables are NULL terminated
>
> Generated by: scripts/coccinelle/misc/of_table.cocci
>
> Fixes: d5dbe1976d52 ("net-next: stmmac: dwmac-sun8i: choose internal PHY via
>
Hi Chen-Yu,
Dne ponedeljek, 31. julij 2017 ob 07:02:18 CEST je Chen-Yu Tsai napisal(a):
> On Mon, Jul 31, 2017 at 12:41 AM, Jernej Skrabec
>
> wrote:
> > Currently ccu_frac_helper_set_rate() doesn't wait for a lock bit to be
> > set before returning. Because of that,
Hi Chen-Yu,
Dne ponedeljek, 31. julij 2017 ob 07:13:34 CEST je Chen-Yu Tsai napisal(a):
> Hi Jernej,
>
> On Mon, Jul 31, 2017 at 12:41 AM, Jernej Skrabec
>
> wrote:
> > During development of H3 HDMI driver, I found some issues with
> > setting video clock rate. It
On 31 July 2017 at 09:05, Olliver Schinagl wrote:
> Hey Marcus,
>
> On 29-07-17 16:17, codekip...@gmail.com wrote:
>>
>> From: Marcus Cooper
>>
>> Hi All,
>> please find attached a series of patches to bring i2s support to the
>> Allwinner H3 SoC.
On Sun, Jul 30, 2017 at 7:36 AM, Icenowy Zheng wrote:
> The I2C pin functions in R_PIO used to be named "s_twi".
>
> As we usually use the name "i2c" instead of "twi" in the mainline
> kernel, change these names to "s_i2c" for consistency.
>
> The "s_twi" functions are not yet
2017-07-22 4:50 GMT+02:00 Icenowy Zheng :
> R40 is said to be an upgrade of A20, and its pin configuration is also
> similar to A20 (and thus similar to A10).
>
> Add support for R40 to the A10 pinctrl driver.
>
> Signed-off-by: Icenowy Zheng
> Reviewed-by:
On Sat, Jul 22, 2017 at 4:50 AM, Icenowy Zheng wrote:
> The PH16 pin has a function with mux id 0x5, which is the DET pin of the
> "sim" (smart card reader) IP block.
>
> This function is missing in old versions of A10/A20 SoCs' datasheets and
> user manuals, so it's also
On Sun, Jul 30, 2017 at 7:26 AM, wrote:
> 在 2017-07-22 10:50,Icenowy Zheng 写道:
>>
>> This patchset contains only two patches.
>>
>> The first one is a minor fix for the A10 pinctrl driver, add a function
>> of a pin, which used to be missing in A10/A20 pinctrl driver. Thanks for
On Sat, Jul 29, 2017 at 2:48 PM, Corentin Labbe
wrote:
> On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
>> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
>> > On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
>> I've probably asked this
On Sun, Jul 30, 2017 at 1:36 PM, Icenowy Zheng wrote:
> The I2C pin functions in R_PIO used to be named "s_twi".
>
> As we usually use the name "i2c" instead of "twi" in the mainline
> kernel, change these names to "s_i2c" for consistency.
>
> The "s_twi" functions are not yet
()On Mon, Jul 31, 2017 at 12:41 AM, Jernej Skrabec
wrote:
> ccu_frac_helper_read_rate() prints some info which is not really
> helpful except during debugging.
>
> Replace printk() with pr_debug().
>
> Signed-off-by: Jernej Skrabec
Queued as a
Hey Marcus,
On 29-07-17 16:17, codekip...@gmail.com wrote:
From: Marcus Cooper
Hi All,
please find attached a series of patches to bring i2s support to the
Allwinner H3 SoC. This has been tested with the following setups:
A20 Olimex EVB connected to a pcm5102
But
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