Lime2 has battery connector so enable these supplies.
Signed-off-by: Priit Laes
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index
Allwinner A64 and H6 use the Sun4i SPDIF driver.
Enable this to allow a proper support.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index b535f0f412cc..de5b65d45311
Allwinner H6 has a different bit to flush the TX FIFO.
Add a quirks to prepare introduction of H6 SoC.
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-spdif.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/s
The quirks are actually defines in the middle of the file with
short explanation.
Move this at the top and add a section to have coherency with
sun4i-i2s.
Signed-off-by: Clément Péron
Acked-by: Maxime Ripard
---
sound/soc/sunxi/sun4i-spdif.c | 16 +++-
1 file changed, 11 insertions
*H6 DMA support IS REQUIRED*
Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which
is different from the previous H3 generation and not compatible.
Difference are an increase of fifo sizes, some memory mapping are different
and there is now the possibility to output the master
Allwinner H6 has a different mapping for the fifo register controller.
Actually only the fifo TX bit is used in the drivers.
Use the freshly introduced quirks to make this drivers compatible with
the Allwinner H6.
Signed-off-by: Clément Péron
---
sound/soc/sunxi/sun4i-spdif.c | 22
The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
Only one pinmuxing is available so set it as default.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/
Allwinner H6 has a SPDIF controller with an increase of the fifo
size and a sligher difference in memory mapping compare to H3/A64.
This make it not compatible with the previous generation.
Introduce a specific bindings for H6 SoC.
Signed-off-by: Clément Péron
Reviewed-by: Rob Herring
Acked-by
Beelink GS1 board has a SPDIF out connector, so enable it in
the device-tree.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch/arm64/boo
Hi Clément,
On Mon, May 27, 2019 at 09:30:16PM +0200, verejna wrote:
> Hi Clément,
>
> On Mon, May 27, 2019 at 08:49:59PM +0200, Clément Péron wrote:
> > Hi Ondrej,
> >
> > >
> > > I'm testing on Orange Pi 3.
> > >
> > > With your patches, I get kernel lockup after ~1 minute of use (ssh stops
>
Hi Clément,
On Mon, May 27, 2019 at 08:49:59PM +0200, Clément Péron wrote:
> Hi Ondrej,
>
> >
> > I'm testing on Orange Pi 3.
> >
> > With your patches, I get kernel lockup after ~1 minute of use (ssh stops
> > responding/serial console stops responding). I don't have RC controller to
> > test
>
Hi Ondrej,
On Mon, 27 May 2019 at 19:23, Ondřej Jirman wrote:
>
> Hi Clément,
>
> On Mon, May 27, 2019 at 06:31:17PM +0200, verejna wrote:
> > Hi Clément,
> >
> > On Mon, May 27, 2019 at 04:59:35PM +0200, Clément Péron wrote:
> > > Hi Ondřej,
> > >
> > > On Mon, 27 May 2019 at 15:48, Ondřej Jirma
Hi Clément,
On Mon, May 27, 2019 at 06:31:17PM +0200, verejna wrote:
> Hi Clément,
>
> On Mon, May 27, 2019 at 04:59:35PM +0200, Clément Péron wrote:
> > Hi Ondřej,
> >
> > On Mon, 27 May 2019 at 15:48, Ondřej Jirman wrote:
> > >
> > > Hi Clément,
> > >
> > > On Mon, May 27, 2019 at 12:25:26AM
Hi Clément,
On Mon, May 27, 2019 at 04:59:35PM +0200, Clément Péron wrote:
> Hi Ondřej,
>
> On Mon, 27 May 2019 at 15:48, Ondřej Jirman wrote:
> >
> > Hi Clément,
> >
> > On Mon, May 27, 2019 at 12:25:26AM +0200, Clément Péron wrote:
> > > Hi,
> > >
> > > A64 IR support series[1] pointed out tha
From: Ondrej Jirman
Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable
on-board voltage shifting logic for the DDC bus using a gpio to be able
to access DDC bus. Use ddc-en-gpios property on the hdmi-connector to
model this.
Add binding documentation for optional ddc-en-gpi
From: Icenowy Zheng
The EMAC on Allwinner H6 is just like the one on A64. The "internal PHY" on
H6 is on a co-packaged AC200 chip, and it's not really internal (it's
connected via RMII at PA GPIO bank).
Add support for the Allwinner H6 EMAC in the dwmac-sun8i driver.
Signed-off-by: Icenowy Zhen
From: Ondrej Jirman
Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO
for the DDC bus to be usable.
Add support for hdmi-connector node's optional ddc-en-gpios property to
support this use case.
Signed-off-by: Ondrej Jirman
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 55
From: Ondrej Jirman
Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC
I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high.
This is realized by the ddc-en-gpios property.
Signed-off-by: Ondrej Jirman
---
.../dts/allwinner/sun50i-h6-orangepi-3.dts
From: Ondrej Jirman
This series implements support for Xunlong Orange Pi 3 board.
Unfortunately, this board needs some small driver patches, so I have
split the boards DT patch into chunks that require patches for drivers
in various subsystems.
Suggested merging plan/dependencies:
- stmmac pat
From: Ondrej Jirman
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According
to the phy datasheet, both regulators need to be enabled at the same time,
but we can only specify a single phy-supply in the DT.
This can be achieved by making one regulator depedning on the other via
From: Icenowy Zheng
The PHY selection bit also exists on SoCs without an internal PHY; if it's
set to 1 (internal PHY, default value) then the MAC will not make use of
any PHY such SoCs.
This problem appears when adapting for H6, which has no real internal PHY
(the "internal PHY" on H6 is not on
Hi Ondřej,
On Mon, 27 May 2019 at 15:48, Ondřej Jirman wrote:
>
> Hi Clément,
>
> On Mon, May 27, 2019 at 12:25:26AM +0200, Clément Péron wrote:
> > Hi,
> >
> > A64 IR support series[1] pointed out that an A31 bindings should be
> > introduced.
> >
> > This series introduce the A31 compatible bin
Hi Clément,
On Mon, May 27, 2019 at 12:25:26AM +0200, Clément Péron wrote:
> Hi,
>
> A64 IR support series[1] pointed out that an A31 bindings should be
> introduced.
>
> This series introduce the A31 compatible bindings, then switch it on
> the already existing board.
>
> Finally introduce A64
On Mon, 27 May 2019 at 09:30, Clément Péron wrote:
>
> Hi Marcus,
>
> On Sun, 26 May 2019 at 16:57, wrote:
> >
> > From: Marcus Cooper
> >
> > The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
> > 2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
>
On Mon, May 27, 2019 at 10:20:05AM +0200, Clément Péron wrote:
> Hi Maxime,
>
> On Mon, 27 May 2019 at 09:47, Maxime Ripard wrote:
> >
> > Hi,
> >
> > On Mon, May 27, 2019 at 12:25:28AM +0200, Clément Péron wrote:
> > > Allwiner A31 has a different memory mapping so add the compatible
> > > we wil
Hi,
On Mon, 2019-05-27 at 00:50 +0100, André Przywara wrote:
> On 17/04/2019 12:28, Jagan Teki wrote:
> > On Mon, Apr 15, 2019 at 1:52 PM Paul Kocialkowski
> > wrote:
>
> Hi,
>
> > > Le vendredi 12 avril 2019 à 14:49 +0530, Jagan Teki a écrit :
> > > > On Thu, Mar 14, 2019 at 4:08 PM Paul Kocia
Hi Maxime,
On Mon, 27 May 2019 at 09:47, Maxime Ripard wrote:
>
> Hi,
>
> On Mon, May 27, 2019 at 12:25:28AM +0200, Clément Péron wrote:
> > Allwiner A31 has a different memory mapping so add the compatible
> > we will need it later.
> >
> > Signed-off-by: Clément Péron
> > ---
> > drivers/medi
Hi Maxime,
On Mon, 27 May 2019 at 09:47, Maxime Ripard wrote:
>
> On Mon, May 27, 2019 at 12:25:29AM +0200, Clément Péron wrote:
> > Since A31, memory mapping of the IR driver has changed.
> >
> > Prefer the A31 bindings instead of A13.
> >
> > Signed-off-by: Clément Péron
> > ---
> > arch/arm
On Mon, May 27, 2019 at 12:25:29AM +0200, Clément Péron wrote:
> Since A31, memory mapping of the IR driver has changed.
>
> Prefer the A31 bindings instead of A13.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 2 +-
> arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +-
> a
Hi,
On Mon, May 27, 2019 at 12:25:28AM +0200, Clément Péron wrote:
> Allwiner A31 has a different memory mapping so add the compatible
> we will need it later.
>
> Signed-off-by: Clément Péron
> ---
> drivers/media/rc/sunxi-cir.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/m
Hi Marcus,
On Sun, 26 May 2019 at 16:57, wrote:
>
> From: Marcus Cooper
>
> The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
> 2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
> SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receive
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