Dear Ian,
On Sun, 2014-04-27 at 19:47 +0100, Ian Campbell wrote:
This is the driver for one particular ARM cache controller and not the
one used for the SoC. In any case it does proper start/end handling
only for cache flush operations, not cache invalidate.
Cache invalidate is a
Hi Marek,
On Mon, 2014-04-28 at 07:55 +0200, Marek Vasut wrote:
On Monday, April 28, 2014 at 07:51:49 AM, Chen-Yu Tsai wrote:
On Mon, Apr 28, 2014 at 2:08 AM, Marek Vasut ma...@denx.de wrote:
On Sunday, April 27, 2014 at 05:29:29 PM, Chen-Yu Tsai wrote:
On Sun, Apr 27, 2014 at 11:25 PM,
Hi Ian,
On Thu, 2014-04-24 at 20:14 +0100, Ian Campbell wrote:
On Thu, 2014-04-24 at 17:41 +, Alexey Brodkin wrote:
1. Don't invalidate sizeof(struct dmamacdescr) but only
roundup(sizeof(desc_p-txrx_status), ARCH_DMA_MINALIGN)).
OK. (Although given the realities of the real world
Dear Ian,
On Sat, 2014-04-19 at 14:52 +0100, Ian Campbell wrote:
- /* Invalidate only status field for the following check */
- invalidate_dcache_range((unsigned long)desc_p-txrx_status,
- (unsigned long)desc_p-txrx_status +
-
this
hard-coded item.
Still I haven't tried to execute this on the real board.
Hope to do it soon but I don't expect any issues.
Regards,
Alexey
Reviewed-by: Alexey Brodkin abrod...@synopsys.com
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