[linux-sunxi] Re: [PATCH v2 11/16] arm: dts: sunxi-h3-h5: add support for the thermal sensor in H3 and H5

On 29.01.2018 10:49, Maxime Ripard wrote: Hi, On Mon, Jan 29, 2018 at 12:29:14AM +0100, Philipp Rossak wrote: As we have gained the support for the thermal sensor in H3 and H5, we can now add its device nodes to the device tree. The H3 and H5 share most of its compatible. The compatible

[linux-sunxi] Re: [PATCH v2 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor

On 29.01.2018 10:48, Maxime Ripard wrote: On Mon, Jan 29, 2018 at 12:29:13AM +0100, Philipp Rossak wrote: This patch adds support for the A83T ths sensor. The A83T supports interrupts. The interrupt is configured to update the the sensor values every second. Signed-off-by: Philipp Rossak

[linux-sunxi] [PATCH v2 08/16] iio: adc: sun4i-gpadc-iio: rework: add interrupt support

of sensors and different interrupts for each device the reset of the interrupts need to be done different For the newer sensors is the autosuspend disabled. Signed-off-by: Philipp Rossak <embe...@gmail.com> Acked-by: Jonathan Cameron <jonathan.came...@huawei.com> --- drivers/iio/adc

[linux-sunxi] [PATCH v2 13/16] arm: dts: sun8i: h3: add thermal zone to H3

This patch adds the thermal zones to the H3. We have only one sensor and that is placed in the cpu. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/ar

[linux-sunxi] [PATCH v2 12/16] arm: dts: sun8i: h3: add support for the thermal sensor in H3

This patch adds the missing compatible and the thermal sensor cells. The H3 has one sensor. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/su

[linux-sunxi] [PATCH v2 06/16] iio: adc: sun4i-gpadc-iio: rework: support multiple sensors

of an adc and a thermal sensor. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 36 +++- include/linux/mfd/sun4i-gpadc.h | 3 +++ 2 files changed, 26 insertions(+), 13 deletions(-) diff --git a/drivers/iio/adc/sun4

[linux-sunxi] [PATCH v2 14/16] arm: dts: sun8i: h3: enable H3 sid controller

This patch enables the the sid controller in the H3. It can be used for thermal calibration data. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/bo

[linux-sunxi] [PATCH v2 16/16] arm: dts: sun8i: a83t: add thermal zone to A83T

This patch adds the thermal zones to the A83T. Sensor 0 is located besides the cpu cluster 0. Sensor 1 is located besides cluster 1 and sensor 2 is located besides in the gpu. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 20 +

[linux-sunxi] [PATCH v2 15/16] arm: dts: sun8i: a83t: add support for the thermal sensor in A83T

As we have gained the support for the thermal sensor in A83T, we can now add its device nodes to the device tree. The A83T seems to have a broken IRQ 31, thus we use here IRQ 41. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 8 1 file c

[linux-sunxi] [PATCH v2 11/16] arm: dts: sunxi-h3-h5: add support for the thermal sensor in H3 and H5

As we have gained the support for the thermal sensor in H3 and H5, we can now add its device nodes to the device tree. The H3 and H5 share most of its compatible. The compatible and the thermal sensor cells will be added in an additional patch per device. Signed-off-by: Philipp Rossak <e

[linux-sunxi] [PATCH v2 07/16] iio: adc: sun4i-gpadc-iio: rework: support nvmem calibration data

This patch reworks the driver to support nvmem calibration cells. The driver checks if the nvmem calibration is supported and reads out the nvmem. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 44 +++ 1 file c

[linux-sunxi] [PATCH v2 09/16] iio: adc: sun4i-gpadc-iio: add support for H3 thermal sensor

This patch adds support for the H3 ths sensor. The H3 supports interrupts. The interrupt is configured to update the the sensor values every second. The calibration data is writen at the begin of the init process. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i

[linux-sunxi] [PATCH v2 04/16] iio: adc: sun4i-gpadc-iio: rework: sampling start/end code readout reg

-off-by: Icenowy Zheng <icen...@aosc.io> Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 44 ++- 1 file changed, 39 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc

[linux-sunxi] [PATCH v2 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor

This patch adds support for the A83T ths sensor. The A83T supports interrupts. The interrupt is configured to update the the sensor values every second. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 38 ++ i

[linux-sunxi] [PATCH v2 05/16] iio: adc: sun4i-gpadc-iio: rework: support clocks and reset

. Signed-off-by: Philipp Rossak <embe...@gmail.com> Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/iio/adc/sun4i-gpadc-iio.c | 71 +++ 1 file changed, 71 insertions(+) diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc

[linux-sunxi] [PATCH v2 02/16] arm: config: sunxi_defconfig: enable SUN4I_GPADC

This commit enables the SUN4I_GPADC config option and sets the value to yes. This is needed to enable the ths sensors. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/configs/sunxi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/sunxi_defco

[linux-sunxi] [PATCH v2 00/16] IIO-based thermal sensor driver for Allwinner H3 and A83T SoC

in A33 Philipp Rossak (15): dt-bindings: update the Allwinner GPADC device tree binding for H3 & A83T arm: config: sunxi_defconfig: enable SUN4I_GPADC iio: adc: sun4i-gpadc-iio: rework: sampling start/end code readout reg iio: adc: sun4i-gpadc-iio: rework: support clocks and re

[linux-sunxi] [PATCH v2 03/16] iio: adc: sun4i-gpadc-iio: rename A33-specified registers to contain A33

From: Icenowy Zheng As the H3 SoC, which is also in sun8i line, has totally different register map for the thermal sensor (a cut down version of GPADC), we should rename A23/A33-specified registers to contain A33, in order to prevent obfuscation with H3 registers. Currently

[linux-sunxi] [PATCH v2 01/16] dt-bindings: update the Allwinner GPADC device tree binding for H3 & A83T

and the reset was removed from the CCU. The THS in A83T has a clock that is directly connected and runs with 24 MHz. Update the binding document to cover H3 and A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- .../devicetree/bindings/mfd/sun4i-gpadc.txt

[linux-sunxi] Re: [PATCH 07/16] iio: adc: sun4i-gpadc-iio: rework: support nvmem calibration data

On 28.01.2018 14:52, Icenowy Zheng wrote: 于 2018年1月28日 GMT+08:00 下午9:46:18, Philipp Rossak <embe...@gmail.com> 写到: On 28.01.2018 10:02, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:32 +0100 Philipp Rossak <embe...@gmail.com> wrote: This patch reworks the driver to s

[linux-sunxi] Re: [PATCH 04/16] iio: adc: sun4i-gpadc-iio: rework: sampling start/end code readout reg

On 28.01.2018 14:37, Icenowy Zheng wrote: 于 2018年1月28日 GMT+08:00 下午9:34:17, Philipp Rossak <embe...@gmail.com> 写到: On 28.01.2018 09:43, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:29 +0100 Philipp Rossak <embe...@gmail.com> wrote: For adding newer sensor some

[linux-sunxi] Re: [PATCH 06/16] iio: adc: sun4i-gpadc-iio: rework: support multible sensors

On 28.01.2018 10:08, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:31 +0100 Philipp Rossak <embe...@gmail.com> wrote: multible -> multiple ^^ Ok, I will fix that. For adding newer sensor some basic rework of the code is necessary. This patch reworks the driver to be able

[linux-sunxi] Re: [PATCH 08/16] iio: adc: sun4i-gpadc-iio: rework: add interrupt support

On 28.01.2018 10:06, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:33 +0100 Philipp Rossak <embe...@gmail.com> wrote: This patch rewors the driver to support interrupts for the thermal part of the sensor. This is only available for the newer sensor (currently H3 and A83T). The int

[linux-sunxi] Re: [PATCH 07/16] iio: adc: sun4i-gpadc-iio: rework: support nvmem calibration data

On 28.01.2018 10:02, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:32 +0100 Philipp Rossak <embe...@gmail.com> wrote: This patch reworks the driver to support nvmem calibration cells. The driver checks if the nvmem calibration is supported and reads out the nvmem. At the beg

[linux-sunxi] Re: [PATCH 04/16] iio: adc: sun4i-gpadc-iio: rework: sampling start/end code readout reg

On 28.01.2018 09:43, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:29 +0100 Philipp Rossak <embe...@gmail.com> wrote: For adding newer sensor some basic rework of the code is necessary. This commit reworks the code and allows the sampling start/end code and the position of value r

[linux-sunxi] Re: [PATCH 05/16] iio: adc: sun4i-gpadc-iio: rework: support clocks and reset

On 28.01.2018 09:50, Jonathan Cameron wrote: On Fri, 26 Jan 2018 16:19:30 +0100 Philipp Rossak <embe...@gmail.com> wrote: For adding newer sensor some basic rework of the code is necessary. The SoCs after H3 has newer thermal sensor ADCs, which have two clock inputs (bus clock and sa

Re: [linux-sunxi] [PATCH 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor

On 26.01.2018 18:46, Ondřej Jirman wrote: Hi, On Fri, Jan 26, 2018 at 04:19:35PM +0100, Philipp Rossak wrote: This patch adds support for the A83T ths sensor. The A83T does not support interrupts. This seems to be broken. Though, you use support_irq = true below. And in my tests, IRQ

Re: [linux-sunxi] [PATCH 13/16] arm: dts: sun8i: h3: add thermal zone to H3

On 26.01.2018 17:26, Samuel Holland wrote: On 01/26/18 09:19, Philipp Rossak wrote: This patch adds the thermal zones to the H3. We have only one sensor and that is placed in the cpu. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++

Re: [linux-sunxi] [PATCH 16/16] arm: dts: sun8i: a83t: add thermal zone to A83T

On 26.01.2018 17:25, Samuel Holland wrote: On 01/26/18 09:19, Philipp Rossak wrote: This patch adds the thermal zones to the A83T. Sensor 0 is located in the cpu cluster 0. Sensor 1 is located in cluster 1 and Sensor 3 is located in the gpu. You mention sensor 3 here, but have sensor 2

[linux-sunxi] [PATCH 14/16] arm: dts: sun8i: h3: enable H3 sid controller

This patch enables the the sid controller in the H3. It can be used for thermal calibration data. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/bo

[linux-sunxi] [PATCH 16/16] arm: dts: sun8i: a83t: add thermal zone to A83T

This patch adds the thermal zones to the A83T. Sensor 0 is located in the cpu cluster 0. Sensor 1 is located in cluster 1 and Sensor 3 is located in the gpu. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 20 1 file chang

[linux-sunxi] [PATCH 15/16] arm: dts: sun8i: a83t: add support for the thermal sensor in A83T

As we have gained the support for the thermal sensor in A83T, we can now add its device nodes to the device tree. The A83T seems to have a broken IRQ 31, thus we use here IRQ 41. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 8 1 file c

[linux-sunxi] [PATCH 13/16] arm: dts: sun8i: h3: add thermal zone to H3

This patch adds the thermal zones to the H3. We have only one sensor and that is placed in the cpu. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/ar

[linux-sunxi] [PATCH 12/16] arm: dts: sun8i: h3: add support for the thermal sensor in H3

This patch adds the missing compatible and the thermal sensor cells. The H3 has one sensor. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/su

[linux-sunxi] [PATCH 08/16] iio: adc: sun4i-gpadc-iio: rework: add interrupt support

of sensors and different interrupts for each device the reset of the interrupts need to be done different For the newer sensors is the autosuspend disabled. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 68 +++ i

[linux-sunxi] [PATCH 09/16] iio: adc: sun4i-gpadc-iio: add support for H3 thermal sensor

This patch adds support for the H3 ths sensor. The H3 supports interrupts. The interrupt is configured to update the the sensor values every second. The calibration data is writen at the begin of the init process. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i

[linux-sunxi] [PATCH 11/16] arm: dts: sunxi-h3-h5: add support for the thermal sensor in H3 and H5

As we have gained the support for the thermal sensor in H3 and H5, we can now add its device nodes to the device tree. The H3 and H5 share most of its compatible. The compatible and the thermal sensor cells will be added in an additional patch per device. Signed-off-by: Philipp Rossak <e

[linux-sunxi] [PATCH 07/16] iio: adc: sun4i-gpadc-iio: rework: support nvmem calibration data

This patch reworks the driver to support nvmem calibration cells. The driver checks if the nvmem calibration is supported and reads out the nvmem. At the beginning of the startup process the calibration data is written to the related registers. Signed-off-by: Philipp Rossak <embe...@gmail.

[linux-sunxi] [PATCH 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor

This patch adds support for the A83T ths sensor. The A83T does not support interrupts. This seems to be broken. The calibration data is writen at the begin of the init process. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.

[linux-sunxi] [PATCH 06/16] iio: adc: sun4i-gpadc-iio: rework: support multible sensors

sensor registration and is for each registered sensor indiviual. This makes it able to differntiate the sensors when the value is read from the register. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 36 +++- include/lin

[linux-sunxi] [PATCH 03/16] iio: adc: sun4i-gpadc-iio: rename A33-specified registers to contain A33

From: Icenowy Zheng As the H3 SoC, which is also in sun8i line, has totally different register map for the thermal sensor (a cut down version of GPADC), we should rename A23/A33-specified registers to contain A33, in order to prevent obfuscation with H3 registers. Currently

[linux-sunxi] [PATCH 04/16] iio: adc: sun4i-gpadc-iio: rework: sampling start/end code readout reg

-off-by: Icenowy Zheng <icen...@aosc.io> Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/iio/adc/sun4i-gpadc-iio.c | 87 +++ include/linux/mfd/sun4i-gpadc.h | 19 +++-- 2 files changed, 94 insertions(+), 12 deletions(-) diff --git a

[linux-sunxi] [PATCH 05/16] iio: adc: sun4i-gpadc-iio: rework: support clocks and reset

. Signed-off-by: Philipp Rossak <embe...@gmail.com> Signed-off-by: Icenowy Zheng <icen...@aosc.io> --- drivers/iio/adc/sun4i-gpadc-iio.c | 80 +++ 1 file changed, 80 insertions(+) diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc

[linux-sunxi] [PATCH 02/16] arm: config: sunxi_defconfig: enable SUN4I_GPADC

This commit enables the SUN4I_GPADC config option and sets the value to yes. This is needed to enable the ths sensors. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/configs/sunxi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/sunxi_defco

[linux-sunxi] [PATCH 01/16] dt-bindings: update the Allwinner GPADC device tree binding for H3 & A83T

and the reset was removed from the CCU. The THS in A83T has a clock that is directly connected and runs with 24 MHz. Update the binding document to cover H3 and A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- .../devicetree/bindings/mfd/sun4i-gpadc.txt

[linux-sunxi] [PATCH 00/16] IIO-based thermal sensor driver for Allwinner H3 and A83T SoC

. Regards, Philipp [1]: https://lkml.org/lkml/2017/9/14/317 Icenowy Zheng (1): iio: adc: sun4i-gpadc-iio: rename A33-specified registers to contain A33 Philipp Rossak (15): dt-bindings: update the Allwinner GPADC device tree binding for H3 & A83T arm: config: sunxi_def

[linux-sunxi] Re: [PATCH v3 0/6] arm: sunxi: IR support for A83T

On 05.01.2018 15:59, Maxime Ripard wrote: Hi, On Fri, Jan 05, 2018 at 12:02:53PM +, Sean Young wrote: On Tue, Dec 19, 2017 at 09:07:41AM +0100, Philipp Rossak wrote: This patch series adds support for the sunxi A83T ir module and enhances the sunxi-ir driver. Right now the base clock

[linux-sunxi] [PATCH v3 6/6] arm: dts: sun8i: h3-h8: ir register size should be the whole memory block

The size of the register should be the size of the whole memory block, not just the registers, that are needed. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/su

[linux-sunxi] [PATCH v3 0/6] arm: sunxi: IR support for A83T

ency to clock-frequency Regards, Philipp Philipp Rossak (6): media: rc: update sunxi-ir driver to get base clock frequency from devicetree media: dt: bindings: Update binding documentation for sunxi IR controller arm: dts: sun8i: a83t: Add the cir pin for the A83T arm: dts: sun8i: a83t:

[linux-sunxi] [PATCH v3 1/6] media: rc: update sunxi-ir driver to get base clock frequency from devicetree

, than the default 8 MHz. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/media/rc/sunxi-cir.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c index 97f367b446c4..f500cea228a9

[linux-sunxi] [PATCH v3 4/6] arm: dts: sun8i: a83t: Add support for the cir interface

The cir interface is like on the H3 located at 0x01f02000 and is exactly the same. This patch adds support for the ir interface on the A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff

[linux-sunxi] [PATCH v3 3/6] arm: dts: sun8i: a83t: Add the cir pin for the A83T

The CIR Pin of the A83T is located at PL12. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index de5119a2a91c..06e96d

[linux-sunxi] [PATCH v3 5/6] arm: dts: sun8i: a83t: bananapi-m3: Enable IR controller

The Bananapi M3 has an onboard IR receiver. This enables the onboard IR receiver subnode. Unlike the other IR receivers this one needs a base clock frequency of 300 Hz (3 MHz), to be able to work. Signed-off-by: Philipp Rossak <embe...@gmail.com> Acked-by: Chen-Yu Tsai <w...

[linux-sunxi] [PATCH v3 2/6] media: dt: bindings: Update binding documentation for sunxi IR controller

This patch updates documentation for Device-Tree bindings for sunxi IR controller and adds the new optional property for the base clock frequency. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- Documentation/devicetree/bindings/media/sunxi-ir.txt | 3 +++ 1 file changed, 3 inse

[linux-sunxi] [PATCH v2 3/6] arm: dts: sun8i: a83t: Add the cir pin for the A83T

The CIR Pin of the A83T is located at PL12. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index de5119a2a91c..feffca

[linux-sunxi] [PATCH v2 6/6] arm: dts: sun8i: h3-h8: ir register size should be the whole memory block

The size of the register should be the size of the whole memory block, not just the registers, that are needed. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/su

[linux-sunxi] [PATCH v2 4/6] arm: dts: sun8i: a83t: Add support for the cir interface

The cir interface is like on the H3 located at 0x01f02000 and is exactly the same. This patch adds support for the ir interface on the A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff

[linux-sunxi] [PATCH v2 1/6] media: rc: update sunxi-ir driver to get base clock frequency from devicetree

, than the default 8 MHz. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/media/rc/sunxi-cir.c | 19 +++ 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c index 97f367b446c4..f500cea228a9

[linux-sunxi] [PATCH v2 5/6] arm: dts: sun8i: a83t: bananapi-m3: Enable IR controller

The Bananapi M3 has an onboard IR receiver. This enables the onboard IR receiver subnode. Unlike the other IR receivers this one needs a base clock frequency of 300 Hz (3 MHz), to be able to work. Signed-off-by: Philipp Rossak <embe...@gmail.com> Acked-by: Chen-Yu Tsai <w...

[linux-sunxi] [PATCH v2 0/6] arm: sunxi: IR support for A83T

inal. If the property is not available in the dtb the driver uses the default base clock frequency. * the driver prints out the the selected base clock frequency. * changed devicetree property from base-clk-frequency to clock-frequency Regards, Philipp Philipp Rossak (6): media: rc: update sunx

[linux-sunxi] [PATCH v2 2/6] media: dt: bindings: Update binding documentation for sunxi IR controller

This patch updates documentation for Device-Tree bindings for sunxi IR controller and adds the new optional property for the base clock frequency. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- Documentation/devicetree/bindings/media/sunxi-ir.txt | 3 +++ 1 file changed, 3 inse

[linux-sunxi] Re: [PATCH 1/5] media: rc: update sunxi-ir driver to get base clock frequency from devicetree

Hey Andi, thanks for the feedback. I will fix that in the next version of this patch series! On 18.12.2017 03:44, Andi Shyti wrote: Hi Philipp, just a couple of small nitpicks. + u32 b_clk_freq; [...] + /* Base clock frequency (optional) */ + if

[linux-sunxi] [PATCH v2] ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases

This patch fixes a missing ethernet 0 alisas in the devicetree on the Nanopi M1 Plus. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/ar

[linux-sunxi] Re: [PATCH 1/2] ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases

Sorry! I will fix it! On 18.12.2017 07:45, Maxime Ripard wrote: Hi, On Fri, Dec 15, 2017 at 11:39:00PM +0100, Philipp Rossak wrote: Signed-off-by: Philipp Rossak <embe...@gmail.com> Please add a commit log here. -- You received this message because you are subscribed to the Google

[linux-sunxi] [PATCH 5/5] arm: dts: sun8i: a83t: bananapi-m3: Enable IR controller

The Bananapi M3 has an onboard IR receiver. This enables the onboard IR receiver subnode. Other than the other IR receivers this one needs a base clock frequency of 300 Hz (3 MHz), to be able to work. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t-ba

[linux-sunxi] [PATCH 4/5] arm: dts: sun8i: a83t: Add support for the ir interface

The ir interface is like on the H3 located at 0x01f02000 and is exactly the same. This patch adds support for the ir interface on the A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git

[linux-sunxi] [PATCH 0/5] arm: sunxi: IR support for A83T

@vger.kernel.org/msg123359.html Philipp Rossak (5): media: rc: update sunxi-ir driver to get base clock frequency from devicetree media: dt: bindings: Update binding documentation for sunxi IR controller arm: dts: sun8i: a83t: Add the ir pin for the A83T arm: dts: sun8i: a83t: Add

[linux-sunxi] [PATCH 1/5] media: rc: update sunxi-ir driver to get base clock frequency from devicetree

the default 8 MHz. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- drivers/media/rc/sunxi-cir.c | 20 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c index 97f367b446c4..9bbe55a76860

[linux-sunxi] [PATCH 2/5] media: dt: bindings: Update binding documentation for sunxi IR controller

This patch updates documentation for Device-Tree bindings for sunxi IR controller and adds the new optional property for the base clock frequency. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- Documentation/devicetree/bindings/media/sunxi-ir.txt | 2 ++ 1 file changed, 2 inse

[linux-sunxi] [PATCH 3/5] arm: dts: sun8i: a83t: Add the ir pin for the A83T

The CIR Pin of the A83T is located at PL12. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index a384b766f3dc..954c23

[linux-sunxi] Re: [RFC 1/5] [media] rc: update sunxi-ir driver to get base frequency from devicetree

:49:10 +0100 Philipp Rossak <embe...@gmail.com> escreveu: Hi Phillip, This is not a full review of this patchset. I just want to point you that you should keep supporting existing DT files. This patch updates the sunxi-ir driver to set the ir base clock from devicetree. This is necc

[linux-sunxi] [RFC 5/5] ARM: dts: sun8i: a83t: bananapi-m3: Enable IR controller

The Bananapi M3 has an onboard IR receiver. This enables the onboard IR receiver subnode. Other than the other IR receivers this one needs a base clock frequency of 300 Hz (3 MHz), to be able to work. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t-ba

[linux-sunxi] [RFC 4/5] ARM: dts: sun8i: a83t: Add support for the ir interface

The ir interface is like the H3 at 0x01f02000 located and is exactly the same. This patch adds support for the ir interface on the A83T. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++ 1 file changed, 10 insertions(+) diff --git

[linux-sunxi] [RFC 3/5] ARM: dts: sun8i: a83t: Add the ir pin for the A83T

The CIR Pin of the A83T is located at PL12 Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 19acae1b4089..5edb64

[linux-sunxi] [RFC 0/5] IR support for A83T - sunxi-ir driver update

to ask you to give me some feedback about the patch series, before I finialize it. Thanks in advance! Philipp Philipp Rossak (5): [media] rc: update sunxi-ir driver to get base frequency from devicetree [media] dt: bindings: Update binding documentation for sunxi IR controller ARM

[linux-sunxi] [RFC 2/5] [media] dt: bindings: Update binding documentation for sunxi IR controller

This patch updates documentation for Device-Tree bindings for sunxi IR controller and adds the new requiered property for the base clock frequency. Signed-off-by: Philipp Rossak <embe...@gmail.com> --- Documentation/devicetree/bindings/media/sunxi-ir.txt | 14 -- 1 file chan

[linux-sunxi] [RFC 1/5] [media] rc: update sunxi-ir driver to get base frequency from devicetree

This patch updates the sunxi-ir driver to set the ir base clock from devicetree. This is neccessary since there are different ir recievers on the market, that operate with different frequencys. So this value needs to be set depending on the attached receiver. Signed-off-by: Philipp Rossak <e

[linux-sunxi] [PATCH 0/2] Ethernet for the Nanopi M1 & M1 plus

The first patch of this patch series, fixes a missing alias on the nanopi m1 plus. The second patch enables the dwmac-sun8i ethernet driver on the Nanopi M1. Philipp Rossak (2): ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases ARM: dts: sun8i: h3: Enable dwmac-sun8i

[linux-sunxi] [PATCH 1/2] ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases

Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts index 0a8b79cf5954..87509a3e6aba 100644 ---

[linux-sunxi] [PATCH 2/2] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1

The dwmac-sun8i hardware is present on the Nanopi M1. It uses the internal PHY Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts b/arch/ar

[linux-sunxi] [linux] Question about ccu-sun8i-r.c a83t patch

Hey Chen-Yu, Currently I'm working on a patch series to enable the IR interface on the A83T. To get it running I need to configure the R_CIR_RX Clock Register of the A83T. In one of your patches [1] you submitted the related struct for it: a83t_ir_clk (in file:

[linux-sunxi] [PATCH v2] ARM: dts: sun8i: h3: Fix Pincrtl bindings on Bananapi M2 Plus

From: Philipp Rossak <embe...@gmail.com> There is no need for pincontrol nodes when the pin is set to a GPIO Signed-off-by: Philipp Rossak <embe...@gmail.com> --- This is Patch is a new version of the following patch: https://patchwork.kernel.org/patch/9934835/ changes since versio

[linux-sunxi] Re: [PATCH v2 2/2] ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

Hi Maxime Am 04.09.2017 um 10:05 schrieb Maxime Ripard: Hi Philipp, On Fri, Sep 01, 2017 at 06:30:01PM +0200, Philipp Rossak wrote: From: Philipp Rossak <embe...@gmail.com> * vqmmc is in this case not needed * no need for pincontrol nodes when the pin is set to a GPIO Signed-off-by: P

[linux-sunxi] [PATCH v2 2/2] ARM: dts: sun8i: h3: Improved Wifi bindings on Bananapi M2 Plus

From: Philipp Rossak <embe...@gmail.com> * vqmmc is in this case not needed * no need for pincontrol nodes when the pin is set to a GPIO Signed-off-by: Philipp Rossak <embe...@gmail.com> --- arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 7 --- 1 file changed, 7 deletions(-)

[linux-sunxi] [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

From: Philipp Rossak <embe...@gmail.com> The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrup

[linux-sunxi] [PATCH v2 0/2] [DTS] Enable hardware for Nanopi M1 & Nanopi M1 Plus

From: Philipp Rossak <embe...@gmail.com> This is v2 of my Enable hardware for Nanopi M1 & Nanopi M1 Plus Patchseries. Changes since v1: - removed pincrtl node from power sequence - removed vqmmc-supply - changed ap6212 label to sdio_wifi - removed vqmmc-supply &

Re: [linux-sunxi] Re: [U-Boot] [PATCH 3/4] sunxi: dts: added emac node for nanopi m1

On 30.08.2017 18:59, Jagan Teki wrote: On Wed, Aug 30, 2017 at 8:06 PM, Ondřej Jirman <m...@xff.cz> wrote: Hi, Jagan Teki píše v St 30. 08. 2017 v 19:48 +0530: On Wed, Aug 30, 2017 at 2:40 PM, Philipp Rossak <embe...@gmail.com> wrote: Am 30.08.2017 um 08:47 schrieb Jagan T

[linux-sunxi] Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

Hi, thanks for the feedback I will rework the patch. Should I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the AP6212 and it is done in the same way like in this patch. Am 30.08.2017 um 16:52 schrieb Maxime Ripard: Hi, On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak

[linux-sunxi] Re: [U-Boot] [PATCH 3/4] sunxi: dts: added emac node for nanopi m1

Am 30.08.2017 um 08:47 schrieb Jagan Teki: On Wed, Aug 30, 2017 at 6:02 AM, Philipp Rossak <embe...@gmail.com> wrote: From: Philipp Rossak <embe...@gmail.com> The sun8i emac hardware is present on the Nanopi M1. It uses the internal PHY. Signed-off-by: Philipp Rossak <em

[linux-sunxi] Re: [PATCH] This patch adds support for Sinovoip BPI-M3 A83T based board.

Thanks for the infos! I didn't know that someone is working on some patches for that board. Philipp Rossak On Aug 3, 2017 06:31, "Chen-Yu Tsai" <w...@csie.org> wrote: On Thu, Aug 3, 2017 at 7:25 AM, Philipp Rossak <embe...@gmail.com> wrote: > From: Philipp Rossak <e

[linux-sunxi] [PATCH] This patch adds support for Sinovoip BPI-M3 A83T based board.

From: Philipp Rossak <embe...@gmail.com> It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> This Patch got

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