[linux-sunxi] Re: [RESEND RFC PATCH 3/7] clk: sunxi: Add CLK_SET_RATE_PARENT flag for H3 HDMI clock

2017-11-02 Thread Stephen Boyd
On 09/20, Jernej Skrabec wrote: > When setting the HDMI clock of H3, the PLL_VIDEO clock needs to be set. > > Add CLK_SET_RATE_PARENT flag for H3 HDMI clock. > > Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net> > Signed-off-by: Icenowy Zheng <icen...@aosc.io>

[linux-sunxi] Re: [PATCH 0/2] Add a regmap to Allwinner R40 CCU to export GMAC register

2017-11-02 Thread Stephen Boyd
On 10/09, Icenowy Zheng wrote: > > > 于 2017年10月9日 GMT+08:00 下午3:18:09, Maxime Ripard > 写到: > >On Fri, Oct 06, 2017 at 06:33:31AM +, Icenowy Zheng wrote: > >> In the CCU of the Allwinner R40 SoC, there's a GMAC configuration > >register, > >> which is

[linux-sunxi] Re: [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change

2017-07-25 Thread Stephen Boyd
rted-by: Ondrej Jirman <meg...@megous.com> > Signed-off-by: Chen-Yu Tsai <w...@csie.org> > Tested-by: Icenowy Zheng <icen...@aosc.io> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum

[linux-sunxi] Re: [PATCH 06/10] clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3

2017-07-25 Thread Stephen Boyd
usting the CPUX clock. > > Signed-off-by: Icenowy Zheng <icen...@aosc.io> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- You received this message because you

[linux-sunxi] Re: [PATCH 1/15] clk: divider: Make divider_round_rate take the parent clock

2017-03-07 Thread Stephen Boyd
On 03/07, Maxime Ripard wrote: > So far, divider_round_rate only considers the parent clock returned by > clk_hw_get_parent. > > This works fine on clocks that have a single parents, this doesn't work on > muxes, since we will only consider the first parent, while other parents > may totally be

[linux-sunxi] Re: [PATCH v4 6/9] clk: sunxi-ng: Add A64 clocks

2016-10-20 Thread Stephen Boyd
On 10/11, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c > b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c > new file mode 100644 > index ..c0e96bf6d104 > --- /dev/null > +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c > + > +static int sun50i_a64_ccu_probe(struct

[linux-sunxi] Re: [PATCH v2 1/4] clk: sunxi-ng: Add A64 clocks

2016-09-14 Thread Stephen Boyd
On 09/09, Maxime Ripard wrote: > index 106cba27c331..964f22091a10 100644 > --- a/drivers/clk/sunxi-ng/Makefile > +++ b/drivers/clk/sunxi-ng/Makefile > @@ -22,3 +22,4 @@ obj-$(CONFIG_SUN6I_A31_CCU) += ccu-sun6i-a31.o > obj-$(CONFIG_SUN8I_A23_CCU) += ccu-sun8i-a23.o > obj-$(CONFIG_SUN8I_A33_CCU)

Re: [linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-12 Thread Stephen Boyd
On 05/12, Maxime Ripard wrote: > > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c > b/drivers/clk/sunxi/clk-sun4i-display.c > index 70803aa7028c..9780fac6d029 100644 > --- a/drivers/clk/sunxi/clk-sun4i-display.c > +++ b/drivers/clk/sunxi/clk-sun4i-display.c > @@ -128,8 +128,8 @@ static void

Re: [linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-11 Thread Stephen Boyd
On 05/10, Priit Laes wrote: > On Mon, 2016-05-09 at 15:39 -0700, Stephen Boyd wrote: > > On 05/09, Stephen Boyd wrote: > > > > > > > > > Ok I applied this one to clk-next. > > > > > And I squashed this in to silence the following checker warn

[linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-11 Thread Stephen Boyd
On 05/10, Maxime Ripard wrote: > Hi Stephen, > > On Mon, May 09, 2016 at 03:39:24PM -0700, Stephen Boyd wrote: > > On 05/09, Stephen Boyd wrote: > > > > > > Ok I applied this one to clk-next. > > > > > > > And I squashed this in to silen

[linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-09 Thread Stephen Boyd
On 05/09, Stephen Boyd wrote: > > Ok I applied this one to clk-next. > And I squashed this in to silence the following checker warning. drivers/clk/sunxi/clk-sun4i-display.c:110:33: warning: Variable length array is used. ---8<--- diff --git a/drivers/clk/sunxi/clk-sun4i-display.

[linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-09 Thread Stephen Boyd
On 05/08, Maxime Ripard wrote: > Hi Stephen, > > On Fri, May 06, 2016 at 03:30:02PM -0700, Stephen Boyd wrote: > > On 04/25, Maxime Ripard wrote: > > > The A10 SoCs and its relatives has a special clock controller to drive the > > > display engines (both front

[linux-sunxi] Re: [PATCH v4 01/11] clk: sunxi: Add display and TCON0 clocks driver

2016-05-06 Thread Stephen Boyd
Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > Acked-by: Rob Herring <r...@kernel.org> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> Unless I can merge this into clk-next? Wasn't clear to me. -- Qualcomm Innovation Center, Inc. is a member of Code A

[linux-sunxi] Re: [PATCH v3 04/19] clk: sunxi: Add TCON channel1 clock

2016-04-15 Thread Stephen Boyd
t; > Add a driver for the channel 1 clock. > > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > Acked-by: Rob Herring <r...@kernel.org> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aur

[linux-sunxi] Re: [PATCH v3 03/19] clk: sunxi: Add PLL3 clock

2016-04-15 Thread Stephen Boyd
r...@kernel.org> > Acked-by: Chen-Yu Tsai <w...@csie.org> > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundatio

[linux-sunxi] Re: [PATCH v3 02/19] clk: sunxi: Add display and TCON0 clocks driver

2016-04-15 Thread Stephen Boyd
On 03/23, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c > b/drivers/clk/sunxi/clk-sun4i-display.c > new file mode 100644 > index ..af7d1faebdec > --- /dev/null > +++ b/drivers/clk/sunxi/clk-sun4i-display.c > @@ -0,0 +1,262 @@ > +#include > +#include >

[linux-sunxi] Re: [PATCH v3 05/19] dt-bindings: clk: sun5i: add DRAM gates compatible

2016-04-15 Thread Stephen Boyd
e A13 / R8 SoCs. > > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > Acked-by: Chen-Yu Tsai <w...@csie.org> > Acked-by: Rob Herring <r...@kernel.org> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc

[linux-sunxi] Re: [PATCH v3 01/19] clk: composite: Add unregister function

2016-04-15 Thread Stephen Boyd
On 03/23, Maxime Ripard wrote: > The composite clock didn't have any unregistration function, which forced > us to use clk_unregister directly on it. > > While it was already not great from an API point of view, it also meant > that we were leaking the clk_composite structure allocated in >

[linux-sunxi] Re: [PATCH] clk: sunxi: Add CSI (camera's Sensors Interface) module clock driver for sun[457]i

2016-04-03 Thread Stephen Boyd
On 03/19, Rob Herring wrote: > On Thu, Mar 17, 2016 at 07:43:42PM +1100, yassinjaf...@gmail.com wrote: > > From: Yassin Jaffer > > > > This patch adds a composite clock type consisting of > > a clock gate, mux, configurable dividers, and a reset control. > > > >

[linux-sunxi] Re: [PATCH v5 34/46] clk: pwm: switch to the atomic API

2016-03-30 Thread Stephen Boyd
On 03/30, Boris Brezillon wrote: > diff --git a/drivers/clk/clk-pwm.c b/drivers/clk/clk-pwm.c > index ebcd738..49ec5b1 100644 > --- a/drivers/clk/clk-pwm.c > +++ b/drivers/clk/clk-pwm.c > @@ -28,15 +28,29 @@ static inline struct clk_pwm *to_clk_pwm(struct clk_hw > *hw) > static int

[linux-sunxi] Re: [PATCH v5 07/46] clk: pwm: use pwm_get_args() where appropriate

2016-03-30 Thread Stephen Boyd
oris Brezillon <boris.brezil...@free-electrons.com> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- You received this message because you are subscribed to the Google Groups

[linux-sunxi] Re: [PATCH v5 05/46] pwm: introduce the pwm_args concept

2016-03-30 Thread Stephen Boyd
On 03/30, Boris Brezillon wrote: > @@ -74,6 +74,23 @@ enum pwm_polarity { > PWM_POLARITY_INVERSED, > }; > > +/** > + * struct pwm_args - PWM arguments > + * @period: reference period > + * @polarity: reference polarity > + * > + * This structure describe board-dependent arguments attached

[linux-sunxi] Re: [PATCH v2 03/26] clk: Add regmap support

2016-01-27 Thread Stephen Boyd
On 01/14, Maxime Ripard wrote: > From: Matthias Brugger > > Some devices like SoCs from Mediatek need to use the clock > through a regmap interface. > This patch adds regmap support for the simple multiplexer clock, > the divider clock and the clock gate code. > >

[linux-sunxi] Re: [PATCH 01/19] clk: sunxi: Add display clock

2015-11-12 Thread Stephen Boyd
On 11/06, Maxime Ripard wrote: > Hi Stephen, > > Thanks for your feedback! > > On Fri, Oct 30, 2015 at 02:29:02PM -0700, Stephen Boyd wrote: > > > + > > > + mux = kzalloc(sizeof(*mux), GFP_KERNEL); > > > + if (!mux) > > [..] > > > +

[linux-sunxi] Re: [PATCH 02/19] clk: sunxi: Add PLL3 clock

2015-10-30 Thread Stephen Boyd
On 10/30, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile > index a9e1a5885846..40c32ffd912c 100644 > --- a/drivers/clk/sunxi/Makefile > +++ b/drivers/clk/sunxi/Makefile > @@ -9,8 +9,9 @@ obj-y += clk-a10-mod1.o > obj-y += clk-a10-pll2.o > obj-y +=

[linux-sunxi] Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock

2015-10-30 Thread Stephen Boyd
On 10/30, Maxime Ripard wrote: > The TCON is a controller generating the timings to output videos signals, > acting like both a CRTC and an encoder. > > It has two channels depending on the output, each channel being driven by > its own clock (and own clock controller). > > Add a driver for the

[linux-sunxi] Re: [PATCH 01/19] clk: sunxi: Add display clock

2015-10-30 Thread Stephen Boyd
On 10/30, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c > b/drivers/clk/sunxi/clk-sun4i-display.c > new file mode 100644 > index ..f13b095c6d7a > --- /dev/null > +++ b/drivers/clk/sunxi/clk-sun4i-display.c > @@ -0,0 +1,199 @@ > +/* > + * Copyright 2015

[linux-sunxi] Re: [PATCH v3 1/5] clk: Add a basic multiplier clock

2015-10-07 Thread Stephen Boyd
On 10/07, Maxime Ripard wrote: > On Mon, Oct 05, 2015 at 11:09:29AM -0700, Stephen Boyd wrote: > > On 10/05, Maxime Ripard wrote: > > > > > > Actually, the logic is also reversed. > > > > > > The divider driver will always try to find some rate that

[linux-sunxi] Re: [PATCH v3 1/5] clk: Add a basic multiplier clock

2015-10-05 Thread Stephen Boyd
On 10/05, Maxime Ripard wrote: > Hi, > > On Fri, Oct 02, 2015 at 01:43:08PM -0700, Stephen Boyd wrote: > > On 09/29, Maxime Ripard wrote: > > > + > > > + if (!val && mult->flags & CLK_MULTIPLIER_ZERO_BYPASS) > > > +

[linux-sunxi] Re: [PATCH v3 1/5] clk: Add a basic multiplier clock

2015-10-02 Thread Stephen Boyd
On 09/29, Maxime Ripard wrote: > diff --git a/drivers/clk/clk-multiplier.c b/drivers/clk/clk-multiplier.c > new file mode 100644 > index ..61097e365d55 > --- /dev/null > +++ b/drivers/clk/clk-multiplier.c > @@ -0,0 +1,176 @@ > +/* > + * Copyright (C) 2015 Maxime Ripard

[linux-sunxi] Re: [PATCH v3 5/5] clk: sunxi: mod1 clock support

2015-10-02 Thread Stephen Boyd
On 09/29, Maxime Ripard wrote: > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU

[linux-sunxi] Re: [PATCH v3 4/5] clk: sunxi: codec clock support

2015-10-02 Thread Stephen Boyd
On 09/29, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/clk-a10-codec.c > b/drivers/clk/sunxi/clk-a10-codec.c > new file mode 100644 > index ..aaeccf8cde39 > --- /dev/null > +++ b/drivers/clk/sunxi/clk-a10-codec.c > @@ -0,0 +1,45 @@ > +/* > + * Copyright 2013 Emilio López > +

[linux-sunxi] Re: [PATCH 1/5] ARM: sunxi: Add R8 support

2015-10-01 Thread Stephen Boyd
On 09/18, Maxime Ripard wrote: > The R8 is a new Allwinner SoC based on the A13. While both are very > similar, there's still a few differences. Introduce a new compatible to > deal with them. > > Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com> > --- Ac