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, sun4i_i2s_match);
--
2.23.0
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to this which I will deliver
after support for the H6 has gone in.
These other patches are required for HDMI audio which is driving this
patchset and they can be found here
https://github.com/codekipper/linux-sunxi/commits/upstream-i2s
BR,
CK
---
v6 changes compared to v5 are:
- rebased onto the recent tdm
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delivered. H6 and multi-channel HDMI will
follow shortly.
My test branch for this can be found at
https://github.com/codekipper/linux-sunxi/commits/upstream-i2s , I've been
using a Pine64 to test with; validating the new SoC block with HDMI audio
and ensuring that I've not broken the old block by making
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atform_device *pdev)
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property to override the old
way to calculate the frame width. What I've seen in what has already been
mainlined is that the i2s driver has a frame width that is fixed to 32
bits and this can be overridden using the tdm property.
My test branch for this can be found at
https://github.com/codekipper
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_device *pdev)
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2.22.0
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d not register DAI\n");
goto err_suspend;
--
2.21.0
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fset));
}
regmap_field_write(i2s->field_fmt_mode, val);
--
2.21.0
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ONFIG_CONSOLE_MUX=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--
2.21.0
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2
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_TEXT_BASE=0x60
+CONFIG_CONSOLE_MUX=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--
2.21.0
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M_ODT_EN=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-beelink-x2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_TEXT_BASE=0x60
+CONFIG_CONSOLE_MUX=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--
2.21.0
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+CONFIG_CONSOLE_MUX=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_SY8106A_POWER=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--
2.21.0
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From: Marcus Cooper
The clock division circuitry is different on the H3 and later SoCs.
The division of bclk is now based on pll2.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 82 +
1 file changed, 56 insertions(+), 26 deletions(-)
diff
From: Marcus Cooper
There is no need to set the clock and calculate the division of
the audio pll for the bclk and sync signals when they are not
required.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 144 +++-
1 file changed, 77
From: Marcus Cooper
On the newer SoCs this is set by default to transfer a 0 after
each sample in each slot. Add the regmap field to configure this
and set it so that it pads the sample with 0s.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 15 +++
1 file changed,
From: Marcus Cooper
Extend the functionality of the driver to include support of 20 and
24 bits per sample for the earlier SoCs.
Newer SoCs can also handle 32bit samples.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 41 ++---
1 file changed,
From: Marcus Cooper
Also add offset to RX channel select
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index adb988ae9ac5..93a484d7e228 100644
---
From: Marcus Cooper
The i2s block supports multi-lane i2s output however this functionality
is only possible in earlier SoCs where the pins are exposed and for
the i2s block used for HDMI audio on the later SoCs.
To enable this functionality, an optional property has been added to
the bindings.
From: Marcus Cooper
Some codecs require a different amount of a bit clocks per frame than
what is calculated by the sample width. Use the tdm slot bindings to
provide this mechanism.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 22 --
1 file changed, 20
From: Marcus Cooper
The i2s block can be used to pass PCM data over multiple channels
and is sometimes used for the audio side of an HDMI connection.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 121 +++-
1 file changed, 64 insertions(+), 57
From: Marcus Cooper
Bypass the regmap cache when flushing the i2s FIFOs and modify the tables
to reflect this.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 29 +
1 file changed, 9 insertions(+), 20 deletions(-)
diff --git
From: Marcus Cooper
Hi All,
here is a patch series to add some improvements to the sun4i-i2s driver
found whilst getting slave clocking and hdmi audio working on the newer
SoCs. Since the last push there has been some activity getting surround
sound working and this is included.
The
From: Marcus Cooper
The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.
From: Marcus Cooper
The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.
From: Marcus Cooper
The DAI has a loopback register which can be set and therefore routes
the transmit fifo to receive fifo. This is useful for testing the block
without the need for any external hardware.
Signed-off-by: Marcus Cooper
---
From: Marcus Cooper
Extend the functionality of the driver to include support of 20 and
24 bits per sample for the earlier SoCs.
Newer SoCs can also handle 32bit samples.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 34
From: Marcus Cooper
The clock division circuitry is different on the H3 and later SoCs.
The division of bclk is now based on pll2.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 76 +++--
1
From: Marcus Cooper
On the newer SoCs (H3, H5, A64 etc) this is set by default to
transfer a 0 after each sample in each slot whereas on the
earlier SoCs (A20, A31 etc) the default sign extension is to
pad the LSB.
Add the regmap field to configure this and set it so that
y from using tdm to set the slot width and now use
a dedicated property.
This has been tested on a Pine64 using the ES9023 audio POT board
(https://github.com/codekipper/linux-sunxi/commits/upstream)
and HDMI audio
(https://github.com/codekipper/linux-sunxi/commits/sunxi-wip-a64)
BR,
CK
---
v2 c
From: Marcus Cooper
Some codecs require a different amount of a bit clocks per frame
than what is calculated by using the sample width. Use a slot
width override property to provide this mechanism.
Signed-off-by: Marcus Cooper
---
From: Marcus Cooper
The i2s block supports multi-lane i2s output however this functionality
is only possible in earlier SoCs where the pins are exposed and for
the i2s block used for HDMI audio on the later SoCs.
To enable this functionality, an optional property has been
From: Marcus Cooper
The Mele I7 has an HDMI connector wired to the HDMI pins
on the SoC. Enable the display pipeline and HDMI output.
Signed-off-by: Marcus Cooper
---
v2 changes compared to v1 are:
- Reordered nodes.
---
From: Marcus Cooper
Enable the display pipeline and HDMI output on the Olimex
A20-SOM-EVB.
Signed-off-by: Marcus Cooper
---
v2 changes compared to v1 are:
- corrected indentation.
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 25
From: Marcus Cooper
The Mele I7 has an HDMI connector wired to the HDMI pins
on the SoC. Enable the display pipeline and HDMI output.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun6i-a31-i7.dts | 29 +
1 file
From: Marcus Cooper
Enable the display pipeline and HDMI output.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun4i-a10-mk802.dts | 25 +
1 file changed, 25 insertions(+)
diff --git
From: Marcus Cooper
Enable the display pipeline and HDMI output on the Olimex
A20-SOM-EVB.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 25 +
1 file changed, 25 insertions(+)
diff --git
From: Marcus Cooper
Enable the display pipeline and HDMI output
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun7i-a20-mk808c.dts | 25 +
1 file changed, 25 insertions(+)
diff --git
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git
From: Marcus Cooper
The S/PDIF transmitter can be reached on the Euler connector.
But as this is a GPIO then leave it disabled so that an overlay
can override the status property.
Signed-off-by: Marcus Cooper
---
From: Marcus Cooper
Hi All,
this patch series adds the digital audio blocks to the A64 SoC. No block
changes are necessary.
BR,
CK
---
v2 changes compared to v1 are:
- Added SoC specific compatiables
- moved spdif default pins to dtsi
- Added i2s2 block for HDMI as it
From: Marcus Cooper
Add the new DAI block for I2S2 which is used for HDMI audio.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git
From: Marcus Cooper
Add the DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 28 +++
1 file changed, 28
From: Marcus Cooper
Add the device tree sound bindings for the S/PDIF block.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git
From: Marcus Cooper
Add the SPDIF transceiver controller block and pin to the A64 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
From: Marcus Cooper
There is no need to set the clock and calculate the division of
the audio pll for the bclk and sync signals when they are not
required.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 116
From: Marcus Cooper
On the newer SoCs this is set by default to transfer a 0 after
each sample in each slot. Add the regmap field to configure this
and set it so that it pads the sample with 0s.
Signed-off-by: Marcus Cooper
---
From: Marcus Cooper
Some codecs require a different amount of a bit clocks per frame than
what is calculated by the sample width. Use the tdm slot bindings to
provide this mechanism.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 23
From: Marcus Cooper
Add the SPDIF TX pin to the A64 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
From: Marcus Cooper
Add the device tree sound bindings for the S/PDIF block.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git
From: Marcus Cooper
Hi All,
this patch series adds the digital audio blocks to the A64 SoC. No block
changes are necessary.
BR,
CK
Marcus Cooper (5):
arm64: allwinner: a64: Add the SPDIF block
arm64: allwinner: a64: Add SPDIF TX pin to the A64
arm64: allwinner:
From: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index
From: Marcus Cooper
Add the DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 26 ++
1 file changed, 26
From: Marcus Cooper
Add the SPDIF transceiver controller block to the A64 dtsi.
Signed-off-by: Marcus Cooper
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git
From: Marcus Cooper
The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using
the SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, a dual
colour LED, an IR receiver and an optical
From: Marcus Cooper
Add the new DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec.
Signed-off-by: Marcus Cooper
---
v2 changes compared to v1 are:
- removed i2s2 which is used for HDMI audio
---
From: Marcus Cooper
Add the new DAI blocks to the device tree.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun6i-a31.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi
From: Marcus Cooper
Add the new DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec whereas I2S2 is used for HDMI
audio.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 39
From: Marcus Cooper
On the newer SoCs the bits to configure the operational mode are
located in a different register. Add a regmap field so that this
location can be configured.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 15
From: Marcus Cooper
The location of the mclk output enable bit is different on newer
SoCs. Use a regmap field to enable it.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 16 ++--
1 file changed, 14 insertions(+), 2
From: Marcus Cooper
The newer SoCs do not have this setting. Instead they set the pin
direction. Add a check to see if the bit is valid and if so set
it accordingly.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
From: Marcus Cooper
On newer SoCs the bit fields for the blck and lrclk polarity are in
a different locations. Use regmap fields to set the polarity bits
as intended.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 45
From: Marcus Cooper
The default value of the config register is different on newer
SoCs and therefore enabling/disabling with a register write
will clear bits used to set the direction of the clock and frame
pins.
Signed-off-by: Marcus Cooper
From: Marcus Cooper
On newer SoCs the location of the slot width select and sample
resolution are different and also there is a bigger range of
support.
For the current supported rates then an offset is required.
Signed-off-by: Marcus Cooper
From: Marcus Cooper
The sun8i-h3 introduces a lot of changes to the i2s block such
as different register locations, extended clock division and
more operational modes. As we have to consider the earlier
implementation then these changes need to be isolated.
None of the new
k
Pine 64 connected to the audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
I don't own a A33 device which uses the i2s block for the audio co
From: Marcus Cooper
On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.
To support the newer SoC then regmap fields have been added
From: Marcus Cooper
On the newer SoCs the bits to configure the operational mode are
located in a different register. Add a regmap field so that this
location can be configured.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 16
From: Marcus Cooper
On newer SoCs the location of the slot width select and sample
resolution are different and also there is a bigger range of
support.
For the current supported rates then an offset is required.
Signed-off-by: Marcus Cooper
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