From: Siarhei Siamashka <siarhei.siamas...@gmail.com>
Previously the backup area was allocated at the address 0x8000.
This is not very good because it means that the U-Boot SPL can
only safely use memory at addresses 0x0000-0x7FFF (32 KiB). But
if we move the backup area to the end of the SRAM A4, this can
allow U-Boot SPL to use memory 0x0000-0x9FFF (40 KiB). The BROM
can't load such large SPLs from the SD card. But the SPL still
can move its stack up to the 40 KiB boundary or do UCL or LZO
decompression at runtime to squeeze more code into it.
This patch makes the sunxi-fel tool compatible with 40 KiB SPLs,
even though the current U-Boot releases do not use them yet.
Signed-off-by: Siarhei Siamashka <siarhei.siamas...@gmail.com>
Acked-by: Bernhard Nortmann <bernhard.nortm...@web.de>
---
fel.c | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/fel.c b/fel.c
index 44d1b49..688515b 100644
--- a/fel.c
+++ b/fel.c
@@ -472,13 +472,17 @@ typedef struct {
* at 0x2000 (and growing down) for the IRQ handler. And another one at 0x7000
* (and also growing down) for the regular code. In order to use the whole
* 32 KiB in the A1/A2 sections of SRAM, we need to temporarily move these
- * stacks elsewhere. And the addresses above 0x7000 are also a bit suspicious,
- * so it might be safer to backup the 0x7000-0x8000 area too. On A10/A13/A20
- * we can use the SRAM section A3 (0x8000) for this purpose.
+ * stacks elsewhere. And the addresses 0x7D00-0x7FFF contain something
+ * importantant too (overwriting them kills FEL). On A10/A13/A20 we can use
+ * the SRAM sections A3/A4 (0x8000-0xBFFF) for this purpose.
*/
sram_swap_buffers a10_a13_a20_sram_swap_buffers[] = {
- { .buf1 = 0x01800, .buf2 = 0x8000, .size = 0x800 },
- { .buf1 = 0x05C00, .buf2 = 0x8800, .size = 0x8000 - 0x5C00 },
+ /* 0x1C00-0x1FFF (IRQ stack) */
+ { .buf1 = 0x01C00, .buf2 = 0xA400, .size = 0x0400 },
+ /* 0x5C00-0x6FFF (Stack) */
+ { .buf1 = 0x05C00, .buf2 = 0xA800, .size = 0x1400 },
+ /* 0x7C00-0x7FFF (Something important) */
+ { .buf1 = 0x07C00, .buf2 = 0xBC00, .size = 0x0400 },
{ .size = 0 } /* End of the table */
};
@@ -508,7 +512,7 @@ soc_sram_info soc_sram_info_table[] = {
{
.soc_id = 0x1623, /* Allwinner A10 */
.scratch_addr = 0x1000,
- .thunk_addr = 0xAE00, .thunk_size = 0x200,
+ .thunk_addr = 0xA200, .thunk_size = 0x200,
.swap_buffers = a10_a13_a20_sram_swap_buffers,
.needs_l2en = true,
.sid_addr = 0x01C23800,
@@ -516,7 +520,7 @@ soc_sram_info soc_sram_info_table[] = {
{
.soc_id = 0x1625, /* Allwinner A13 */
.scratch_addr = 0x1000,
- .thunk_addr = 0xAE00, .thunk_size = 0x200,
+ .thunk_addr = 0xA200, .thunk_size = 0x200,
.swap_buffers = a10_a13_a20_sram_swap_buffers,
.needs_l2en = true,
.sid_addr = 0x01C23800,
@@ -524,7 +528,7 @@ soc_sram_info soc_sram_info_table[] = {
{
.soc_id = 0x1651, /* Allwinner A20 */
.scratch_addr = 0x1000,
- .thunk_addr = 0xAE00, .thunk_size = 0x200,
+ .thunk_addr = 0xA200, .thunk_size = 0x200,
.swap_buffers = a10_a13_a20_sram_swap_buffers,
.sid_addr = 0x01C23800,
},
--
2.4.10
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