Hi,
On 01/15/2014 04:00 PM, Kishon Vijay Abraham I wrote:
On Wednesday 15 January 2014 04:28 AM, Hans de Goede wrote:
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers. Besides this there are also some other
phy related bits which need
Hi,
On 01/16/2014 08:07 AM, Chen-Yu Tsai wrote:
Hi Hans,
On Wed, Jan 15, 2014 at 11:48 PM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 01/15/2014 04:00 PM, Kishon Vijay Abraham I wrote:
On Wednesday 15 January 2014 04:28 AM, Hans de Goede wrote:
[...]
+static int
On Wednesday 15 January 2014 04:28 AM, Hans de Goede wrote:
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers. Besides this there are also some other
phy related bits which need poking, which are per phy, but shared between the
ohci and
Hi Hans,
Please keep me in CC for all the Allwinner-related patches.
On Tue, Jan 14, 2014 at 11:58:25PM +0100, Hans de Goede wrote:
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers. Besides this there are also some other
phy related
Hi,
On Wednesday 15 January 2014 09:18 PM, Hans de Goede wrote:
Hi,
On 01/15/2014 04:00 PM, Kishon Vijay Abraham I wrote:
On Wednesday 15 January 2014 04:28 AM, Hans de Goede wrote:
The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers.
Hi Hans,
On Wed, Jan 15, 2014 at 11:48 PM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 01/15/2014 04:00 PM, Kishon Vijay Abraham I wrote:
On Wednesday 15 January 2014 04:28 AM, Hans de Goede wrote:
[...]
+static int sun4i_usb_phy_init(struct phy *_phy)
+{
+ struct sun4i_usb_phy
